74HCT366PW

74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting Rev. 03 — 21 November 2006 Product data sheet 1. General description The 74HC366; 74HCT366 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The 74HC366; 74HCT366 has six inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable inputs (OE1, OE2). A HIGH on OEn causes the outputs to assume a high-impedance OFF-state. The 74HC366; 74HCT366 is functionally identical to: • 74HC365; 74HCT365, but has inverted outputs 2. Features I Inverting outputs I Complies with JEDEC standard no. 7A I ESD protection: N HBM EIA/JESD22-A114-D exceeds 2000 V N MM EIA/JESD22-A115-A exceeds 200 V I Specified from −40 °C to +85 °C and from −40 °C to +125 °C 3. Ordering information Table 1. Ordering information Package Temperature range Name 74HC366 74HC366D 74HC366N 74HC366PW 74HCT366 74HCT366D 74HCT366DB 74HCT366N −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C SO16 SSOP16 DIP16 TSSOP16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 plastic shrink small outline package; 16 leads; body width 5.3 mm plastic dual in-line package; 16 leads (300 mil); long body plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT338-1 SOT38-1 SOT403-1 −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C SO16 DIP16 TSSOP16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 plastic dual in-line package; 16 leads (300 mil); long body plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT38-1 SOT403-1 Description Version Type number 74HCT366PW −40 °C to +125 °C NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting 4. Functional diagram 2 1A 1Y 3 1A 5 2A 7 3A 9 4A 11 5A 13 6A 6Y 5Y 4Y 2 4 6 10 12 OE1 14 001aaf581 4 2A 2Y 1Y 6 3A 3Y 2Y 1 15 & EN 10 4A 5A 4Y 5Y 3Y 12 3 5 7 9 11 13 001aaf582 14 6A 6Y 1 15 OE1 OE2 001aaf583 OE2 Fig 1. Functional diagram Fig 2. Logic symbol Fig 3. IEC logic symbol buffer/line driver 1 1A VCC 1Y OE1 OE2 2A GND buffer/line driver 2 buffer/line driver 3 buffer/line driver 4 buffer/line driver 5 buffer/line driver 6 001aaf584 2Y 3A 3Y 4A 4Y 5A 5Y 6A 6Y Fig 4. Logic diagram 74HC_HCT366_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 21 November 2006 2 of 19 NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting 5. Pinning information 5.1 Pinning 74HC366 74HCT366 OE1 1A 1Y 2A 2Y 3A 3Y GND 1 2 3 4 5 6 7 8 001aaf580 16 VCC 15 OE2 14 6A 13 6Y 12 5A 11 5Y 10 4A 9 4Y Fig 5. Pin configuration 5.2 Pin description Table 2. Symbol OE1 1A 1Y 2A 2Y 3A 3Y GND 4Y 4A 5Y 5A 6Y 6A OE2 VCC Pin description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Description output enable input 1 (active LOW) data input 1 data output 1 data input 2 data output 2 data input 3 data output 3 ground (0 V) data output 4 data input 4 data output 5 data input 5 data output 6 data input 6 output enable input 2 (active LOW) supply voltage 74HC_HCT366_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 21 November 2006 3 of 19 NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting 6. Functional description Table 3. Control OE1 L L X H [1] Function table[1] Input OE2 L L H X nA L H X X Output nY H L Z Z H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC IIK IOK IO ICC IGND Tstg Ptot supply voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation DIP16 package SO16 package SSOP16 package TSSOP16 package [1] [2] [3] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 °C. For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C. For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 °C. [1] [2] [3] [3] Conditions VI < −0.5 V or VI > VCC + 0.5 V VO < −0.5 V or VO > VCC + 0.5 V VO = −0.5 V to (VCC + 0.5 V) Min −0.5 −65 - Max +7 ±20 ±20 ±35 70 −70 +150 750 500 500 500 Unit V mA mA mA mA mA °C mW mW mW mW 8. Recommended operating conditions Table 5. 74HC366 VCC VI VO Tamb supply voltage input voltage output voltage ambient temperature 2.0 0 0 −40 5.0 +25 6.0 VCC VCC V V V Recommended operating conditions Conditions Min Typ Max Unit Symbol Parameter +125 °C 74HC_HCT366_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 21 November 2006 4 of 19 NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting Table 5. tr Recommended operating conditions …continued Conditions inputs VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 4.5 0 0 −40 inputs; VCC = 4.5 V inputs; VCC = 4.5 V 6.0 6.0 5.0 +25 6.0 6.0 1000 ns 500 400 ns ns Min Typ Max Unit rise time Symbol Parameter tf fall time inputs VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 1000 ns 500 400 5.5 VCC VCC 500 500 ns ns V V V ns ns 74HCT366 VCC VI VO Tamb tr tf supply voltage input voltage output voltage ambient temperature rise time fall time +125 °C 9. Static characteristics Table 6. Static characteristics 74HC366 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 °C VIH HIGH-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 2.0 V IO = −20 µA; VCC = 4.5 V IO = −20 µA; VCC = 6.0 V IO = −6.0 mA; VCC = 4.5 V IO = −7.8 mA; VCC = 6.0 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 µA; VCC = 2.0 V IO = 20 µA; VCC = 4.5 V IO = 20 µA; VCC = 6.0 V IO = 6.0 mA; VCC = 4.5 V IO = 7.8 mA; VCC = 6.0 V II 74HC_HCT366_3 Conditions Min 1.5 3.15 4.2 1.9 4.4 5.9 3.98 5.48 - Typ 1.2 2.4 3.2 0.8 2.1 2.8 2.0 4.5 6.0 4.32 5.81 0 0 0 0.15 0.16 - Max 0.5 1.35 1.8 0.1 0.1 0.1 0.26 0.26 ±0.1 Unit V V V V V V V V V V V V V V V V µA input leakage current VI = VCC or GND; VCC = 6.0 V © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 21 November 2006 5 of 19 NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting Table 6. Static characteristics 74HC366 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter IOZ ICC CI VIH OFF-state output current supply current input capacitance HIGH-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 2.0 V IO = −20 µA; VCC = 4.5 V IO = −20 µA; VCC = 6.0 V IO = −6.0 mA; VCC = 4.5 V IO = −7.8 mA; VCC = 6.0 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 µA; VCC = 2.0 V IO = 20 µA; VCC = 4.5 V IO = 20 µA; VCC = 6.0 V IO = 6.0 mA; VCC = 4.5 V IO = 7.8 mA; VCC = 6.0 V II IOZ ICC VIH input leakage current OFF-state output current supply current HIGH-level input voltage VI = VCC or GND; VCC = 6.0 V; VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V VI = VCC or GND; IO = 0 A; VCC = 6.0 V VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 2.0 V IO = −20 µA; VCC = 4.5 V IO = −20 µA; VCC = 6.0 V IO = −6.0 mA; VCC = 4.5 V IO = −7.8 mA; VCC = 6.0 V 1.9 4.4 5.9 3.7 5.2 V V V V V 1.5 3.15 4.2 0.1 0.1 0.1 0.33 0.33 ±1.0 ±5.0 80 0.5 1.35 1.8 V V V V V µA µA µA V V V V V V 1.9 4.4 5.9 3.84 5.34 V V V V V Conditions VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V VI = VCC or GND; IO = 0 A; VCC = 6.0 V Min 1.5 3.15 4.2 Typ 3.5 Max ±0.5 8.0 0.5 1.35 1.8 Unit µA µA pF V V V V V V Tamb = −40 °C to +85 °C Tamb = −40 °C to +125 °C 74HC_HCT366_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 21 November 2006 6 of 19 NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting Table 6. Static characteristics 74HC366 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VOL LOW-level output voltage Conditions VI = VIH or VIL IO = 20 µA; VCC = 2.0 V IO = 20 µA; VCC = 4.5 V IO = 20 µA; VCC = 6.0 V IO = 6.0 mA; VCC = 4.5 V IO = 7.8 mA; VCC = 6.0 V II IOZ ICC input leakage current OFF-state output current supply current VI = VCC or GND; VCC = 6.0 V VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V VI = VCC or GND; IO = 0 A; VCC = 6.0 V 0.1 0.1 0.1 0.4 0.4 ±1.0 160 V V V V V µA µA Min Typ Max Unit ±10.0 µA Table 7. Static characteristics 74HCT366 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 °C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL; VCC = 4.5 V IO = −20 µA IO = −6.0 mA VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 µA IO = 6.0 mA II IOZ ICC ∆ICC input leakage current VI = VCC or GND; VCC = 5.5 V OFF-state output current VI = VIH or VIL; VO = VCC or GND per input pin; other inputs at GND or VCC; IO = 0 A; VCC = 5.5 V supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V pins nA pin OE1 pin OE2 CI VIH VIL VOH input capacitance HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL; VCC = 4.5 V IO = −20 µA IO = −6.0 mA VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 µA IO = 6.0 mA II 74HC_HCT366_3 Conditions Min 2.0 4.4 3.98 2.0 4.4 3.84 - Typ 1.6 1.2 4.5 4.32 0 0.16 100 100 90 3.5 - Max 0.8 0.1 0.26 ±0.1 ±0.5 8.0 360 360 320 0.8 0.1 0.33 ±1.0 Unit V V V V V V µA µA µA µA µA µA pF V V V V V V µA additional supply current VI = VCC − 2.1 V; other inputs at VCC or GND; IO = 0 A Tamb = −40 °C to +85 °C input leakage current VI = VCC or GND; VCC = 5.5 V © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 21 November 2006 7 of 19 NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting Table 7. Static characteristics 74HCT366 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter IOZ ICC ∆ICC Conditions Min Typ Max ±5.0 2.0 4.4 3.7 80 450 450 400 0.8 0.1 0.4 ±1.0 ±10.0 160 490 490 441 Unit µA µA µA µA µA V V V V V V µA µA µA µA µA µA OFF-state output current VI = VIH or VIL; VO = VCC or GND per input pin; other inputs at GND or VCC; IO = 0 A; VCC = 5.5 V supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V pins nA pin OE1 pin OE2 Tamb = −40 °C to +125 °C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL; VCC = 4.5 V IO = −20 µA IO = −6.0 mA VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 µA IO = 6.0 mA II IOZ ICC ∆ICC input leakage current VI = VCC or GND; VCC = 5.5 V OFF-state output current VI = VIH or VIL; VO = VCC or GND per input pin; other inputs at GND or VCC; IO = 0 A; VCC = 5.5 V supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V pins nA pin OE1 pin OE2 additional supply current VI = VCC − 2.1 V; other inputs at VCC or GND; IO = 0 A additional supply current VI = VCC − 2.1 V; other inputs at VCC or GND; IO = 0 A 10. Dynamic characteristics Table 8. Dynamic characteristics 74HC366 Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8. Symbol Parameter Tamb = 25 °C tpd propagation delay nA to nY; see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 5 V; CL = 15 pF VCC = 6.0 V ten enable time OEn to nY; see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V [2] [1] Conditions Min Typ Max Unit - 33 12 10 10 44 16 13 100 20 17 150 30 26 ns ns ns ns ns ns ns 74HC_HCT366_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 21 November 2006 8 of 19 NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting Table 8. Dynamic characteristics 74HC366 …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8. Symbol Parameter tdis disable time Conditions OEn to nY; see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tt transition time see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V CPD power dissipation capacitance propagation delay per buffer; VI = GND to VCC [5] [4] [3] Min - Typ 55 20 16 14 5 4 30 Max 150 30 26 60 12 10 - Unit ns ns ns ns ns ns pF Tamb = −40 °C to +85 °C tpd nA to nY; see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V ten enable time OEn to nY; see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tdis disable time OEn to nY; see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tt transition time see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V Tamb = −40 °C to +125 °C tpd propagation delay nA to nY; see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V ten enable time OEn to nY; see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tdis disable time OEn to nY; see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 74HC_HCT366_3 [1] [2] - 125 25 21 190 38 33 190 38 33 75 15 13 ns ns ns ns ns ns ns ns ns ns ns ns [3] [4] [1] [2] - 150 30 26 225 45 38 225 45 38 ns ns ns ns ns ns ns ns ns [3] - © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 21 November 2006 9 of 19 NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting Table 8. Dynamic characteristics 74HC366 …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8. Symbol Parameter tt transition time Conditions see Figure 6 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V [1] [2] [3] [4] [5] tpd is the same as tPHL and tPLH. ten is the same as tPZH and tPZL. tdis is the same as tPHZ and tPLZ. tt is the same as tTHL and tTLH. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL × VCC2 × fo) = sum of outputs. [4] Min - Typ - Max 90 18 15 Unit ns ns ns Table 9. Dynamic characteristics 74HCT366 Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; see test circuit Figure 8. Symbol Parameter Tamb = 25 °C tpd propagation delay nA to nY; see Figure 6 VCC = 4.5 V VCC = 5 V; CL = 15 pF ten tdis tt CPD enable time disable time transition time power dissipation capacitance propagation delay enable time disable time transition time propagation delay enable time disable time transition time tpd is the same as tPHL and tPLH. ten is the same as tPZH and tPZL. tdis is the same as tPHZ and tPLZ. © NXP B.V. 2006. All rights reserved. Conditions [1] Min Typ Max Unit [2] [3] [4] [5] 13 11 16 20 5 30 24 35 35 12 - ns ns ns ns ns pF OEn to nY; VCC = 4.5 V; see Figure 7 OEn to nY; VCC = 4.5 V; see Figure 7 VCC = 4.5 V; see Figure 6 per buffer; VI = GND to (VCC − 1.5 V) - Tamb = −40 °C to +85 °C tpd ten tdis tt tpd ten tdis tt [1] [2] [3] nA to nY; VCC = 4.5 V; see Figure 6 OEn to nY; VCC = 4.5 V; see Figure 7 OEn to nY; VCC = 4.5 V; see Figure 7 VCC = 4.5 V; see Figure 6 nA to nY; VCC = 4.5 V; see Figure 6 OEn to nY; VCC = 4.5 V; see Figure 7 OEn to nY; VCC = 4.5 V; see Figure 7 VCC = 4.5 V; see Figure 6 [1] [2] [3] [4] - - 30 44 44 15 36 53 53 18 ns ns ns ns ns ns ns ns Tamb = −40 °C to +125 °C [1] [2] [3] [4] 74HC_HCT366_3 Product data sheet Rev. 03 — 21 November 2006 10 of 19 NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting [4] [5] tt is the same as tTHL and tTLH. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL × VCC2 × fo) = sum of outputs. 11. Waveforms VI nA input GND t PHL t PLH VM VM VOH nY output VOL t THL t TLH 001aaf585 VM VM Measurement points are given in Table 10. VOL and VOH are typical output voltage drop that occur with the output load. Fig 6. Propagation delay data input (nA) to output (nY) and output transition time VI OEn input GND tPLZ VCC nY output LOW-to-OFF OFF-to-LOW VOL tPHZ VOH nY output HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs disabled outputs enabled 001aaf586 VM VM tPZL VM VX tPZH VY VM Measurement points are given in Table 10. VOL and VOH are typical output voltage drop that occur with the output load. Fig 7. 3-state enable and disable times 74HC_HCT366_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 21 November 2006 11 of 19 NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting Table 10. Type 74HC366 74HCT366 Measurement points Input VM 0.5VCC 1.3 V Output VM 0.5VCC 1.3 V VX 0.1 × VCC 0.1 × VCC VY 0.9 × VCC 0.9 × VCC VI negative pulse 0V tW 90 % VM 10 % tf tr tr tf 90 % VM 10 % tW VM VM VI positive pulse 0V VCC VCC PULSE GENERATOR VI VO RL S1 DUT RT CL open 001aad983 Test data is given in Table 11. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator CL = Load capacitance including jig and probe capacitance RL = Load resistor S1 = Test selection switch Fig 8. Load circuitry for measuring switching times Table 11. Type 74HC366 74HCT366 Test data Input VI VCC 3V tr, tf 6 ns 6 ns Load CL 15 pF, 50 pF 15 pF, 50 pF RL 1 kΩ 1 kΩ S1 position tPHL, tPLH open open tPZH, tPHZ GND GND tPZL, tPLZ VCC VCC 74HC_HCT366_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 21 November 2006 12 of 19 NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting 12. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE vMA Z 16 9 Q A2 pin 1 index θ Lp 1 e bp 8 wM L detail X A1 (A 3) A 0 2.5 scale 5 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT109-1 REFERENCES IEC 076E07 JEDEC MS-012 JEITA EUROPEAN PROJECTION A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 10.0 9.8 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 0.039 0.016 Q 0.7 0.6 0.028 0.020 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3 θ 0.010 0.057 0.069 0.004 0.049 0.019 0.0100 0.39 0.014 0.0075 0.38 0.244 0.041 0.228 0.028 0.004 0.012 8 o 0 o ISSUE DATE 99-12-27 03-02-19 Fig 9. Package outline SOT109-1 (SO16) 74HC_HCT366_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 21 November 2006 13 of 19 NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 D E A X c y HE vM A Z 16 9 Q A2 A1 pin 1 index Lp L 1 bp 8 wM detail X (A 3) θ A e 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2 A1 0.21 0.05 A2 1.80 1.65 A3 0.25 bp 0.38 0.25 c 0.20 0.09 D (1) 6.4 6.0 E (1) 5.4 5.2 e 0.65 HE 7.9 7.6 L 1.25 Lp 1.03 0.63 Q 0.9 0.7 v 0.2 w 0.13 y 0.1 Z (1) 1.00 0.55 θ 8 o 0 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 REFERENCES IEC JEDEC MO-150 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 10. Package outline SOT338-1 (SSOP16) 74HC_HCT366_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 21 November 2006 14 of 19 NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting DIP16: plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 D seating plane ME A2 A L A1 c Z e b1 b 16 9 MH wM (e 1) pin 1 index E 1 8 0 5 scale 10 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.7 0.19 A1 min. 0.51 0.02 A2 max. 3.7 0.15 b 1.40 1.14 0.055 0.045 b1 0.53 0.38 0.021 0.015 c 0.32 0.23 0.013 0.009 D (1) 21.8 21.4 0.86 0.84 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.1 e1 7.62 0.3 L 3.9 3.4 0.15 0.13 ME 8.25 7.80 0.32 0.31 MH 9.5 8.3 0.37 0.33 w 0.254 0.01 Z (1) max. 2.2 0.087 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT38-1 REFERENCES IEC 050G09 JEDEC MO-001 JEITA SC-503-16 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-13 Fig 11. Package outline SOT38-1 (DIP16) 74HC_HCT366_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 21 November 2006 15 of 19 NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 D E A X c y HE vMA Z 16 9 Q A2 pin 1 index A1 θ Lp L (A 3) A 1 e bp 8 wM detail X 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 5.1 4.9 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.40 0.06 θ 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 Fig 12. Package outline SOT403-1 (TSSOP16) 74HC_HCT366_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 21 November 2006 16 of 19 NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting 13. Abbreviations Table 12. Acronym CMOS DUT ESD HBM LSTTL MM Abbreviations Description Complementary Metal Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Low-power Schottky Transistor-Transistor Logic Machine Model 14. Revision history Table 13. Revision history Release date 20061121 Data sheet status Product data sheet Change notice Supersedes 74HC_HCT366_CNV_2 Document ID 74HC_HCT366_3 Modifications: • • • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors Legal texts have been adapted to the new company name where appropriate Added family specification Product specification - 74HC_HCT366_CNV_2 19901201 74HC_HCT366_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 21 November 2006 17 of 19 NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting 15. Legal information 15.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 15.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com 74HC_HCT366_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 21 November 2006 18 of 19 NXP Semiconductors 74HC366; 74HCT366 Hex buffer/line driver; 3-state; inverting 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 18 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Contact information. . . . . . . . . . . . . . . . . . . . . 18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2006. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 21 November 2006 Document identifier: 74HC_HCT366_3