74HCT4851D

74HC4851; 74HCT4851 8-channel analog multiplexer/demultiplexer with injection-current effect control Rev. 02 — 2 September 2008 Product data sheet 1. General description The 74HC4851; 74HCT4851 are high-speed Si-gate CMOS devices and are specified in compliance with JEDEC standard no. 7A. The 74HC4851; 74HCT4851 are 8-channel analog multiplexers/demultiplexers with three digital select inputs (S0 to S2), an active-LOW enable input (E), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z). The devices feature injection-current effect control, which has excellent value in automotive applications where voltages in excess of the supply voltage are common. With E LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2. With E HIGH, all switches are in the high-impedance OFF-state, independent of S0 to S2. The injection-current effect control allows signals at disabled analog input channels to exceed the supply voltage without affecting the signal of the enabled analog channel. This eliminates the need for external diode/resistor networks typically used to keep the analog channel signals within the supply-voltage range. 2. Features I Injection-current cross coupling < 1 mV/mA I Wide supply voltage range from 2.0 V to 6.0 V for 74HC4851 I ESD protection: N HBM JESD22-A114E exceeds 2000 V N CDM JESD22-C101C exceeds 1000 V I Latch-up performance exceeds 100 mA per JESD 78 Class II level A I Low ON-state resistance: N 400 Ω (typical) at VCC = 2.0 V N 215 Ω (typical) at VCC = 3.0 V N 120 Ω (typical) at VCC = 3.3 V N 76 Ω (typical) at VCC = 4.5 V N 59 Ω (typical) at VCC = 6.0 V NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control 3. Applications I I I I Analog multiplexing and demultiplexing Digital multiplexing and demultiplexing Signal gating Automotive application 4. Ordering information Table 1. Ordering information Package Temperature range Name 74HC4851D 74HC4851PW 74HC4851BQ −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C SO16 TSSOP16 Description plastic small outline package; 16 leads; body width 3.9 mm plastic thin shrink small outline package; 16 leads; body width 4.4 mm Version SOT109-1 SOT403-1 SOT763-1 Type number DHVQFN16 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 × 3.5 × 0.85 mm SO16 TSSOP16 plastic small outline package; 16 leads; body width 3.9 mm plastic thin shrink small outline package; 16 leads; body width 4.4 mm 74HCT4851D −40 °C to +125 °C SOT109-1 SOT403-1 SOT763-1 74HCT4851PW −40 °C to +125 °C 74HCT4851BQ −40 °C to +125 °C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 × 3.5 × 0.85 mm 5. Functional diagram 11 10 9 6 0 8X 2 G8 0 7 13 S0 S1 S2 11 10 9 14 15 12 1 5 2 E 6 3 Z 4 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 3 MUX/DMUX 0 1 2 3 4 5 6 7 13 14 15 12 1 5 2 4 001aad541 001aad542 Fig 1. Logic symbol 74HC_HCT4851_2 Fig 2. IEC logic symbol © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 2 September 2008 2 of 20 NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control VCC 16 INJECTION CURRENT CONTROL INJECTION CURRENT CONTROL INJECTION CURRENT CONTROL INJECTION CURRENT CONTROL INJECTION CURRENT CONTROL INJECTION CURRENT CONTROL INJECTION CURRENT CONTROL INJECTION CURRENT CONTROL INJECTION CURRENT CONTROL 8 001aaf875 13 Y0 S0 11 14 Y1 15 Y2 S1 10 12 Y3 1-OF-8 DECODER 1 Y4 S2 9 5 Y5 2 Y6 E 6 4 Y7 3 Z GND Fig 3. Functional diagram 74HC_HCT4851_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 2 September 2008 3 of 20 NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control 6. Pinning information 6.1 Pinning 74HC4851 74HCT4851 Y4 Y6 Z Y7 Y5 E n.c. GND 1 2 3 4 5 6 7 8 001aaf876 74HC4851 74HCT4851 16 VCC 15 Y2 Y6 14 Y1 13 Y0 12 Y3 11 S0 10 S1 9 S2 Z Y7 Y5 E n.c. 2 3 4 5 6 7 8 GND S2 9 GND(1) terminal 1 index area 16 VCC 15 Y2 14 Y1 13 Y0 12 Y3 11 S0 10 S1 Y4 1 001aaf877 Transparent top view (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig 4. Pin configuration SO16 and TSSOP16 Fig 5. Pin configuration DHVQFN16 6.2 Pin description Table 2. Symbol Y4 Y6 Z Y7 Y5 E n.c. GND S2 S1 S0 Y3 Y0 Y1 Y2 VCC Pin description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Description independent input/output independent input/output common input/output independent input/output independent input/output enable input (active LOW) not connected ground (0 V) select input select input select input independent input/output independent input/output independent input/output independent input/output supply voltage 74HC_HCT4851_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 2 September 2008 4 of 20 NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control 7. Functional description Table 3. Input E L L L L L L L L H [1] Function table[1] Channel ON S2 L L L L H H H H X S1 L L H H L L H H X S0 L H L H L H L H X Y0 to Z Y1 to Z Y2 to Z Y3 to Z Y4 to Z Y5 to Z Y6 to Z Y7 to Z - H = HIGH voltage level; L = LOW voltage level; X = don’t care. 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC VI VSW IIK ISK ISW ICC IGND Tstg Ptot [1] [2] [3] Parameter supply voltage input voltage switch voltage input clamping current switch clamping current switch current supply current ground current storage temperature total power dissipation Conditions [1] [2] Min −0.5 −0.5 −0.5 −50 −65 Max +7.0 VCC + 0.5 VCC + 0.5 ±20 ±20 ±25 50 +150 500 Unit V V V mA mA mA mA mA °C mW VI < −0.5 V or VI > VCC + 0.5 V VSW < −0.5 V or VSW > VCC + 0.5 V VSW > −0.5 V or VSW < VCC + 0.5 V Tamb = −40 °C to +125 °C [3] - The minimum and maximum input voltage rating may be exceeded if the input clamping current rating is observed. The minimum and maximum switch voltage rating may be exceeded if the switch clamping current rating is observed. For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C. For TSSOP16 package: Ptot derates linearly with 5.5 mW/K above 60 °C. For DHVQFN16 packages: Ptot derates linearly with 4.5 mW/K above 60 °C. 74HC_HCT4851_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 2 September 2008 5 of 20 NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control 9. Recommended operating conditions Table 5. Symbol VCC VI VSW Tamb ∆t/∆V Recommended operating conditions Parameter supply voltage input voltage switch voltage ambient temperature input transition rise and fall rate VCC = 2.0 V VCC = 3.0 V VCC = 3.3 V VCC = 4.5 V VCC = 6.0 V Conditions Min 2.0 0 0 −40 74HC4851 Typ 6.0 6.0 6.0 6.0 6.0 Max 6.0 VCC VCC +125 1000 800 800 500 400 Min 4.5 0 0 −40 74HCT4851 Typ 5.0 6.0 Max 5.5 VCC VCC +125 500 V V V °C ns/V ns/V ns/V ns/V ns/V Unit 10. Static characteristics Table 6. RON resistance At recommended operating conditions; voltages are referenced to GND (ground 0 V); For test circuit see Figure 8. Symbol Parameter Conditions Min 74HC4851 RON(peak) ON resistance VI = VCC to GND; E = VIL (peak) VCC = 2.0 V; ISW = 2 mA VCC = 3.0 V; ISW ≤ 2 mA VCC = 3.3 V; ISW ≤ 2 mA VCC = 4.5 V; ISW ≤ 2 mA VCC = 6.0 V; ISW ≤ 2 mA ∆RON ON resistance VI = 0.5 × VCC; E = VIL mismatch VCC = 2.0 V; ISW = 2 mA between VCC = 3.0 V; ISW ≤ 2 mA channels VCC = 3.3 V; ISW ≤ 2 mA VCC = 4.5 V; ISW ≤ 2 mA VCC = 6.0 V; ISW ≤ 2 mA 74HCT4851 RON(peak) ON resistance VI = VCC to GND; E = VIL (peak) VCC = 4.5 V; ISW ≤ 2 mA ∆RON ON resistance VI = 0.5 × VCC; E = VIL mismatch VCC = 4.5 V; ISW ≤ 2 mA between channels 76 2 210 8 240 12 270 16 Ω Ω 400 215 120 76 59 4 2 2 2 3 650 330 270 210 195 10 8 8 8 9 670 360 305 240 220 15 12 12 12 13 700 380 345 270 250 20 16 16 16 18 Ω Ω Ω Ω Ω Ω Ω Ω Ω Ω 25 °C Typ Max −40 °C to +85 °C −40 °C to +125 °C Unit Min Max Min Max 74HC_HCT4851_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 2 September 2008 6 of 20 NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control Table 7. Injection current coupling At recommended operating conditions; voltages are referenced to GND (ground 0 V); For test circuit see Figure 9. Symbol Parameter Conditions Min Tamb = −40 °C to +125 °C ∆VO output voltage variation |ISW| ≤ 1 mA; RS ≤ 3.9 kΩ VCC = 3.3 V VCC = 5.0 V |ISW| ≤ 10 mA; RS ≤ 3.9 kΩ VCC = 3.3 V VCC = 5.0 V |ISW| ≤ 1 mA; RS ≤ 20 kΩ VCC = 3.3 V VCC = 5.0 V |ISW| ≤ 10 mA; RS ≤ 20 kΩ VCC = 3.3 V VCC = 5.0 V [1] [2] [3] Typical values are measured at Tamb = 25 °C. ∆VO here is the maximum variation of output voltage of an enabled analog channel when current is injected into any disabled channel. ISW = total current injected into all disabled channels. [2][3] 74HC4851 Typ[1] Max Min 74HCT4851 Typ[1] Max Unit - 0.05 0.03 0.55 0.27 0.04 0.03 0.56 0.48 1 1 5 5 2 2 20 20 - 0.03 0.27 0.03 0.48 1 5 2 20 mV mV mV mV mV mV mV mV Table 8. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground 0 V); 25 °C Symbol Parameter 74HC4851 VIH HIGH-level input voltage control inputs VCC = 2.0 V VCC = 3.0 V VCC = 3.3 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage control inputs VCC = 2.0 V VCC = 3.0 V VCC = 3.3 V VCC = 4.5 V VCC = 6.0 V II input leakage current control inputs; VI = GND or VCC VCC = 6.0 V ±0.1 ±0.1 ±1.0 µA 0.5 0.9 1.0 1.35 1.8 0.5 0.9 1.0 1.35 1.8 0.5 0.9 1.0 1.35 1.8 V V V V V 1.5 2.1 2.3 3.15 4.2 1.5 2.1 2.3 3.15 4.2 1.5 2.1 2.3 3.15 4.2 V V V V V Conditions Min Typ Max −40 °C to +85 °C −40 °C to +125 °C Min Max Min Max Unit 74HC_HCT4851_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 2 September 2008 7 of 20 NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control Table 8. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground 0 V); 25 °C Symbol Parameter IS(OFF) OFF-state leakage current Conditions E = VIH; VI = GND or VCC; VO = VCC or GND; VCC = 6.0 V; see Figure 6 per channel all channels IS(ON) ON-state leakage current supply current E = VIL; VI = GND or VCC; VO = VCC or GND; VCC = 6.0 V; see Figure 7 VI = GND or VCC;VCC = 6.0 V ±0.1 ±0.2 ±0.1 ±0.5 ±2.0 ±0.5 ±1.0 ±4.0 ±1.0 µA µA µA Min Typ Max −40 °C to +85 °C −40 °C to +125 °C Min Max Min Max Unit ICC CI Csw - 2 15 3 2.0 10 40 15 - 5.0 10 40 15 - 20.0 10 40 15 µA pF pF pF input S0, S1, S2 and E capacitance switch Z; OFF-state capacitance Yn; OFF-state HIGH-level input voltage LOW-level input voltage input leakage current OFF-state leakage current control inputs VCC = 4.5 V to 5.5 V control inputs VCC = 4.5 V to 5.5 V control inputs; VI = GND or VCC VCC = 5.5 V E = VIH; VI = GND or VCC; VO = VCC or GND; VCC = 5.5 V; see Figure 6 per channel all channels 74HCT4851 VIH 2.0 2.0 2.0 V VIL - - 0.8 - 0.8 - 0.8 V II - - ±0.1 - ±0.1 - ±1.0 µA IS(OFF) - - ±0.1 ±0.2 ±0.1 - ±0.5 ±2.0 ±0.5 - ±1.0 ±4.0 ±1.0 µA µA µA IS(ON) ON-state leakage current supply current additional supply current E = VIL; VI = GND or VCC; VO = VCC or GND; VCC = 5.5 V; see Figure 7 VI = GND or VCC VCC = 5.5 V control inputs; VI = VCC − 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A ICC ∆ICC - - 2.0 300 - 5.0 370 - 20.0 370 µA µA CI Csw input S0, S1, S2 and E capacitance switch Z; OFF-state capacitance Yn; OFF-state - 2 15 3 10 40 15 - 10 40 15 - 10 40 15 pF pF pF 74HC_HCT4851_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 2 September 2008 8 of 20 NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control VCC selected channel(1) IS VI Yn Z VCC VIH IS VI n.c. E VIL E Yn Yn GND Z IS VO VO any disabled channel GND 001aaf878 001aaf879 (1) Channel is selected by S0, S1 and S2. Fig 6. Test circuit for measuring OFF-state leakage current Fig 7. Test circuit for measuring ON-state leakage current VCC any disabled channel VI(1) VSW ISW Yn V VCC VIL E VI(2) Yn VI Z VIL E Yn RS Z GND ISW selected channel(1) GND VO VI 001aaf880 001aaf881 RON = VSW / ISW. (1) Channel is selected by S0, S1 and S2. VI(1) < GND or VI(1) > VCC. GND < VI(2) < VCC. Fig 8. Test circuit for measuring ON resistance Fig 9. Test circuit for injection current coupling 74HC_HCT4851_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 2 September 2008 9 of 20 NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control 11. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground 0 V); for load circuit see Figure 14. Symbol Parameter 74HC4851 tpd propagation delay Z, Yn to Yn, Z; see Figure 10 VCC = 2.0 V VCC = 3.0 V VCC = 3.3 V VCC = 4.5 V VCC = 6.0 V Sn to Z, Yn; see Figure 11 VCC = 2.0 V VCC = 3.0 V VCC = 3.3 V VCC = 4.5 V VCC = 6.0 V ten enable time E to Z, Yn; see Figure 12 VCC = 2.0 V VCC = 3.0 V VCC = 3.3 V VCC = 4.5 V VCC = 6.0 V tdis disable time E to Z, Yn; see Figure 12 VCC = 2.0 V VCC = 3.0 V VCC = 3.3 V VCC = 4.5 V VCC = 6.0 V CPD power dissipation capacitance per channel; see Figure 12 VCC = 3.3 V VCC = 5.0 V [4] [3] [2] [1] [1] Conditions Min 25 °C Typ Max −40 °C to +85 °C −40 °C to +125 °C Unit Min Max Min Max - 10.0 6.0 5.0 4.0 3.0 25 15.5 14.5 11.5 10 - 29 17.5 16.5 12.5 11 - 32 19.5 18.5 13.5 12 ns ns ns ns ns - 18.0 9.5 8.5 6.5 5.0 32 17.5 16.5 13 12.5 - 35 20 19 15 14.5 - 40 23 22 17 16.5 ns ns ns ns ns - - 95 90 85 80 78 - 105 100 95 90 80 - 115 110 105 100 80 ns ns ns ns ns - - 99 90 85 80 78 - 105 100 95 90 80 - 115 110 105 100 80 ns ns ns ns ns - 28 33 - - - - - pF pF 74HC_HCT4851_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 2 September 2008 10 of 20 NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control Table 9. Dynamic characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground 0 V); for load circuit see Figure 14. Symbol Parameter 74HCT4851 tpd propagation delay Z, Yn to Yn, Z; see Figure 10 VCC = 4.5 V Sn to Z, Yn; see Figure 11 VCC = 4.5 V ten enable time E to Z, Yn; see Figure 12 VCC = 4.5 V tdis disable time E to Z, Yn; see Figure 12 VCC = 4.5 V CPD power dissipation capacitance per channel; see Figure 13 VCC = 5.0 V [1] [2] [3] [4] tpd is the same as tPLH and tPHL. ten is the same as tPZH and tPZL. tdis is the same as tPLZ and tPHZ. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑{(CL + Csw) × VCC2 × fo} where: fi = input frequency in MHz; fo = output frequency in MHz; ∑{(CL + Csw) × VCC2 × fo} = sum of outputs; CL = output load capacitance in pF; Csw = switch capacitance in pF; VCC = supply voltage in V. [4] [3] [2] [1] [1] Conditions Min 25 °C Typ Max −40 °C to +85 °C −40 °C to +125 °C Unit Min Max Min Max 1.6 3.7 11.5 1.1 12.5 1.1 13.5 ns 3.2 8.0 13 2.3 15 2.3 17 ns 4.2 8.6 25 3.0 30 3.0 35 ns 28.5 64.7 80 28.2 90 28 100 ns - 30 - - - - - pF 12. Waveforms VCC Z or Yn input GND tPLH VCC Yn or Z output GND 001aah574 0.5VCC tPHL 0.5VCC Fig 10. Input (Z, Yn) to output (Yn, Z) propagation delays 74HC_HCT4851_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 2 September 2008 11 of 20 NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control VI Sn input GND tPLH VCC Yn or Z output GND VM 001aah575 VM tPHL Measurement points are given in Table 10. Fig 11. Input (Sn) to output (Yn, Z) propagation delays VI E input 0V tPLZ VCC Z or Yn output VOL tPHZ VOH Z or Yn output GND switch ON switch OFF switch ON 001aah576 VM VM tPZL VM VX tPZH VY VM Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 12. Enable and disable times Table 10. Type 74HC4851 74HCT4851 Measurement points Input VM 0.5VCC 1.3 V VI VCC 3.0 V Output VM 0.5VCC 0.5VCC VX VOL + 0.1(VCC − VOL) VOL + 0.1(VCC − VOL) VY 0.9VOH 0.9VOH 74HC_HCT4851_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 2 September 2008 12 of 20 NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control VCC A selected channel Yn G Sn Z E Yn disabled channel GND n.c. 001aah577 Fig 13. Test circuit for measuring power dissipation capacitance 74HC_HCT4851_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 2 September 2008 13 of 20 NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control VI negative pulse 0V tW 90 % VM 10 % tf tr tr tf 90 % VM 10 % tW 001aac221 90 % VM VI positive pulse 0V VM 10 % a. Input pulse definition switch VCC RL VI VO VCC open G DUT RT CL GND 001aaf883 Definitions for test circuit: RL = load resistance. CL = load capacitance including jig and probe capacitance. RT = termination resistance should be equal to the output impedance Zo of the pulse generator. b. Load circuit Test data is given in Table 11. Fig 14. Input pulse definition and load circuit Table 11. Test Test data Input Control E, Sn VI[1] tPHL, tPLH tPHZ, tPZH tPLZ, tPZL CPD [1] Output Switch Yn (Z) VI VCC VCC VCC VCC 6 ns 6 ns 6 ns 6 ns tr, tf Switch Z (Yn) CL 50 pF 50 pF 50 pF 0 pF RL 10 kΩ 10 kΩ - S1 position VCC VCC VCC VCC open GND VCC open For 74HCT4851: input voltage VI = 3.0 V. 74HC_HCT4851_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 2 September 2008 14 of 20 NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control 13. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE vMA Z 16 9 Q A2 pin 1 index θ Lp 1 e bp 8 wM L detail X A1 (A 3) A 0 2.5 scale 5 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT109-1 REFERENCES IEC 076E07 JEDEC MS-012 JEITA EUROPEAN PROJECTION A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 10.0 9.8 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 0.039 0.016 Q 0.7 0.6 0.028 0.020 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3 θ 0.010 0.057 0.069 0.004 0.049 0.019 0.0100 0.39 0.014 0.0075 0.38 0.244 0.041 0.228 0.028 0.004 0.012 8 o 0 o ISSUE DATE 99-12-27 03-02-19 Fig 15. Package outline SOT109-1 (SO16) 74HC_HCT4851_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 2 September 2008 15 of 20 NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 D E A X c y HE vMA Z 16 9 Q A2 pin 1 index A1 θ Lp L (A 3) A 1 e bp 8 wM detail X 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 5.1 4.9 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.40 0.06 θ 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 Fig 16. Package outline SOT403-1 (TSSOP16) 74HC_HCT4851_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 2 September 2008 16 of 20 NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT763-1 16 terminals; body 2.5 x 3.5 x 0.85 mm D B A A A1 E c terminal 1 index area detail X terminal 1 index area e 2 L e1 b 7 vMCAB wM C y1 C C y 1 Eh 16 8 e 9 15 Dh 10 X 2.5 scale 5 mm 0 DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. 1 A1 0.05 0.00 b 0.30 0.18 c 0.2 D (1) 3.6 3.4 Dh 2.15 1.85 E (1) 2.6 2.4 Eh 1.15 0.85 e 0.5 e1 2.5 L 0.5 0.3 v 0.1 w 0.05 y 0.05 y1 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION SOT763-1 REFERENCES IEC --JEDEC MO-241 JEITA --EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 17. Package outline SOT763-1 (DHVQFN16) 74HC_HCT4851_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 2 September 2008 17 of 20 NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control 14. Abbreviations Table 12. Acronym CDM CMOS DUT ESD HBM MM Abbreviations Description Charged Device Model Complementary Metal Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Machine Model 15. Revision history Table 13. Revision history Release date 20080902 Data sheet status Product data sheet Product data sheet Change notice Supersedes 74HC4851_1 Document ID 74HC_HCT4851_2 Modifications: 74HC4851_1 • 74HCT4851 device added. 20070309 74HC_HCT4851_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 2 September 2008 18 of 20 NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control 16. Legal information 16.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 16.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74HC_HCT4851_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 2 September 2008 19 of 20 NXP Semiconductors 74HC4851; 74HCT4851 8-channel analog MUX/DEMUX with injection-current effect control 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . 10 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Contact information. . . . . . . . . . . . . . . . . . . . . 19 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 2 September 2008 Document identifier: 74HC_HCT4851_2