74HCT9115N,112

Important notice Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/, use http://www.nexperia.com Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: - © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT9115 Nine wide Schmitt trigger buffer; open drain outputs Product specification Supersedes data of March 1988 File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specification Nine wide Schmitt trigger buffer; open drain outputs 74HC/HCT9115 The Schmitt trigger action in the data inputs transform slowly changing input signals into sharply defined jitter-free output signals. FEATURES • Schmitt trigger action on all data inputs • Output capability: standard (open drain) The 74HC/HCT9115 have open-drain N-transistor outputs, which are not clamped by a diode connected to VCC. In the OFF-state, i.e. when one input is HIGH, the output may be pulled to any voltage between GND and VOmax. This allows the device to be used as a LOW-to-HIGH or HIGH-to-LOW level shifter. For digital operation and OR-tied output applications, these devices must have a pull-up resistor to establish a logic HIGH level. • ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT9115 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The “9115” is identical to the “9114” but has non-inverting outputs. The 74HC/HCT9115 are nine wide Schmitt trigger buffer with open drain outputs and Schmitt trigger inputs. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC tPHL/ tPLZ propagation delay An to Yn CI input capacitance CPD power dissipation capacitance per buffer CL = 15 pF; VCC = 5 V notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC − 1.5 V ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. December 1990 2 HCT 12 13 ns 3.5 3.5 pF 5 5 pF Philips Semiconductors Product specification Nine wide Schmitt trigger buffer; open drain outputs 74HC/HCT9115 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1, 2, 3, 4, 5, 6, 7, 8, 9 A0 to A8 data inputs 10 GND ground (0 V) 19, 18, 17, 16, 15, 14, 13, 12, 11 Y0 to Y8 data outputs 20 VCC positive supply voltage alfpage 1 2 3 4 5 6 7 8 9 A0 Y0 A1 Y1 A2 Y2 A3 Y3 A4 Y4 A5 Y5 A6 Y6 A7 Y7 A8 Y8 fpage 19 1 19 18 2 18 17 3 17 16 4 16 15 5 15 14 6 14 13 7 13 12 8 12 11 9 11 MBA016 Fig.1 Pin configuration. December 1990 Fig.2 Logic diagram. 3 MBA013 Fig.3 IEC logic diagram. Philips Semiconductors Product specification Nine wide Schmitt trigger buffer; open drain outputs 74HC/HCT9115 Yn handbook, halfpage An GND MBA022 Fig.4 Functional diagram. Fig.5 Logic diagram (one Schmitt trigger). FUNCTION TABLE INPUTS OUTPUTS An Yn L H L Z Notes 1. H = HIGH voltage level L = LOW voltage level Z = high impedance OFF-state December 1990 4 Philips Semiconductors Product specification Nine wide Schmitt trigger buffer; open drain outputs 74HC/HCT9115 DC CHARACTERISTICS FOR 74HC For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Transfer characteristics are given below. Output capability: standard ICC category: MSI TRANSFER CHARACTERISTICS FOR 74HC Voltages are referred to GND (ground = 0 V) Tamb (°C) TEST CONDITIONS 74HC SYMBOL PARAMETER +25 −40 to +85 −40 to +125 min. typ. max. min. max. min. max. UNIT V CC WAVEFORMS (V) VT+ positive-going threshold 0.70 1.75 2.30 1.13 1.50 2.37 3.15 3.11 4.20 0.70 1.75 2.30 1.50 3.15 4.20 0.70 1.75 2.30 1.50 3.15 4.20 V 2.0 4.5 6.0 Fig.6 VT− negative-going threshold 0.30 1.35 1.80 0.70 1.10 1.80 2.40 2.43 3.30 0.30 1.35 1.80 1.10 2.40 3.30 0.30 1.35 1.80 1.10 2.40 3.30 V 2.0 4.5 6.0 Fig.6 VH hysteresis (VT+ − VT−) 0.2 0.4 0.5 0.43 0.80 0.57 1.00 0.68 1.10 0.18 0.40 0.50 0.80 1.00 1.10 0.15 0.40 0.50 0.80 1.00 1.10 V 2.0 4.5 6.0 Fig.6 AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (°C) TEST CONDITIONS 74HC SYMBOL PARAMETER +25 −40 to +85 min. typ. max. min. −40 to +125 max. min. max. UNIT V CC WAVEFORMS (V) tPHL/ tPLZ propagation delay An to Yn 36 13 10 115 22 19 140 28 24 165 33 28 ns 2.0 4.5 6.0 Fig.7 tTHL output transition time 19 7 6 75 15 13 95 19 16 110 22 19 ns 2.0 4.5 6.0 Fig.7 December 1990 5 Philips Semiconductors Product specification Nine wide Schmitt trigger buffer; open drain outputs 74HC/HCT9115 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Transfer characteristics are given below. Output capability: standard ICC category: MSI Note to HCT types The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications. To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below. INPUT UNIT LOAD COEFFICIENT An 0.3 TRANSFER CHARACTERISTICS FOR 74HCT Voltages are referred to GND (ground = 0 V) Tamb (°C) TEST CONDITIONS 74HCT SYMBOL PARAMETER +25 −40 to +85 −40 to +125 min. typ. max. min. max. min. max. UNIT V CC WAVEFORMS (V) VT+ positive-going threshold 0.9 1.2 1.50 2.0 1.70 2.1 0.9 1.2 2.0 2.1 0.9 1.2 2.0 2.1 V 4.5 5.5 Fig.6 VT− negative-going threshold 0.7 0.8 1.06 1.4 1.27 1.7 0.7 0.8 1.4 1.7 0.7 0.8 1.4 2.7 V 4.5 5.5 Fig.6 VH hysteresis (VT+ − VT−) 0.2 0.2 0.44 0.8 0.44 0.8 0.2 0.2 0.8 0.8 0.2 0.2 0.8 0.8 V 4.5 5.5 Fig.6 AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (°C) TEST CONDITIONS 74HCT SYMBOL PARAMETER +25 −40 to +85 −40 to +125 min. typ. max. min. max. min. UNIT V CC WAVEFORMS (V) max. tPHL/ tPLZ propagation delay An to Yn 18 31 39 47 ns 4.5 Fig.7 tTHL output transition time 7 15 19 22 ns 4.5 Fig.7 December 1990 6 Philips Semiconductors Product specification Nine wide Schmitt trigger buffer; open drain outputs 74HC/HCT9115 TRANSFER CHARACTERISTIC WAVEFORMS handbook, halfpage MBA325 VO VI VH VT VT Fig.6 Transfer characteristic. AC WAVEFORMS tr tf handbook, full pagewidth 90 % A n INPUT VM (1) 10 % t PZL t PLZ Yn OUTPUT 10 % t THL MBA023 (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.7 Waveforms showing the input (An) to output (Yn) propagation delays and the output transition times. PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines”. December 1990 7