74LV123N,112

74LV123 Dual retriggerable monostable multivibrator with reset Rev. 7 — 12 December 2011 Product data sheet 1. General description The 74LV123 is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC123; 74HCT123. It is a dual retriggerable monostable multivibrator which uses three methods to control the output pulse width: 1. The basic pulse time is programmed by the selection of an external resistor (REXT) and capacitor (CEXT). These are normally connected as shown in Figure 9. 2. Once triggered, the basic output pulse width may be extended by retriggering the gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made as long as desired (see Figure 12). 3. Alternatively, an output delay can be terminated at any time by a LOW-going edge on input nRD, which also inhibits the triggering (see Figure 13). Schmitt-trigger action in the nA and nB inputs makes the circuit highly tolerant of slower input rise and fall times. 2. Features and benefits         Optimized for low-voltage applications: 1.0 V to 5.5 V Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V Typical output ground bounce: < 0.8 V at VCC = 3.3 V and Tamb = 25 C Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 C DC triggered from active HIGH or active LOW inputs Retriggerable for very long pulses up to 100 % duty factor Direct reset terminates output pulses Schmitt-trigger action on all inputs except for the reset input 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LV123N 40 C to +125 C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4 74LV123D 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74LV123DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; body width SOT338-1 5.3 mm 74LV123PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm 74LV123BQ 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin SOT763-1 quad flat package; no leads; 16 terminals; body 2.5  3.5  0.85 mm SOT403-1 4. Functional diagram 14 15 1 14 1CEXT 6 2CEXT CX RCX 13 & 2 15 1REXT/CEXT 7 2REXT/CEXT 4 3 R S Q 1A 1 2A 9 1B 2 2B 10 13 1Q 5 2Q 6 T 7 Q 4 1Q 9 12 2Q CX RCX 5 & 10 RD 1RD 3 12 2RD 11 11 R 001aae521 Fig 1. Logic symbol 74LV123 Product data sheet 001aae522 Fig 2. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 2 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 14 15 S 1A 1B 1RD Q 1 13 Q 2 2RD 1Q 4 1Q RD 3 6 S 2B 1REXT/CEXT T 7 2A 1CEXT Q 9 5 2CEXT 2REXT/CEXT 2Q T Q 10 12 2Q RD 11 001aaa610 Fig 3. Functional diagram 74LV123 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 3 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset nREXT/CEXT VCC Q RD R Q R CL VCC CL VCC R CL A B CL CL 001aae524 R Fig 4. Logic diagram 74LV123 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 4 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 5. Pinning information 5.1 Pinning 1 1A terminal 1 index area 74LV123 1RD 3 14 1CEXT 1Q 4 13 1Q 2Q 5 12 2Q 2CEXT 6 11 2RD 2REXT/CEXT 7 10 2B GND 8 9 1RD 3 14 1CEXT 1Q 4 13 1Q 2Q 5 12 2Q 2CEXT 6 2REXT/CEXT 7 2A VCC(1) 11 2RD 10 2B 9 15 1REXT/CEXT 15 1REXT/CEXT 2A 16 VCC 2 2 8 1 1B 1B GND 1A 16 VCC 74LV123 001aag650 Transparent top view 001aag678 (1) The die substrate is attached to this pad using conductive die attach material. It cannot be used as a supply pin or input. Fig 5. Pin configuration for DIP16, SO16, SSOP16 and TSSOP16 Fig 6. Pin configuration for DHVQFN16 5.2 Pin description Table 2. 74LV123 Product data sheet Pin description Symbol Pin Description 1A 1 negative-edge triggered input 1 1B 2 positive-edge triggered input 1 1RD 3 direct reset LOW and positive-edge triggered input 1 1Q 4 active LOW output 1 2Q 5 active HIGH output 2 2CEXT 6 external capacitor connection 2 2REXT/CEXT 7 external resistor and capacitor connection 2 GND 8 ground (0 V) 2A 9 negative-edge triggered input 2 2B 10 positive-edge triggered input 2 2RD 11 direct reset LOW and positive-edge triggered input 2 2Q 12 active LOW output 2 1Q 13 active HIGH output 1 1CEXT 14 external capacitor connection 1 1REXT/CEXT 15 external resistor and capacitor connection 1 VCC 16 supply voltage All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 5 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 6. Functional description Table 3. Function table[1] Input Output nRD nA nB nQ nQ L X X L H H[2] H[2] X H X L[2] X X L L[2] H L  H  H  L H [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care;  = LOW-to-HIGH transition;  = HIGH-to-LOW transition; = one HIGH level output pulse = one LOW level output pulse [2] If the monostable multivibrator was triggered before this condition was established, the pulse will continue as programmed. 74LV123 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 6 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +7 V IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V [1] - 20 mA IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V [1] - 50 mA except for pins nREXT/CEXT; VO = 0.5 V to (VCC + 0.5 V) [1] - 25 mA IO output current ICC supply current - +50 mA IGND ground current - 50 mA Tstg storage temperature 65 +150 C Ptot total power dissipation Tamb = 40 C to +125 C DIP16 package [2] - 750 mW SO16 package [3] - 500 mW SSOP16 package [4] - 500 mW TSSOP16 package [4] - 500 mW DHVQFN16 package [5] - 500 mW [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 C. [3] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C. [4] For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 C. [5] For DHVQFN16 package: Ptot derates linearly with 4.5 mW/K above 60 C. 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter VCC supply voltage VI VO Conditions Min Typ Max Unit 1.0 3.3 5.5 V input voltage 0 - VCC V output voltage 0 - VCC V 40 +25 +125 C - - 500 ns/V VCC = 2.0 V to 2.7 V - - 200 ns/V VCC = 2.7 V to 3.6 V - - 100 ns/V VCC = 3.6 V to 5.5 V - - 50 ns/V [1] Tamb ambient temperature in free air t/V input transition rise and fall rate VCC = 1.0 V to 2.0 V [2] [1] The 74LV123 is guaranteed to function down to VCC = 1.0 V (input levels GND or VCC); Section 9 “Static characteristics” are guaranteed from VCC = 1.2 V to VCC = 5.5 V. [2] Except for Schmitt-trigger inputs nA and nB. 74LV123 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 7 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ[1] Max Unit VCC = 1.2 V 0.9 - - V VCC = 2.0 V 1.4 - - V VCC = 2.7 V to 3.6 V 2.0 - - V VCC = 4.5 V to 5.5 V 0.7  VCC - - V VCC = 1.2 V - - 0.3 V VCC = 2.0 V - - 0.6 V VCC = 2.7 V to 3.6 V - - 0.8 V VCC = 4.5 V to 5.5 V - - 0.3  VCC V lO = 100 A; VCC = 1.2 V - 1.2 - V lO = 100 A; VCC = 2.0 V 1.8 2.0 - V lO = 100 A; VCC = 2.7 V 2.5 2.7 - V lO = 100 A; VCC = 3.0 V 2.8 3.0 - V lO = 100 A; VCC = 4.5 V 4.3 4.5 - V lO = 6 mA; VCC = 3.0 V 2.40 2.82 - V lO = 12 mA; VCC = 4.5 V 3.60 4.20 - V IO = 100 A; VCC = 1.2 V - 0 - V IO = 100 A; VCC = 2.0 V - 0 0.2 V IO = 100 A; VCC = 2.7 V - 0 0.2 V IO = 100 A; VCC = 3.0 V - 0 0.2 V IO = 100 A; VCC = 4.5 V - 0 0.2 V IO = 6 mA; VCC = 3.0 V - 0.25 0.40 V IO = 12 mA; VCC = 4.5 V - 0.35 0.55 V Tamb = 40 C to +85 C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL II input leakage current VI = VCC or GND; VCC = 5.5 V - - 1.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 20.0 A ICC additional supply current VI = VCC  0.6 V; VCC = 2.7 V to 3.6 V - - 500 A CI input capacitance - 3.5 - pF VCC = 1.2 V 0.9 - - V VCC = 2.0 V 1.4 - - V VCC = 2.7 V to 3.6 V 2.0 - - V Tamb = 40 C to +125 C VIH VIL HIGH-level input voltage LOW-level input voltage 74LV123 Product data sheet VCC = 4.5 V to 5.5 V 0.7  VCC - - V VCC = 1.2 V - - 0.3 V VCC = 2.0 V - - 0.6 V VCC = 2.7 V to 3.6 V - - 0.8 V VCC = 4.5 V to 5.5 V - - 0.3  VCC V All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 8 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Min Typ[1] Max Unit lO = 100 A; VCC = 1.2 V - - - V Symbol Parameter Conditions VOH VI = VIH or VIL HIGH-level output voltage LOW-level output voltage VOL lO = 100 A; VCC = 2.0 V 1.8 - - V lO = 100 A; VCC = 2.7 V 2.5 - - V lO = 100 A; VCC = 3.0 V 2.8 - - V lO = 100 A; VCC = 4.5 V 4.3 - - V lO = 6 mA; VCC = 3.0 V 2.2 - - V lO = 12 mA; VCC = 4.5 V 3.5 - - V IO = 100 A; VCC = 1.2 V - - - V IO = 100 A; VCC = 2.0 V - - 0.2 V IO = 100 A; VCC = 2.7 V - - 0.2 V IO = 100 A; VCC = 3.0 V - - 0.2 V IO = 100 A; VCC = 4.5 V - - 0.2 V VI = VIH or VIL IO = 6 mA; VCC = 3.0 V - - 0.5 V IO = 12 mA; VCC = 4.5 V - - 0.65 V II input leakage current VI = VCC or GND; VCC = 5.5 V - - 1.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 160 A ICC additional supply current VI = VCC  0.6 V; VCC = 2.7 V to 3.6 V - - 850 A [1] All typical values are measured at Tamb = 25 C. 74LV123 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 9 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; tr = tf  2.5 ns; for test circuit see Figure 8. Symbol Parameter 40 C to +85 C Conditions 40 C to +125 C Unit Min Typ[1] Max Min Max VCC = 1.2 V - 120 - - - ns VCC = 2.0 V - 40 76 - 92 ns VCC = 2.7 V - 30 56 - 68 ns VCC = 3.0 V to 3.6 V - 25 48 - 57 ns - 18 40 - 46 ns VCC = 1.2 V - 100 - - - ns VCC = 2.0 V - 30 57 - 68 ns VCC = 2.7 V - 23 43 - 51 ns VCC = 3.0 V to 3.6 V - 20 38 - 45 ns VCC = 4.5 V to 5.5 V - 14 31 - 36 ns VCC = 2.0 V 30 5 - 40 - ns VCC = 2.7 V 25 3.5 - 30 - ns VCC = 3.0 V to 3.6 V 20 3.0 - 25 - ns VCC = 4.5 V to 5.5 V 15 2.5 - 20 - ns VCC = 2.0 V 30 13 - 40 - ns VCC = 2.7 V 25 8 - 30 - ns VCC = 3.0 V to 3.6 V 20 7 - 25 - ns VCC = 4.5 V to 5.5 V 15 5 - 20 - ns VCC = 2.0 V 35 6 - 45 - ns VCC = 2.7 V 30 5 - 40 - ns VCC = 3.0 V to 3.6 V 25 4 - 30 - ns VCC = 4.5 V to 5.5 V 20 3 - 25 - ns VCC = 2.0 V - 70 - - - ns VCC = 2.7 V - 55 - - - ns VCC = 3.0 V to 3.6 V - 45 - - - ns VCC = 4.5 V to 5.5 V - 40 - - - ns Propagation delay; see Figure 7 tpd propagation delay nRD, nA and nB to nQ [2] VCC = 4.5 V to 5.5 V [2] nRD to nQ (reset) Inputs nA, nB and nRD; see Figure 7 tW pulse width nA = LOW nB = HIGH nRD = LOW; see Figure 13 trtrig retrigger time 74LV123 Product data sheet nB to nA; see Figure 12 All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 10 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset Table 7. Dynamic characteristics …continued GND = 0 V; tr = tf  2.5 ns; for test circuit see Figure 8. Symbol Parameter 40 C to +85 C Conditions 40 C to +125 C Unit Min Typ[1] Max Min Max VCC = 2.0 V - 470 - - - ns VCC = 2.7 V - 460 - - - ns VCC = 3.0 V to 3.6 V - 450 - - - ns VCC = 4.5 V to 5.5 V - 430 - - - ns VCC = 2.0 V - 100 - - - ns VCC = 2.7 V - 90 - - - ns VCC = 3.0 V to 3.6 V - 80 - - - ns VCC = 4.5 V to 5.5 V - 70 - - - ns VCC = 1.2 V 10 - 1000 - - k VCC = 2.0 V 5 - 1000 - - k VCC = 2.7 V 3 - 1000 - - k VCC = 3.0 V to 3.6 V 2 - 1000 - - k 2 - 1000 - - k VCC = 1.2 V - - - - - pF VCC = 2.0 V - - - - - pF VCC = 2.7 V - - - - - pF VCC = 3.0 V to 3.6 V - - - - - pF VCC = 4.5 V to 5.5 V - - - - - pF - 60 - - - pF Outputs; nQ = LOW and nQ = HIGH, see Figure 7 tW pulse width CEXT = 100 nF; REXT = 10 k CEXT = 0 pF; REXT = 5 k External components REXT external resistance [3] see Figure 11 VCC = 4.5 V to 5.5 V CEXT external capacitance [3][4] see Figure 11 Dynamic power dissipation power dissipation VCC = 3.3 V; VI = GND to VCC capacitance CPD [1] [5] All typical values are measured at Tamb = 25 C and nominal supply values (VCC = 3.3 V and 5.0 V). [2] tpd is the same as tPLH and tPHL; CEXT = 0 pF; REXT = 5 k. [3] For other REXT and CEXT combinations see Figure 11 and Section 12.1.1 “Basic timing”. [4] CEXT has no limits. [5] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of the outputs. 74LV123 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 11 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 11. Waveforms nB input (nA LOW) VM tW VM nA input (nB HIGH) tW RESET VM nRD input tPLH nQ output tPLH tW VM tPHL tW nQ output tPLH tW VM tPHL tPHL tPLH tPHL 001aae528 Measurement points are given in Table 8. Fig 7. Table 8. Propagation delays from inputs (nA, nB, nRD) to outputs (nQ, nQ) Measurement points VCC VM 2.7 V 1.5 V < 2.7 V 0.5  VCC VCC PULSE GENERATOR VI VO DUT RT CL 50 pF RL 1 kΩ 001aae533 Test data is given in Table 9. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to Zo of the pulse generator. Fig 8. Load circuitry for switching times 74LV123 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 12 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset Table 9. Test data Supply voltage Input VCC VI Load tr, tf Test CL RL < 2.7 V VCC  2.5 ns 50 pF 1 k tPHL, tPLH 2.7 V to 3.6 V 2.7 V  2.5 ns 50 pF 1 k tPHL, tPLH  4.5 V VCC  2.5 ns 50 pF 1 k tPHL, tPLH 12. Application information 12.1 Timing components 12.1.1 Basic timing The basic output pulse width is essentially determined by the values of the external timing components REXT and CEXT. (1) CEXT REXT VCC GND nCEXT 8 14 (6) nREXT/CEXT 15 (7) 13 (5) 74LV123 nA nB nQ 1 (9) 2 (10) 4 (12) nQ 3 (11) nRD 001aae525 (1) For minimum noise generation it is recommended to ground pins 6 (2CEXT) and 14 (1CEXT) externally to pin 8 (GND). Fig 9. Timing components connections If CEXT > 10 nF, the following formula is valid: tW = K  REXT  CEXT (typ.) where: tW = output pulse width in ns REXT = external resistor in k CEXT = external capacitor in pF K = constant: this is 0.45 for VCC = 5.0 V and 0.48 for VCC = 2.0 V (see Figure 10) The inherent test jig and pin capacitance at pin 15 and pin 7 (nREXT/CEXT) is approximately 7 pF. 74LV123 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 13 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 001aae529 0.8 001aae530 106 tW (ns) 'K' factor 105 REXT = 100 kΩ 50 kΩ 10 kΩ 2 kΩ 0.6 104 0.4 103 0.2 102 0 0 0 2 4 6 102 10 1 103 104 Cext (pF) VCC (V) VCC = 3.3 V and Tamb = 25 C CEXT = 10 nF; REXT = 10 k to 100 k Fig 10. Typical ‘K’ factor as a function of VCC Fig 11. Typical output pulse width as a function of the external capacitance values 12.1.2 Retrigger timing The time to retrigger the monostable multivibrator depends on the values of REXT and CEXT. The output pulse width will only be extended when the time between the active going edges of the trigger pulses meets the minimum retrigger time. If CEXT > 10 pF, the next formula for the set-up time of a retrigger pulse is valid: at VCC = 5.0 V: trtrig = 30 + 0.19REXT  CEXT0.9 + 13  REXT1.05 (typ.) at VCC = 3.0 V: trtrig = 41 + 0.15REXT  CEXT0.9  1  REXT (typ.) where: trtrig = retrigger time in ns CEXT = external capacitor in pF REXT = external resistor in k nB input tW nA input trtrig tW nQ output tW tW 001aae526 nRD = HIGH Fig 12. Output pulse control using retrigger pulse nA 74LV123 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 14 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 12.1.3 Reset timing nB input nRD input nQ output tW tW 001aae527 nA = LOW Fig 13. Output pulse control using reset input nRD 12.2 Power considerations 12.2.1 Power-up When the monostable multivibrator is powered-up, it may produce an output pulse with a pulse width defined by the values of REXT and CEXT. This output pulse can be eliminated using the RC circuit on pin nRD shown in Figure 14. 12.2.2 Power-down A large capacitor (CEXT) may cause problems when powering-down the monostable due to the energy stored in this capacitor. When a system containing this device is powered-down or a rapid decrease of VCC to zero occurs, the monostable may sustain damage, due to the capacitor discharging through the input protection diodes. To avoid this possibility, connect a damping diode DEXT (preferably a germanium or Schottky type diode) able to withstand large current surges - see Figure 14. DEXT CEXT REXT VCC GND nCEXT nREXT/CEXT 8 14 (6) 15 (7) 13 (5) 74LV123 nA nB nQ 1 (9) 2 (10) 4 (12) nQ 3 (11) nRD RESET VCC 001aae532 Fig 14. Power-up and power-down circuit 74LV123 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 15 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 13. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b b2 MH 9 16 pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 b2 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.30 0.53 0.38 1.25 0.85 0.36 0.23 19.50 18.55 6.48 6.20 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 0.76 inches 0.17 0.02 0.13 0.068 0.051 0.021 0.015 0.049 0.033 0.014 0.009 0.77 0.73 0.26 0.24 0.1 0.3 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.03 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 95-01-14 03-02-13 SOT38-4 Fig 15. Package outline SOT38-4 (DIP16) 74LV123 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 16 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.039 0.016 0.028 0.020 inches 0.010 0.057 0.069 0.004 0.049 0.16 0.15 0.05 0.244 0.041 0.228 0.01 0.01 0.028 0.004 0.012 θ 8o o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 16. Package outline SOT109-1 (SO16) 74LV123 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 17 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm D SOT338-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 8 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.00 0.55 8o o 0 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 REFERENCES IEC JEDEC JEITA MO-150 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 17. Package outline SOT338-1 (SSOP16) 74LV123 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 18 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 E D A X c y HE v M A Z 9 16 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.40 0.06 8o o 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC JEITA MO-153 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 Fig 18. Package outline SOT403-1 (TSSOP16) 74LV123 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 19 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT763-1 16 terminals; body 2.5 x 3.5 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 7 y y1 C v M C A B w M C b L 1 8 Eh e 16 9 15 10 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. A1 b 1 0.05 0.00 0.30 0.18 c D (1) Dh E (1) Eh 0.2 3.6 3.4 2.15 1.85 2.6 2.4 1.15 0.85 e 0.5 e1 L v w y y1 2.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT763-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 19. Package outline SOT736-1 (DHVQFN16) 74LV123 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 20 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 14. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LV123 v.7 20111212 Product data sheet - 74LV123 v.6 Modifications: • Legal pages updated. 74LV123 v.6 20110826 Product data sheet - 74LV123 v.5 74LV123 v.5 20071108 Product data sheet - 74LV123 v.4 74LV123 v.4 20070919 Product specification - 74LV123 v.3 74LV123 v.3 20030313 Product specification - 74LV123 v.2 74LV123 v.2 19980420 Product specification - 74LV123 v.1 74LV123 v.1 19970204 Product specification - - 74LV123 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 21 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 15.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 74LV123 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 22 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74LV123 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 12 December 2011 © NXP B.V. 2011. All rights reserved. 23 of 24 74LV123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 12.1 12.1.1 12.1.2 12.1.3 12.2 12.2.1 12.2.2 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 Functional description . . . . . . . . . . . . . . . . . . . 6 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7 Recommended operating conditions. . . . . . . . 7 Static characteristics. . . . . . . . . . . . . . . . . . . . . 8 Dynamic characteristics . . . . . . . . . . . . . . . . . 10 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Application information. . . . . . . . . . . . . . . . . . 13 Timing components . . . . . . . . . . . . . . . . . . . . 13 Basic timing . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Retrigger timing . . . . . . . . . . . . . . . . . . . . . . . 14 Reset timing . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Power considerations . . . . . . . . . . . . . . . . . . . 15 Power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Power-down . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 21 Legal information. . . . . . . . . . . . . . . . . . . . . . . 22 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 22 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Contact information. . . . . . . . . . . . . . . . . . . . . 23 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 12 December 2011 Document identifier: 74LV123