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74LV164PW,112

74LV164PW,112

  • 厂商:

    NXP(恩智浦)

  • 封装:

    TSSOP

  • 描述:

    IC 8BIT SHIFT REGISTER 14TSSOP

  • 数据手册
  • 价格&库存
74LV164PW,112 数据手册
74LV164 8-bit serial-in/parallel-out shift register Rev. 6 — 15 September 2021 Product data sheet 1. General description The 74LV164 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data entry through the other input. Data is shifted on the LOW-to-HIGH transition of the clock input (CP). A LOW on the master reset input (MR) clears the register and forces all outputs LOW, independently of other inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC. 2. Features and benefits • • • • • • • • • • • • Wide supply voltage range from 1.0 V to 5.5 V CMOS low power dissipation Optimized for low-voltage applications: 1.0 V to 3.6 V Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V Typical VOLP (output ground bounce): < 0.8 V at VCC = 3.3 V and Tamb = 25 °C Typical VOHV (output VOH undershoot): > 2 V at VCC = 3.3 V and Tamb = 25 °C Gated serial data inputs Asynchronous master reset Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: • JESD8-7 (1.65 V to 1.95 V) • JESD8-5 (2.3 V to 2.7 V) • JESD8C (2.7 V to 3.6 V) • JESD36 (4.5 V to 5.5 V) ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V Specified from -40 °C to +80 °C and from -40 °C to +125 °C. 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LV164D -40 °C to +125 °C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 74LV164PW -40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 74LV164BQ -40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm SOT762-1 74LV164 Nexperia 8-bit serial-in/parallel-out shift register 4. Functional diagram SRG8 8 C1/ 9 R 1 2 & 1D 3 4 DSA DSB 1 2 CP 8 MR 9 5 3 Q0 4 Q1 6 5 Q2 6 Q3 10 10 Q4 11 11 Q5 12 12 Q6 13 Q7 13 001aac424 001aac423 Fig. 1. Logic symbol Fig. 2. 1 2 DSA DSB 8-BIT SERIAL- IN/PARALLEL- OUT SHIFT REGISTER 8 CP 9 MR IEC logic symbol 3 4 5 6 10 11 12 13 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 001aac425 Fig. 3. Functional diagram 5. Pinning information 5.1. Pinning 1 terminal 1 index area 4 Q2 5 DSA 1 14 VCC DSB 2 13 Q7 Q3 6 Q0 3 12 Q6 Q1 4 11 Q5 Q2 5 10 Q4 Q3 6 9 MR GND 7 8 CP Pin configuration SOT108-1 (SO14) and SOT402-1 (TSSOP14) 74LV164 Product data sheet 10 Q4 9 MR 001aac429 Transparent top view (1) This is not a supply pin. There is no electrical or mechanical requirement to solder the pad. In case soldered, the solder land should remain floating or connected to VCC. 001aac422 Fig. 4. 11 Q5 VCC(1) 8 Q1 74LV164 13 Q7 12 Q6 CP 3 7 2 Q0 GND DSB 14 VCC DSA 74LV164 Fig. 5. Pin configuration SOT762-1 (DHVQFN14) All information provided in this document is subject to legal disclaimers. Rev. 6 — 15 September 2021 © Nexperia B.V. 2021. All rights reserved 2 / 15 74LV164 Nexperia 8-bit serial-in/parallel-out shift register 5.2. Pin description Table 2. Pin description Symbol Pin Description DSA 1 data input SA DSB 2 data input SB Q0 3 output 0 Q1 4 output 1 Q2 5 output 2 Q3 6 output 3 GND 7 ground (0 V) CP 8 clock input (edge triggered LOW-to-HIGH) MR 9 master reset input (active LOW) Q4 10 output 4 Q5 11 output 5 Q6 12 output 6 Q7 13 output 7 VCC 14 supply voltage 6. Functional description Table 3. Function table H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition; L = LOW voltage level; l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition; q = lower case letter indicates the state of referenced input one set-up time prior to the LOW-to-HIGH CP transition; ↑ = LOW-to-HIGH clock transition. Operating mode Input Output MR CP DSA DSB Q0 Q1 to Q7 Reset (clear) L X X X L L to L Shift H ↑ l l L q0 to q6 H ↑ l h L q0 to q6 H ↑ h l L q0 to q6 H ↑ h h H q0 to q6 74LV164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 15 September 2021 © Nexperia B.V. 2021. All rights reserved 3 / 15 74LV164 Nexperia 8-bit serial-in/parallel-out shift register 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Min Max Unit VCC supply voltage -0.5 +7.0 V IIK input clamping current VI < -0.5 V or VI > VCC + 0.5 V [1] - ±20 mA IOK output clamping current VO < -0.5 V or VO > VCC + 0.5 V IO output current VO = -0.5 V to (VCC + 0.5 V) [1] - ±50 mA - ±25 mA ICC supply current - 50 mA IGND ground current -50 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 500 mW [1] [2] Conditions Tamb = -40 °C to +125 °C [2] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SOT108-1 (SO14) package: Ptot derates linearly with 10.1 mW/K above 100 °C. For SOT402-1 (TSSOP14) package: Ptot derates linearly with 7.3 mW/K above 81 °C. For SOT762-1 (DHVQFN14) package: Ptot derates linearly with 9.6 mW/K above 98 °C. 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Min Typ Max Unit 1.0 3.3 5.5 V VI input voltage 0 - VCC V VO output voltage 0 - VCC V Tamb ambient temperature -40 +25 +125 °C Δt/ΔV input transition rise and fall rate VCC = 1.0 V to 2.0 V - - 500 ns/V VCC = 2.0 V to 2.7 V - - 200 ns/V VCC = 2.7 V to 3.6 V - - 100 ns/V VCC = 3.6 V to 5.5 V - - 50 ns/V [1] Conditions [1] The static characteristics are guaranteed from VCC = 1.2 V to VCC = 5.5 V, but LV devices are guaranteed to function down to VCC = 1.0 V (with input levels GND or VCC). 74LV164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 15 September 2021 © Nexperia B.V. 2021. All rights reserved 4 / 15 74LV164 Nexperia 8-bit serial-in/parallel-out shift register 9. Static characteristics Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH HIGH-level input voltage VIL LOW-level input voltage VOH VOL HIGH-level output voltage LOW-level output voltage Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ[1] Max Min Max VCC = 1.2 V 0.9 - - 0.9 - V VCC = 2.0 V 1.4 - - 1.4 - V VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V VCC = 4.5 V to 5.5 V 0.7VCC - - 0.7VCC - V VCC = 1.2 V - - 0.3 - 0.3 V VCC = 2.0 V - - 0.6 - 0.6 V VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V VCC = 4.5 V to 5.5 V - - 0.3VCC - IO = -100 μA; VCC = 1.2 V - 1.2 - - - V IO = -100 μA; VCC = 2.0 V 1.8 2.0 - 1.8 - V IO = -100 μA; VCC = 2.7 V 2.5 2.7 - 2.5 - V IO = -100 μA; VCC = 3.0 V 2.8 3.0 - 2.8 - V IO = -100 μA; VCC = 4.5 V 4.3 4.5 - 4.3 - V IO = -6 mA; VCC = 3.0 V 2.4 2.82 - 2.2 - V IO = -12 mA; VCC = 4.5 V 3.6 4.2 - 3.5 - V IO = 100 μA; VCC = 1.2 V - 0 - - - V IO = 100 μA; VCC = 2.0 V - 0 0.2 - 0.2 V IO = 100 μA; VCC = 2.7 V - 0 0.2 - 0.2 V IO = 100 μA; VCC = 3.0 V - 0 0.2 - 0.2 V IO = 100 μA; VCC = 4.5 V - 0 0.2 - 0.2 V IO = 6 mA; VCC = 3.0 V - 0.25 0.40 - 0.50 V IO = 12 mA; VCC = 4.5 V - 0.35 0.55 - 0.65 V 0.3VCC V VI = VIH or VIL VI = VIH or VIL II input leakage current VI = VCC or GND; VCC = 5.5 V - - 1.0 - 1.0 μA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 20.0 - 160 μA ΔICC additional supply current per input; VI = VCC - 0.6 V; VCC = 2.7 V to 3.6 V - - 500 - 850 μA CI input capacitance - 3.5 - - - pF [1] Typical values are measured at Tamb = 25 °C. 74LV164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 15 September 2021 © Nexperia B.V. 2021. All rights reserved 5 / 15 74LV164 Nexperia 8-bit serial-in/parallel-out shift register 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; For test circuit see Fig. 9. Symbol Parameter tpd tPHL propagation delay HIGH to LOW propagation delay Conditions -40 °C to +85 °C Min Typ[1] VCC = 1.2 V - VCC = 2.0 V - VCC = 2.7 V VCC = 3.3 V; CL = 15 pF CP to Qn; see Fig. 6 pulse width Unit Max Min Max 75 - - - ns 26 39 - 49 ns - 19 29 - 36 ns - 12 - - - ns [2] VCC = 3.0 V to 3.6 V [3] - 14 23 - 29 ns VCC = 4.5 V to 5.5 V [3] - 12 19 - 24 ns VCC = 1.2 V - 75 - - - ns VCC = 2.0 V - 26 39 - 49 ns VCC = 2.7 V - 19 29 - 36 ns MR to Qn; see Fig. 7 VCC = 3.3 V; CL = 15 pF tW -40 °C to +125 °C - 12 - - - ns VCC = 3.0 V to 3.6 V [3] - 14 23 - 29 ns VCC = 4.5 V to 5.5 V [3] - 12 19 - 24 ns 34 9 - 41 - ns CP; see Fig. 6 VCC = 2.0 V VCC = 2.7 V 25 6 - 30 - ns VCC = 3.0 V to 3.6 V [3] 20 5 - 24 - ns VCC = 4.5 V to 5.5 V [3] 13 4 - 16 - ns 34 10 - 41 - ns MR; Fig. 7 VCC = 2.0 V VCC = 2.7 V trec tsu recovery time set-up time 74LV164 Product data sheet 25 8 - 30 - ns VCC = 3.0 V to 3.6 V [3] 20 6 - 24 - ns VCC = 4.5 V to 5.5 V [3] 13 5 - 16 - ns VCC = 1.2 V - 30 - - - ns VCC = 2.0 V 19 10 - 24 - ns VCC = 2.7 V 14 8 - 18 - ns MR to CP; see Fig. 7 VCC = 3.0 V to 3.6 V [3] 11 6 - 14 - ns VCC = 4.5 V to 5.5 V [3] 8 5 - 10 - ns VCC = 1.2 V - 15 - - - ns VCC = 2.0 V 22 5 - 26 - ns VCC = 2.7 V 16 4 - 19 - ns Dn to CP; see Fig. 8 VCC = 3.0 V to 3.6 V [3] 13 3 - 15 - ns VCC = 4.5 V to 5.5 V [3] 9 2 - 10 - ns All information provided in this document is subject to legal disclaimers. Rev. 6 — 15 September 2021 © Nexperia B.V. 2021. All rights reserved 6 / 15 74LV164 Nexperia 8-bit serial-in/parallel-out shift register Symbol Parameter th Conditions Min Typ[1] Max VCC = 1.2 V - -10 VCC = 2.0 V 5 -3 VCC = 2.7 V 5 Min Max - - - ns - 5 - ns -2 - 5 - ns VCC = 3.0 V to 3.6 V [3] 5 -2 - 5 - ns VCC = 4.5 V to 5.5 V [3] 5 -1 - 5 - ns VCC = 2.0 V 14 40 - 12 - MHz VCC = 2.7 V 19 58 - 16 - MHz - 78 - - - MHz VCC = 3.3 V; CL = 15 pF [1] [2] [3] [4] Unit see Fig. 6 maximum frequency CPD -40 °C to +125 °C Dn to CP; see Fig. 8 hold time fmax -40 °C to +85 °C power dissipation capacitance VCC = 3.0 V to 3.6 V [3] 24 70 - 20 - MHz VCC = 4.5 V to 5.5 V [3] 36 100 - 30 - MHz VCC = 3.3 V; CL = 50 pF; fi = 1 MHz; VI = GND to VCC [4] - 40 - - - pF All typical values are measured at Tamb = 25 °C. tpd is the same as tPLH and tPHL. Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V). CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD x VCC x fi x N + Σ(CL x VCC x fo) where: fi = input frequency in MHz, fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in V N = number of inputs switching 2 Σ(CL x VCC x fo) = sum of the outputs. 10.1. Waveforms and test circuit 1/fmax VI CP input VM GND tW t PHL t PLH VOH VM Qn output VOL 001aac426 Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 6. Propagation delay clock (CP) to output (Qn), clock pulse width and maximum clock frequency 74LV164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 15 September 2021 © Nexperia B.V. 2021. All rights reserved 7 / 15 74LV164 Nexperia 8-bit serial-in/parallel-out shift register VI VM MR input GND tW trec VI CP input VM GND tPHL VOH VM Qn output VOL 001aac427 Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 7. Pulse width master reset (MR), propagation delay master reset (MR) to output (Qn) and the master reset (MR) to clock (CP) recovery time VI VM CP input GND t su t su th th VI VM Dn input GND VOH VM Qn output VOL 001aac428 Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. The shaded areas indicate when the input is permitted to change for predictable output performance. Fig. 8. Data set-up and hold times inputs (Dn) to clock (CP) Table 8. Measurement points Supply voltage Input Output VCC VM VM 1.2 V 0.5 x VCC 0.5 x VCC 2.0 V 0.5 x VCC 0.5 x VCC 2.7 V 1.5 V 1.5 V 3.0 V to 3.6 V 1.5 V 1.5 V 4.5 V to 5.5 V 0.5 x VCC 0.5 x VCC 74LV164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 15 September 2021 © Nexperia B.V. 2021. All rights reserved 8 / 15 74LV164 Nexperia 8-bit serial-in/parallel-out shift register VCC VI PULSE GENERATOR VO DUT CL 50 pF RT RL 1 kΩ 001aaa663 Test data is given in Table 9. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. Fig. 9. Test circuit for measuring switching times Table 9. Test data Supply voltage Input VCC VI tr , tf CL RL 1.2 V VCC ≤ 2.5 ns 50 pF 1 kΩ tPHL, tPLH 2.0 V VCC ≤ 2.5 ns 50 pF 1 kΩ tPHL, tPLH 2.7 V 2.7 V ≤ 2.5 ns 50 pF 1 kΩ tPHL, tPLH 3.0 V to 3.6 V 2.7 V ≤ 2.5 ns 50 pF, 15 pF 1 kΩ tPHL, tPLH 4.5 V to 5.5 V VCC ≤ 2.5 ns 50 pF 1 kΩ tPHL, tPLH 74LV164 Product data sheet Load All information provided in this document is subject to legal disclaimers. Rev. 6 — 15 September 2021 Test © Nexperia B.V. 2021. All rights reserved 9 / 15 74LV164 Nexperia 8-bit serial-in/parallel-out shift register 11. Package outline SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 A2 Q A (A 3) A1 pin 1 index θ Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 inches 0.069 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.35 0.014 0.0075 0.34 0.16 0.15 0.05 0.01 0.01 0.004 0.028 0.012 0.244 0.039 0.028 0.041 0.228 0.016 0.024 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT108-1 076E06 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig. 10. Package outline SOT108-1 (SO14) 74LV164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 15 September 2021 © Nexperia B.V. 2021. All rights reserved 10 / 15 74LV164 Nexperia 8-bit serial-in/parallel-out shift register TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm D SOT402-1 E A X c y HE v M A Z 8 14 Q A2 pin 1 index (A 3 ) A1 A θ Lp 1 L 7 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.72 0.38 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Fig. 11. Package outline SOT402-1 (TSSOP14) 74LV164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 15 September 2021 © Nexperia B.V. 2021. All rights reserved 11 / 15 74LV164 Nexperia 8-bit serial-in/parallel-out shift register DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 3 x 0.85 mm B D SOT762-1 A A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e v w b 2 6 C A B C y y1 C L 1 7 14 8 Eh e k 13 9 Dh X k 0 2 Dimensions (mm are the original dimensions) Unit mm max nom min A(1) 1 A1 b 0.05 0.30 0.02 0.25 0.00 0.18 4 mm scale c D(1) Dh E(1) Eh e e1 0.2 3.1 3.0 2.9 1.65 1.50 1.35 2.6 2.5 2.4 1.15 1.00 0.85 0.5 2 k L v 0.2 0.5 0.4 0.3 0.1 w y 0.05 0.05 y1 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. Outline version SOT762-1 References IEC JEDEC JEITA sot762-1_po European projection Issue date 15-04-10 15-05-05 MO-241 Fig. 12. Package outline SOT762-1 (DHVQFN14) 74LV164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 15 September 2021 © Nexperia B.V. 2021. All rights reserved 12 / 15 74LV164 Nexperia 8-bit serial-in/parallel-out shift register 12. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 13. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LV164 v.6 20210915 Product data sheet - 74LV164 v.5 Modifications: • • 74LV164 v.5 20200915 Modifications: • • • • Type number 74LV164DB (SOT337-1/SSPO14) removed. Section 1 and Section 2 updated. 20151209 Modifications: • 74LV164 v.3 20050204 Modifications: • Product data sheet Product data sheet - 74LV164 v.3 - 74LV164 v.2 The format of this data sheet has been redesigned to comply with the current presentation and information standard of Philips Semiconductors Added: type number 74LV164BQ (DHVQFN14 package). 19980507 Product specification 74LV164 v.1 19970328 Product specification Product data sheet 74LV164 v.4 Type number 74LV164N (SOT27-1) removed. 74LV164 v.2 74LV164 - The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Section 2 updated. Table 4: Derating values for Ptot total power dissipation have been updated. 74LV164 v.4 • Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 6 — 15 September 2021 74LV164 v.1 - © Nexperia B.V. 2021. All rights reserved 13 / 15 74LV164 Nexperia 8-bit serial-in/parallel-out shift register 14. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 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Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal 74LV164 Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 6 — 15 September 2021 © Nexperia B.V. 2021. All rights reserved 14 / 15 74LV164 Nexperia 8-bit serial-in/parallel-out shift register Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................1 4. Functional diagram.......................................................2 5. Pinning information......................................................2 5.1. Pinning.........................................................................2 5.2. Pin description............................................................. 3 6. Functional description................................................. 3 7. Limiting values............................................................. 4 8. Recommended operating conditions..........................4 9. Static characteristics....................................................5 10. Dynamic characteristics............................................ 6 10.1. Waveforms and test circuit........................................ 7 11. Package outline........................................................ 10 12. Abbreviations............................................................ 13 13. Revision history........................................................13 14. Legal information......................................................14 © Nexperia B.V. 2021. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 15 September 2021 74LV164 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 15 September 2021 © Nexperia B.V. 2021. All rights reserved 15 / 15
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