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74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin, 30 series termination
resistors; 5 V tolerant input/output; 3-state
Rev. 6 — 23 November 2011
Product data sheet
1. General description
The 74LVC162245A; 74LVCH162245A are 16-bit transceivers with non-inverting 3-state
bus compatible outputs in both send and receive directions. Two send/receive (nDIR)
inputs control direction, and two output enable (nOE) inputs make cascading easy. The
nOE inputs control the outputs so that the buses are effectively isolated. This device can
be used as two 8-bit transceivers or one 16-bit transceiver.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be
applied to the outputs. These features allow the use of these devices as translators in
mixed 3.3 V and 5 V applications.
The 74LVCH162245A bus hold on data inputs eliminates the need for external pull-up
resistors to hold unused inputs.
Both HIGH and LOW output stages include 30 series termination resistors to reduce
line noise.
2. Features and benefits
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Multibyte flow-through standard pin-out architecture
Low inductance multiple power and ground pins for minimum noise and ground
bounce
Direct interface with TTL levels
Integrated 30 termination resistors
High-impedance when VCC = 0 V
All data inputs have bus hold (74LVCH162245A only)
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from 40 C to +85 C and from 40 C to +125 C
74LVC162245A; 74LVCH162245A
NXP Semiconductors
16-bit transceiver with direction pin; 30 resistors; 3-state
3. Ordering information
Table 1.
Ordering information
Type number
Package
74LVC162245ADL
Temperature range
Name
Description
Version
40 C to +125 C
SSOP48
plastic shrink small outline package; 48 leads;
body width 7.5 mm
SOT370-1
40 C to +125 C
TSSOP48
plastic thin shrink small outline package;
48 leads; body width 6.1 mm
SOT362-1
74LVCH162245ADL
74LVC162245ADGG
74LVCH162245ADGG
4. Functional diagram
1DIR
1
2DIR
48
1A0
1A1
2A0
20
2A6
22
2A7
12
2B5
27
1B6
37
2B4
29
1B5
38
11
1A7
19
2A5
2B3
30
1B4
40
9
1A6
17
2A4
2B2
32
1B3
41
8
1A5
16
2A3
2B1
33
1B2
43
6
1A4
14
2A2
2B0
35
1B1
44
5
1A3
13
2A1
2OE
36
1B0
46
3
1A2
25
1OE
47
2
24
2B6
26
1B7
23
2B7
mna708
Fig 1.
Logic symbol
74LVC_LVCH162245A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 23 November 2011
© NXP B.V. 2011. All rights reserved.
2 of 16
NXP Semiconductors
74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 resistors; 3-state
1OE
1DIR
48
1
25
2OE
24
2DIR
1A0
1A1
1A2
1A3
1A4
1A5
1A6
1A7
2A0
47
G3
3EN1 [BA]
3EN2 [AB]
G6
6EN4 [BA]
6EN5 [AB]
2
1
2
46
3
44
5
43
6
41
8
40
9
38
11
37
12
36
13
4
1B0
1B1
1B2
1B3
1B4
1B5
1B6
1B7
2B0
5
2A1
2A2
2A3
2A4
2A5
2A6
2A7
35
14
33
16
32
17
30
19
29
20
27
22
26
23
2B1
2B2
2B3
2B4
2B5
2B6
2B7
mna709
Fig 2.
IEC logic symbol
VCC
data input
to internal circuit
mna705
Fig 3.
Bus hold circuit
74LVC_LVCH162245A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 23 November 2011
© NXP B.V. 2011. All rights reserved.
3 of 16
74LVC162245A; 74LVCH162245A
NXP Semiconductors
16-bit transceiver with direction pin; 30 resistors; 3-state
5. Pinning information
5.1 Pinning
74LVC162245A
74LVCH162245A
1DIR
1
48 1OE
1B0
2
47 1A0
1B1
3
46 1A1
GND
4
45 GND
1B2
5
44 1A2
1B3
6
43 1A3
VCC
7
42 VCC
1B4
8
41 1A4
1B5
9
40 1A5
GND 10
39 GND
1B6 11
38 1A6
1B7 12
37 1A7
2B0 13
36 2A0
2B1 14
35 2A1
GND 15
34 GND
2B2 16
33 2A2
2B3 17
32 2A3
VCC 18
31 VCC
2B4 19
30 2A4
2B5 20
29 2A5
GND 21
28 GND
2B6 22
27 2A6
2B7 23
26 2A7
2DIR 24
25 2OE
001aaa156
Fig 4.
Pin configuration SSOP48 and TSSOP48
5.2 Pin description
Table 2.
Pin description
Name
Pin
Description
1DIR
1
direction control input
2DIR
24
direction control input
GND
4, 10, 15, 21, 28, 34, 39, 45
ground (0 V)
VCC
7, 18, 31, 42
supply voltage
1OE
48
output enable input (active LOW)
2OE
25
output enable input (active LOW)
1A[0:7]
47, 46, 44, 43, 41, 40, 38, 37
data input/output
2A[0:7]
36, 35, 33, 32, 30, 29, 27, 26
data input/output
1B[0:7]
2, 3, 5, 6, 8, 9, 11, 12
data input/output
2B[0:7]
13, 14, 16, 17, 19, 20, 22, 23
data input/output
74LVC_LVCH162245A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 23 November 2011
© NXP B.V. 2011. All rights reserved.
4 of 16
74LVC162245A; 74LVCH162245A
NXP Semiconductors
16-bit transceiver with direction pin; 30 resistors; 3-state
6. Functional description
Table 3.
Function table[1]
Input
Output
nOE
nDIR
nAn
nBn
L
L
A=B
inputs
L
H
inputs
B=A
H
X
Z
Z
[1]
H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high-impedance OFF-state
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
IIK
input clamping current
VI
input voltage
IOK
output clamping current
output voltage
VO
Conditions
VI < 0 V
[1]
Min
Max
Unit
0.5
+6.5
V
50
-
mA
0.5
+6.5
V
-
50
mA
output HIGH or LOW state
[2]
0.5
VCC + 0.5
V
output 3-state
[2]
0.5
+6.5
V
-
50
mA
VO > VCC or VO < 0 V
IO
output current
VO = 0 V to VCC
ICC
supply current
-
100
mA
IGND
ground current
100
-
mA
Tstg
storage temperature
Ptot
total power dissipation
Tamb = 40 C to +125 C
[3]
65
+150
C
-
500
mW
[1]
The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2]
The output voltage ratings may be exceeded if the output current ratings are observed.
[3]
Above 60 C the value of Ptot derates linearly with 5.5 mW/K.
74LVC_LVCH162245A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 23 November 2011
© NXP B.V. 2011. All rights reserved.
5 of 16
74LVC162245A; 74LVCH162245A
NXP Semiconductors
16-bit transceiver with direction pin; 30 resistors; 3-state
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Symbol
Parameter
Conditions
VCC
supply voltage
functional
VI
input voltage
VO
output voltage
Tamb
ambient temperature
t/V
input transition rise and fall rate
Min
Typ
Max
Unit
1.65
-
3.6
V
1.2
-
-
V
0
-
5.5
V
output HIGH or LOW state
0
-
VCC
V
output 3-state
0
-
5.5
V
in free air
40
-
+125
C
VCC = 1.65 V to 2.7 V
0
-
20
ns/V
VCC = 2.7 V to 3.6 V
0
-
10
ns/V
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
VIH
VIL
VOH
VOL
II
HIGH-level
input
voltage
LOW-level
input
voltage
HIGH-level
output
voltage
LOW-level
output
voltage
input
leakage
current
74LVC_LVCH162245A
Product data sheet
40 C to +85 C
Conditions
VCC = 1.2 V
40 C to +125 C
Min
Typ[1]
Max
Min
Max
Unit
1.08
-
-
1.08
-
V
0.65 VCC
-
-
0.65 VCC
-
V
VCC = 2.3 V to 2.7 V
1.7
-
-
1.7
-
V
VCC = 2.7 V to 3.6 V
2.0
-
-
2.0
-
V
0.12
V
VCC = 1.65 V to 1.95 V
VCC = 1.2 V
-
-
0.12
-
VCC = 1.65 V to 1.95 V
-
-
0.35 VCC
-
VCC = 2.3 V to 2.7 V
-
-
0.7
-
0.7
V
VCC = 2.7 V to 3.6 V
-
-
0.8
-
0.8
V
VCC 0.2
VCC
-
VCC 0.3
-
V
IO = 2 mA; VCC = 1.65 V
1.2
-
-
1.05
-
V
IO = 4 mA; VCC = 2.3 V
1.8
-
-
1.65
-
V
IO = 6 mA; VCC = 2.7 V
2.2
-
-
2.05
-
V
IO = 12 mA; VCC = 3.0 V
2.2
-
-
2.0
-
V
IO = 100 A;
VCC = 1.65 V to 3.6 V
-
-
0.2
-
0.3
V
IO = 2 mA; VCC = 1.65 V
-
-
0.45
-
0.65
V
IO = 4 mA; VCC = 2.3 V
-
-
0.6
-
0.8
V
IO = 6 mA; VCC = 2.7 V
-
-
0.4
-
0.6
V
IO = 12 mA; VCC = 3.0 V
-
-
0.55
-
0.8
V
-
0.1
5
-
20
A
0.35 VCC V
VI = VIH or VIL
IO = 100 A;
VCC = 1.65 V to 3.6 V
VI = VIH or VIL
VCC = 3.6 V;
VI = 5.5 V or GND
[2]
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 23 November 2011
© NXP B.V. 2011. All rights reserved.
6 of 16
74LVC162245A; 74LVCH162245A
NXP Semiconductors
16-bit transceiver with direction pin; 30 resistors; 3-state
Table 6.
Static characteristics …continued
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
40 C to +85 C
Conditions
40 C to +125 C
Unit
Min
Typ[1]
Max
Min
Max
-
0.1
5
-
20
A
[2][3]
IOZ
OFF-state
output
current
VI = VIH or VIL; VCC = 3.6 V;
VO = 5.5 V or GND;
IOFF
power-off
leakage
current
VCC = 0 V; VI or VO = 5.5 V
-
0.1
10
-
20
A
ICC
supply
current
VCC = 3.6 V;
VI = VCC or GND; IO = 0 A
-
0.1
20
-
80
A
ICC
additional
supply
current
per input pin;
VCC = 2.7 V to 3.6 V;
VI = VCC 0.6 V; IO = 0 A
-
5
500
-
5000
A
CI
input
VCC = 0 V to 3.6 V;
capacitance VI = GND to VCC
-
5.0
-
-
-
pF
CI/O
input/output VCC = 0 V to 3.6 V;
capacitance VI = GND to VCC
-
10.0
-
-
-
pF
IBHL
bus hold
LOW
current
10
-
-
10
-
A
30
-
-
25
-
A
IBHH
IBHLO
IBHHO
bus hold
HIGH
current
bus hold
LOW
overdrive
current
bus hold
HIGH
overdrive
current
VCC = 1.65 V; VI = 0.58 V
[4][5]
VCC = 2.3 V; VI = 0.7 V
75
-
-
60
-
A
10
-
-
10
-
A
30
-
-
25
-
A
75
-
-
60
-
A
VCC = 3.0 V; VI = 0.8 V
VCC = 1.65 V; VI = 1.07 V
[4][5]
VCC = 2.3 V; VI = 1.7 V
VCC = 3.0 V; VI = 2.0 V
200
-
-
200
-
A
VCC = 2.7 V
300
-
-
300
-
A
VCC = 3.6 V
500
-
-
500
-
A
VCC = 1.95 V
[4][6]
200
-
-
200
-
A
VCC = 2.7 V
300
-
-
300
-
A
VCC = 3.6 V
500
-
-
500
-
A
VCC = 1.95 V
[4][6]
[1]
All typical values are measured at VCC = 3.3 V and Tamb = 25 C.
[2]
The bus hold circuit is switched off when VI > VCC allowing 5.5 V on the input terminal.
[3]
For I/O ports the parameter IOZ includes the input leakage current.
[4]
Valid for data inputs only. Control inputs do not have a bus hold circuit.
[5]
The specified sustaining current at the data input holds the input below the specified VI level.
[6]
The specified overdrive current at the data input forces the data input to the opposite logic input state.
74LVC_LVCH162245A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 23 November 2011
© NXP B.V. 2011. All rights reserved.
7 of 16
NXP Semiconductors
74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 resistors; 3-state
10. Dynamic characteristics
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.
Symbol Parameter
tpd
ten
propagation
delay
enable time
Tamb = 40 C to +85 C 40 C to +125 C Unit
Conditions
Min
Typ[1]
Max
Min
Max
-
12
-
-
-
ns
VCC = 1.65 V to 1.95 V
1.5
6.6
16.0
1.5
18.4
ns
VCC = 2.3 V to 2.7 V
1.0
3.5
7.8
1.0
9.1
ns
VCC = 2.7 V
1.0
3.5
6.7
1.0
9.5
ns
VCC = 3.0 V to 3.6 V
1.0
2.9
5.7
1.0
8.5
ns
-
18
-
-
-
ns
VCC = 1.65 V to 1.95 V
2.0
7.7
17.2
2.0
19.8
ns
VCC = 2.3 V to 2.7 V
1.5
4.3
9.4
1.5
10.9
ns
VCC = 2.7 V
1.5
4.6
8.5
1.5
9.5
ns
1.0
3.5
7.5
1.0
7.5
ns
-
10
-
-
-
ns
VCC = 1.65 V to 1.95 V
2.8
4.6
11.0
2.8
12.7
ns
VCC = 2.3 V to 2.7 V
1.0
2.6
6.3
1.0
7.3
ns
VCC = 2.7 V
1.5
3.4
7.5
1.5
11.0
ns
VCC = 3.0 V to 3.6 V
1.5
3.2
6.5
1.5
8.5
ns
VCC = 1.65 V to 1.95 V
-
10.4
-
-
-
pF
VCC = 2.3 V to 2.7 V
-
14.0
-
-
-
pF
VCC = 3.0 V to 3.6 V
-
17.2
-
-
-
pF
nAn to nBn; nBn to nAn; see Figure 5
[2]
VCC = 1.2 V
nOE to nAn, nBn; see Figure 6
[2]
VCC = 1.2 V
VCC = 3.0 V to 3.6 V
tdis
disable time
nOE to nAn, nBn; see Figure 6
[2]
VCC = 1.2 V
CPD
[1]
[2]
power
dissipation
capacitance
per input; VI = GND to VCC
[3]
Typical values are measured at Tamb = 25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.
tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3]
CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in Volts
N = number of inputs switching
(CL VCC2 fo) = sum of the outputs
74LVC_LVCH162245A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 23 November 2011
© NXP B.V. 2011. All rights reserved.
8 of 16
74LVC162245A; 74LVCH162245A
NXP Semiconductors
16-bit transceiver with direction pin; 30 resistors; 3-state
11. Waveforms
VI
nAn, nBn
input
VM
GND
t PHL
t PLH
VOH
nBn, nAn
output
VM
VOL
mna477
VM = 1.5 V at VCC 2.7 V.
VM = 0.5 VCC at VCC < 2.7 V.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 5.
The input (nAn, nBn) to outputs (nBn, nAn) propagation delays
VI
nOE input
VM
GND
tPLZ
tPZL
VCC
output
LOW-to-OFF
OFF-to-LOW
VM
VX
VOL
tPHZ
VOH
tPZH
VY
output
HIGH-to-OFF
OFF-to-HIGH
GND
VM
outputs
enabled
outputs
enabled
outputs
disabled
mna362
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 6.
Table 8.
3-state enable and disable times
Measurement points
Supply voltage
VM
VCC
Input
VI
tr = tf
VX
VY
1.2 V
0.5 VCC
VCC
2.5 ns
VOL + 0.15 V
VOH 0.15 V
1.65 V to 1.95 V
0.5 VCC
VCC
2.5 ns
VOL + 0.15 V
VOH 0.15 V
2.3 V to 2.7 V
0.5 VCC
VCC
2.5 ns
VOL + 0.15 V
VOH 0.15 V
2.7 V
1.5 V
2.7 V
2.5 ns
VOL + 0.3 V
VOH 0.3 V
3.0 V to 3.6 V
1.5 V
2.7 V
2.5 ns
VOL + 0.3 V
VOH 0.3 V
74LVC_LVCH162245A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 23 November 2011
© NXP B.V. 2011. All rights reserved.
9 of 16
74LVC162245A; 74LVCH162245A
NXP Semiconductors
16-bit transceiver with direction pin; 30 resistors; 3-state
VI
tW
90 %
negative
pulse
VM
0V
tf
tr
tr
tf
VI
90 %
positive
pulse
0V
VM
10 %
VM
VM
10 %
tW
VEXT
VCC
VI
RL
VO
G
DUT
RT
RL
CL
001aae331
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 7.
Table 9.
Test circuit for measuring switching times
Test data
Supply voltage
Input
Load
VEXT
VI
tr, tf
CL
RL
tPLH, tPHL
tPLZ, tPZL
tPHZ, tPZH
1.2 V
VCC
2 ns
30 pF
1 k
open
2 VCC
GND
1.65 V to 1.95 V
VCC
2 ns
30 pF
1 k
open
2 VCC
GND
2.3 V to 2.7 V
VCC
2 ns
30 pF
500
open
2 VCC
GND
2.7 V
2.7 V
2.5 ns
50 pF
500
open
2 VCC
GND
3.0 V to 3.6 V
2.7 V
2.5 ns
50 pF
500
open
2 VCC
GND
74LVC_LVCH162245A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 23 November 2011
© NXP B.V. 2011. All rights reserved.
10 of 16
74LVC162245A; 74LVCH162245A
NXP Semiconductors
16-bit transceiver with direction pin; 30 resistors; 3-state
12. Package outline
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm
SOT370-1
D
E
A
X
c
y
HE
v M A
Z
25
48
Q
A2
A1
A
(A 3)
θ
pin 1 index
Lp
L
24
1
detail X
w M
bp
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
2.8
0.4
0.2
2.35
2.20
0.25
0.3
0.2
0.22
0.13
16.00
15.75
7.6
7.4
0.635
10.4
10.1
1.4
1.0
0.6
1.2
1.0
0.25
0.18
0.1
0.85
0.40
8o
o
0
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT370-1
Fig 8.
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
MO-118
Package outline SOT370-1 (SSOP48)
74LVC_LVCH162245A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 23 November 2011
© NXP B.V. 2011. All rights reserved.
11 of 16
74LVC162245A; 74LVCH162245A
NXP Semiconductors
16-bit transceiver with direction pin; 30 resistors; 3-state
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm
SOT362-1
E
D
A
X
c
HE
y
v M A
Z
48
25
Q
A2
(A 3)
A1
pin 1 index
A
θ
Lp
L
1
detail X
24
w M
bp
e
2.5
0
5 mm
scale
DIMENSIONS (mm are the original dimensions).
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z
θ
mm
1.2
0.15
0.05
1.05
0.85
0.25
0.28
0.17
0.2
0.1
12.6
12.4
6.2
6.0
0.5
8.3
7.9
1
0.8
0.4
0.50
0.35
0.25
0.08
0.1
0.8
0.4
8o
o
0
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT362-1
Fig 9.
REFERENCES
IEC
JEDEC
JEITA
MO-153
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Package outline SOT362-1 (TSSOP48)
74LVC_LVCH162245A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 23 November 2011
© NXP B.V. 2011. All rights reserved.
12 of 16
74LVC162245A; 74LVCH162245A
NXP Semiconductors
16-bit transceiver with direction pin; 30 resistors; 3-state
13. Abbreviations
Table 10.
Abbreviations
Acronym
Description
CDM
Charged Device Model
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 11.
Revision history
Document ID
Release date
Data sheet status
Change Supersedes
notice
74LVCH162245A v.6
20111123
Product data sheet
-
Modifications:
74LVC_LVCH162245A v.5
•
The format of this document has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•
•
Legal texts have been adapted to the new company name where appropriate.
Table 5, Table 6, Table 7 and Table 9: values added for lower voltage ranges.
74LVC_LVCH162245A v.5
20031208
Product specification
-
74LVC_H162245A v.4
74LVC_H162245A v.4
19980217
Product specification
-
74LVC162245A_74LVCH162245A v.3
74LVC162245A_
74LVCH162245A v.3
19980217
Product specification
-
74LVC162245A v.2
74LVC162245A v.2
19970801
Product specification
-
74LVC162245A v.1
74LVC162245A v.1
-
-
-
-
74LVC_LVCH162245A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 23 November 2011
© NXP B.V. 2011. All rights reserved.
13 of 16
74LVC162245A; 74LVCH162245A
NXP Semiconductors
16-bit transceiver with direction pin; 30 resistors; 3-state
15. Legal information
15.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
74LVC_LVCH162245A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 23 November 2011
© NXP B.V. 2011. All rights reserved.
14 of 16
NXP Semiconductors
74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 resistors; 3-state
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
74LVC_LVCH162245A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 23 November 2011
© NXP B.V. 2011. All rights reserved.
15 of 16
NXP Semiconductors
74LVC162245A; 74LVCH162245A
16-bit transceiver with direction pin; 30 resistors; 3-state
17. Contents
1
2
3
4
5
5.1
5.2
6
7
8
9
10
11
12
13
14
15
15.1
15.2
15.3
15.4
16
17
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 5
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended operating conditions. . . . . . . . 6
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
Dynamic characteristics . . . . . . . . . . . . . . . . . . 8
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13
Legal information. . . . . . . . . . . . . . . . . . . . . . . 14
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Contact information. . . . . . . . . . . . . . . . . . . . . 15
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 23 November 2011
Document identifier: 74LVC_LVCH162245A
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