74LVC543ABQ,118

INTEGRATED CIRCUITS DATA SHEET 74LVC543A Octal D-type registered transceiver; 3-state Product specification Supersedes data of 2004 Feb 05 2004 Apr 07 Philips Semiconductors Product specification Octal D-type registered transceiver; 3-state 74LVC543A FEATURES DESCRIPTION • 5 V tolerant inputs/outputs for interfacing with 5 V logic The 74LVC543A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. • Supply voltage range from 1.2 V to 3.6 V • Complies with JEDEC standard JESD8-B/JESD36 The 74LVC543A is an octal registered transceiver containing two sets of D-type latches for temporary storage of the data flow in either direction. Separate latch enable inputs (pins LEAB and LEBA) and output enable inputs (pins OEAB and OEBA) are provided for each register to permit independent control of inputting and outputting in either direction of the data flow. • CMOS low-power consumption • Direct interface with TTL levels • 8-bit octal transceiver with D-type latch • Back-to-back registers for storage • Separate controls for data flow in each direction • 3-state non-inverting outputs for bus oriented applications The 74LVC543A contains eight D-type latches, with separate inputs and controls for each set. For data flow from pins A to B, for example, the A to B enable input (pin EAB) must be LOW in order to enter data from pins A0 to A7 or take data from pins B0 to B7, as indicated in the “Function table”. With pin EAB LOW, a LOW signal on the A to B latch enable input (pin LEAB) makes the A to B latches transparent; a subsequent LOW-to-HIGH transition on pin LEAB puts the A data into the latches where it is stored and the B outputs no longer change with the A inputs. With pins EAB and OEAB both LOW, the 3-state B output buffers are active and display the data present at the outputs of the A latches. • High-impedance when VCC = 0 V • ESD protection: – HBM EIA/JESD22-A114-B exceeds 2000 V – MM EIA/JESD22-A115-A exceeds 200 V. • Specified from −40 °C to +85 °C and −40 °C to +125 °C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns. SYMBOL PARAMETER tPHL/tPLH propagation delay An to Bn; Bn to An CI input capacitance CI/O input/output capacitance CPD power dissipation capacitance per latch CONDITIONS CL = 50 pF; VCC = 3.3 V UNIT 3.0 ns 4.0 pF 5.0 pF outputs enabled 15.0 pF outputs disabled 3.0 pF VCC = 3.3 V; notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. 2004 Apr 07 TYPICAL 2 Philips Semiconductors Product specification Octal D-type registered transceiver; 3-state 74LVC543A FUNCTION TABLE See note 1. INPUT OPERATING MODES OUTPUT OEXX EXX LEXX DATA H X X X X H X X Z L ↑ L h Z L ↑ L l Z Disabled Disabled plus latch Latch plus display Transparent Hold (do nothing) Z L L ↑ h H L L ↑ l L L L L H H L L L L L L L H X NC Note 1. XX = AB for A to B direction; BA for B to A direction; H = HIGH voltage level; L = LOW voltage level; h = HIGH state must be present one set-up time before the LOW-to-HIGH transition of LEAB, LEBA, EAB and EBA; l = LOW state must be present one set-up time before the LOW-to-HIGH transition of LEAB, LEBA, EAB and EBA; X = don’t care; ↑ = LOW-to-HIGH level transition; NC = no change; Z = high-impedance OFF-state. ORDERING INFORMATION PACKAGE TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE 74LVC543AD −40 °C to +125 °C 24 SO24 plastic SOT137-1 74LVC543ADB −40 °C to +125 °C 24 SSOP24 plastic SOT340-1 74LVC543APW −40 °C to +125 °C 24 TSSOP24 plastic SOT355-1 74LVC543ABQ −40 °C to +125 °C 24 DHVQFN24 plastic SOT815-1 TYPE NUMBER 2004 Apr 07 3 Philips Semiconductors Product specification Octal D-type registered transceiver; 3-state PINNING 74LVC543A PIN PIN SYMBOL SYMBOL DESCRIPTION DESCRIPTION 13 OEAB A to B output enable input (active LOW) 1 LEBA B to A latch enable input (active LOW) 14 LEAB 2 OEBA B to A output enable input (active LOW) A to B latch enable input (active LOW) 15 B7 B data output or input 3 A0 A data input or output 16 B6 B data output or input 4 A1 A data input or output 17 B5 B data output or input 5 A2 A data input or output 18 B4 B data output or input 6 A3 A data input or output 19 B3 B data output or input 7 A4 A data input or output 20 B2 B data output or input 8 A5 A data input or output 21 B1 B data output or input 9 A6 A data input or output 22 B0 B data output or input 10 A7 A data input or output 23 EBA 11 EAB A to B enable input (active LOW) B to A enable input (active LOW) 24 VCC positive supply voltage 24 VCC OEBA 2 23 EBA A0 3 22 B0 A1 4 21 B1 A2 5 20 B2 A3 6 A4 7 A5 8 17 B5 A6 9 16 B6 A7 10 15 B7 543A terminal 1 index area 19 B3 18 B4 EAB 11 14 LEAB GND 12 13 OEAB 24 VCC 1 OEBA 2 A0 3 23 EBA 22 B0 A1 4 21 B1 A2 5 20 B2 A3 6 A4 7 A5 8 17 B5 A6 9 16 B6 A7 10 15 B7 19 B3 543A 18 B4 EAB 11 14 LEAB 001aaa341 OEAB 13 LEBA LEBA ground (0 V) 1 GND GND 12 12 001aaa340 Transparent top view The die substrate is attached to the exposed die pad using conductive die attach material. It can not be used as a supply pin or input. Fig.1 Pin configuration SO24 and (T)SSOP24. 2004 Apr 07 Fig.2 Pin configuration DHVQFN24. 4 Philips Semiconductors Product specification Octal D-type registered transceiver; 3-state 74LVC543A 2 handbook, halfpage handbook, halfpage 3 4 5 6 7 8 9 10 2 13 11 23 14 1 A0 B0 A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 1EN3 23 22 1 21 13 20 19 18 G1 1C5 2EN4 11 G2 14 2C6 3 3 17 16 6D 5D 22 4 4 21 5 20 6 19 EAB 7 18 EBA 8 17 LEAB 9 16 10 15 15 OEBA OEAB LEBA MNA748 MNA749 Fig.3 Logic symbol. handbook, full pagewidth Fig.4 Logic symbol (IEEE/IEC). OEBA EBA LEBA OEAB EAB LEAB LE D A1 LE 8 IDENTICAL CHANNELS D to 7 other channels Fig.5 Logic diagram. 2004 Apr 07 B1 5 MNA750 Philips Semiconductors Product specification Octal D-type registered transceiver; 3-state 74LVC543A RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER supply voltage VI input voltage VO output voltage Tamb operating ambient temperature tr, tf input rise and fall times CONDITIONS MIN. MAX. UNIT for maximum speed performance 2.7 3.6 V for low-voltage applications 1.2 3.6 V 0 5.5 V output HIGH or LOW state 0 VCC V output 3-state 0 5.5 V in free air −40 +125 °C VCC = 1.2 V to 2.7 V 0 20 ns/V VCC = 2.7 V to 3.6 V 0 10 ns/V LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V); note 1. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage −0.5 +6.5 V IIK input diode current VI < 0 V − −50 mA VI input voltage note 2 −0.5 +6.5 V IOK output diode current VO > VCC or VO < 0 V − ±50 mA VO output voltage output HIGH or LOW state; note 2 −0.5 VCC + 0.5 V output 3-state; note 2 −0.5 +6.5 V VO = 0 V to VCC IO output source or sink current − ±50 mA ICC, IGND VCC or GND current − ±100 mA Tstg storage temperature −65 +150 °C Ptot power dissipation − 500 mW Tamb = −40 °C to +125 °C; note 3 Notes 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “Recommended operating conditions” is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 3. For SO24 packages: above 70 °C the value of Ptot derates linearly with 8 mW/K. For (T)SSOP24 packages: above 60 °C the value of Ptot derates linearly with 5.5 mW/K. For DHVQFN24 packages: above 60 °C the value of Ptot derates linearly with 4.5 mW/K. 2004 Apr 07 6 Philips Semiconductors Product specification Octal D-type registered transceiver; 3-state 74LVC543A DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER MIN. TYP. MAX. UNIT VCC (V) OTHER Tamb = −40 °C to +85 °C; note 1 HIGH-level input voltage 1.2 VCC − − V 2.7 to 3.6 2.0 − − V VIL LOW-level input voltage 1.2 − − GND V 2.7 to 3.6 − − 0.8 V VOH HIGH-level output voltage IO = −100 µA 2.7 to 3.6 VCC − 0.2 VCC(2) − V IO = −12 mA 2.7 VCC − 0.5 − − V IO = −18 mA 3.0 VCC − 0.6 − − V IO = −24 mA 3.0 VCC − 0.8 − − V IO = 100 µA 2.7 to 3.6 − GND(2) 0.2 V IO = 12 mA 2.7 − − 0.4 V IO = 24 mA 3.0 − − 0.55 V VIH VOL LOW-level output voltage VI = VIH or VIL VI = VIH or VIL ILI input leakage current VI = 5.5 V or GND 3.6 − ±0.1 ±5 µA IOZ 3-state output OFF-state current VI = VIH or VIL; VO = 5.5 V or GND; note 3 3.6 − 0.1 ±10 µA Ioff power-off leakage supply VI or VO = 5.5 V 0.0 − 0.1 ±10 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A 3.6 − 0.1 10 µA ∆ICC additional quiescent supply current per pin VI = VCC − 0.6 V; IO = 0 A 2.7 to 3.6 − 5(2) 500 µA 2004 Apr 07 7 Philips Semiconductors Product specification Octal D-type registered transceiver; 3-state 74LVC543A TEST CONDITIONS SYMBOL PARAMETER MIN. OTHER TYP. MAX. UNIT VCC (V) Tamb = −40 °C to +125 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage 1.2 VCC − − V 2.7 to 3.6 2.0 − − V 1.2 − − 0 V 2.7 to 3.6 − − 0.8 V VI = VIH or VIL IO = −100 µA 2.7 to 3.6 VCC − 0.3 − − V IO = −12 mA 2.7 VCC − 0.65 − − V IO = −18 mA 3.0 VCC − 0.75 − − V IO = −24 mA 3.0 VCC − 1 − − V IO = 100 µA 2.7 to 3.6 − − 0.3 V IO = 12 mA 2.7 − − 0.6 V IO = 24 mA 3.0 − − 0.8 V VI = VIH or VIL ILI input leakage current VI = 5.5 V or GND 3.6 − − ±20 µA IOZ 3-state output OFF-state current VI = VIH or VIL; VO = 5.5 V or GND; note 3 3.6 − − ±20 µA Ioff power-off leakage supply VI or VO = 5.5 V 0.0 − − ±20 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A 3.6 − − 40 µA ∆ICC additional quiescent supply current per pin VI = VCC − 0.6 V; IO = 0 A 2.7 to 3.6 − − 5000 µA Notes 1. All typical values are measured Tamb = 25 °C. 2. These typical values are measured at VCC = 3.3 V. 3. For transceivers, the parameter IOZ includes the input leakage current. 2004 Apr 07 8 Philips Semiconductors Product specification Octal D-type registered transceiver; 3-state 74LVC543A AC CHARACTERISTICS GND = 0 V; tr = tf ≤ 2.5 ns; CL = 50 pF. CONDITIONS SYMBOL PARAMETER MIN. WAVEFORMS TYP. MAX. UNIT − ns VCC (V) Tamb = −40 °C to +85 °C; note 1 tPHL/tPLH propagation delay An to Bn; Bn to An propagation delay LEBA to An; LEAB to Bn tPZH/tPZL 3-state output enable time OEBA to An; OEAB to Bn 3-state output enable time EBA to An; EAB to Bn tPHZ/tPLZ 3-state output disable time OEBA to An; OEAB to Bn 3-state output disable time EBA to An; EAB to Bn tW tsu th LEXX pulse with LOW set-up time An, Bn to LEXX; An, Bn to EXX hold time An, Bn to LEXX; An, Bn to EXX − 15 2.7 1.5 − 8.0 ns 3.0 to 3.6 1.0 3.0(2) 7.0 ns − 16 − ns 2.7 1.5 − 9.5 ns 3.0 to 3.6 1.2 4.2(2) 8.5 ns − 17 − ns 2.7 1.5 − 9.2 ns 3.0 to 3.6 1.3 3.4(2) 7.7 ns − 18 − ns 2.7 1.5 − 9.3 ns 3.0 to 3.6 1.3 3.6(2) 8.0 ns − 8.0 − ns 2.7 1.5 − 7.5 ns 3.0 to 3.6 1.5 3.2(2) 7.0 ns − 8.5 − ns 1.5 − 7.5 ns 3.0 to 3.6 1.5 3.3(2) 7.0 ns 1.2 − 4.0 − ns 2.7 3.0 − − ns 3.0 to 3.6 3.0 0.9(2) − ns 1.2 − −1.5 − ns 2.7 1.5 − − ns 3.0 to 3.6 +1.5 −0.5(2) − ns 1.2 − 2.0 − ns 2.7 1.5 − − ns 1.5 0.6(2) − ns − − 1.0 ns see Figs 6 and 10 1.2 see Figs 7 and 10 1.2 see Figs 8 and 10 1.2 see Figs 8 and 10 1.2 see Figs 8 and 10 1.2 see Figs 8 and 10 1.2 2.7 see Fig.7 see Fig.9 see Fig.9 3.0 to 3.6 tsk(0) 2004 Apr 07 skew note 3 9 Philips Semiconductors Product specification Octal D-type registered transceiver; 3-state 74LVC543A CONDITIONS SYMBOL PARAMETER MIN. WAVEFORMS TYP. MAX. UNIT VCC (V) Tamb = −40 °C to +125 °C tPHL/tPLH propagation delay An to Bn; Bn to An see Figs 6 and 10 1.2 2.7 3.0 to 3.6 propagation delay LEBA to An; LEAB to Bn see Figs 7 and 10 1.2 3-state output enable time OEBA to An; OEAB to Bn see Figs 8 and 10 1.2 3-state output enable time EBA to An; EAB to Bn see Figs 8 and 10 1.2 3-state output disable time OEBA to An; OEAB to Bn see Figs 8 and 10 1.2 2.7 3.0 to 3.6 tPZH/tPZL 2.7 3.0 to 3.6 2.7 3-state output disable time EBA to An; EAB to Bn tW tsu th tsk(0) LEXX pulse with LOW set-up time An, Bn to LEXX; An, Bn to EXX hold time An, Bn to LEXX; An, Bn to EXX skew see Fig.9 see Fig.9 note 3 − ns 1.5 − 10.0 ns 1.0 − 9.0 ns − − − ns 1.5 − 12.0 ns 1.2 − 11.0 ns − − − ns 1.5 − 11.5 ns 1.3 − 10.0 ns − − − ns 1.5 − 12.0 ns 1.3 − 10.0 ns − − ns 2.7 1.5 − 9.5 ns 3.0 to 3.6 1.5 − 9.0 ns − − − ns 2.7 1.5 − 11.5 ns 3.0 to 3.6 1.5 − 9.0 ns see Figs 8 and 10 1.2 see Fig.7 − − 3.0 to 3.6 tPHZ/tPLZ − 1.2 − − − ns 2.7 3.0 − − ns 3.0 to 3.6 3.0 − − ns 1.2 − − − ns 2.7 1.5 − − ns 3.0 to 3.6 1.5 − − ns 1.2 − − − ns 2.7 1.5 − − ns 3.0 to 3.6 1.5 − − ns − − 1.5 ns Notes 1. All typical values are measured at Tamb = 25 °C. 2. These typical values are measured at VCC = 3.3 V. 3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. 2004 Apr 07 10 Philips Semiconductors Product specification Octal D-type registered transceiver; 3-state 74LVC543A AC WAVEFORMS VI handbook, full pagewidth An, Bn input VM GND tPHL tPLH VOH Bn, An output VM VOL MNA751 VM = 1.5 V at VCC ≥ 2.7 V. VM = 0.5 × VCC at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load. Fig.6 Input (An and Bn) to output (Bn and An) propagation delays. VI handbook, full pagewidth LEXX input VM GND tW t PHL t PLH VOH An, Bn output VM VOL VM MNA752 VM = 1.5 V at VCC ≥ 2.7 V. VM = 0.5 × VCC at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load. Fig.7 Latch enable input (LEXX) pulse width and latch enable input to output An and Bn propagation delays. 2004 Apr 07 11 Philips Semiconductors Product specification Octal D-type registered transceiver; 3-state 74LVC543A VI handbook, full pagewidth OEXX, EXX VM input GND t PLZ t PZL VCC output LOW-to-OFF OFF-to-LOW VM VX VOL t PHZ t PZH VOH VY output HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs enabled outputs disabled MNA753 VM = 1.5 V at VCC ≥ 2.7 V. VM = 0.5 × VCC at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load. VX = VOL + 0.3 V at VCC ≥ 2.7 V; VX = VOL + 0.1 × VCC at VCC < 2.7 V. VY = VOH − 0.3 V at VCC ≥ 2.7 V; VY = VOH − 0.1 × VCC at VCC < 2.7 V. Fig.8 3-state enable and disable times. VI handbook, full pagewidth VM An, Bn input GND th t su th t su VI LEXX, EXX input VM GND MNA754 VM = 1.5 V at VCC ≥ 2.7 V. VM = 0.5 × VCC at VCC < 2.7 V. The shaded areas indicate when the input is permitted to change for predictable output performance. Fig.9 Data set-up and hold times for the inputs An and Bn to LEXX and EXX inputs. 2004 Apr 07 12 Philips Semiconductors Product specification Octal D-type registered transceiver; 3-state 74LVC543A VEXT VCC VI PULSE GENERATOR RL VO D.U.T. CL RT RL mna616 VCC VI CL RL Ω(1) VEXT tPLH/tPHL tPZH/tPHZ tPZL/tPLZ 1.2 V VCC 50 pF 500 open GND 2 × VCC 2.7 V 2.7 V 50 pF 500 Ω open GND 2 × VCC 3.0 V to 3.6 V 2.7 V 50 pF 500 Ω open GND 2 × VCC Note 1. The circuit performs better when RL = 1000 Ω. Definitions for test circuits: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig.10 Load circuitry for switching times. 2004 Apr 07 13 Philips Semiconductors Product specification Octal D-type registered transceiver; 3-state 74LVC543A PACKAGE OUTLINES SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 D E A X c HE y v M A Z 13 24 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 12 e detail X w M bp 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.36 0.32 0.23 15.6 15.2 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.01 0.019 0.013 0.014 0.009 0.61 0.60 0.30 0.29 0.05 0.419 0.043 0.055 0.394 0.016 inches 0.1 0.012 0.096 0.004 0.089 0.043 0.039 0.01 0.01 Z (1) 0.9 0.4 0.035 0.004 0.016 θ Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT137-1 075E05 MS-013 2004 Apr 07 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 14 o 8 o 0 Philips Semiconductors Product specification Octal D-type registered transceiver; 3-state 74LVC543A SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm D SOT340-1 E A X c HE y v M A Z 24 13 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 12 bp e detail X w M 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 8.4 8.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 0.8 0.4 8 o 0 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION SOT340-1 2004 Apr 07 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 15 o Philips Semiconductors Product specification Octal D-type registered transceiver; 3-state 74LVC543A TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm D SOT355-1 E A X c HE y v M A Z 13 24 Q A2 (A 3) A1 pin 1 index A θ Lp L 1 12 bp e detail X w M 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 7.9 7.7 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT355-1 2004 Apr 07 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-153 16 Philips Semiconductors Product specification Octal D-type registered transceiver; 3-state 74LVC543A DHVQFN24: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x 0.85 mm B D SOT815-1 A A E A1 c detail X terminal 1 index area C e1 terminal 1 index area e y1 C v M C A B w M C b 2 y 11 L 12 1 e2 Eh 24 13 23 14 X Dh 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D (1) Dh E (1) Eh e e1 e2 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 5.6 5.4 4.25 3.95 3.6 3.4 2.25 1.95 0.5 4.5 1.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT815-1 --- --- --- 2004 Apr 07 17 EUROPEAN PROJECTION ISSUE DATE 03-04-29 Philips Semiconductors Product specification Octal D-type registered transceiver; 3-state 74LVC543A DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Production This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS DISCLAIMERS Short-form specification  The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications  These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition  Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes  Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information  Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2004 Apr 07 18 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. SCA76 © Koninklijke Philips Electronics N.V. 2004 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands R20/06/pp19 Date of release: 2004 Apr 07 Document order number: 9397 750 13074