74LVC623ADB,118

74LVC623A Octal transceiver with dual enable; 3-state Rev. 5 — 25 November 2011 Product data sheet 1. General description The 74LVC623A is an octal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. This octal bus transceiver is designed for asynchronous two-way communication between data buses. The control function implementation allows maximum flexibility in timing. This device allows data transmission from the An bus to the Bn bus or from the Bn bus to the An bus, depending upon the logic levels at the enable inputs (pins OEAB and OEBA). The enable inputs can be used to disable the device so that the buses are effectively isolated. The dual enable function configuration gives this transceiver the capability to store data by simultaneous enabling of pins OEAB and OEBA. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are enabled and all other data sources to the two sets of the bus lines are at high-impedance OFF-state, both sets of the bus lines will remain at their last states. The 8-bit codes appearing on the two sets of buses will be identical. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices as translators in mixed 3.3 V or 5 V applications. 2. Features and benefits       5 V tolerant inputs and outputs for interfacing with 5 V logic Wide supply voltage range from 1.2 V to 3.6 V CMOS low power consumption Direct interface with TTL levels High-impedance when VCC = 0 V Complies with JEDEC standard:  JESD8-7A (1.65 V to 1.95 V)  JESD8-5A (2.3 V to 2.7 V)  JESD8-C/JESD36 (2.7 V to 3.6 V)  ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115B exceeds 200 V  CDM JESD22-C101E exceeds 1000 V  Specified from 40 C to +85 C and from 40 C to +125 C. 74LVC623A NXP Semiconductors Octal transceiver with dual enable; 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC623AD 40 C to +125 C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 74LVC623ADB 40 C to +125 C SSOP20 plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1 74LVC623APW 40 C to +125 C TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 4. Functional diagram 19 1 EN1 EN2 1 2 3 4 5 6 7 8 9 OEAB A0 B0 A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 1 18 2 17 16 2 18 3 17 4 16 13 5 15 12 6 14 7 13 8 12 9 11 15 14 11 OEBA 19 001aaa844 001aaa833 Fig 1. Logic symbol 74LVC623A Product data sheet Fig 2. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 5 — 25 November 2011 © NXP B.V. 2011. All rights reserved. 2 of 18 74LVC623A NXP Semiconductors Octal transceiver with dual enable; 3-state 19 1 2 OEBA OEAB A0 B0 3 A1 B1 4 13 A6 B6 9 14 A5 B5 8 15 A4 B4 7 16 A3 B3 6 17 A2 B2 5 18 12 A7 B7 11 001aaa832 Fig 3. Logic diagram 74LVC623A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 25 November 2011 © NXP B.V. 2011. All rights reserved. 3 of 18 74LVC623A NXP Semiconductors Octal transceiver with dual enable; 3-state 5. Pinning information 5.1 Pinning OEAB 1 A0 2 20 VCC 19 OEBA A1 3 18 B0 A2 4 17 B1 A3 5 A4 6 A5 7 14 B4 A6 8 13 B5 A7 9 12 B6 GND 10 11 B7 623A 16 B2 15 B3 001aaa831 Fig 4. Pin configuration SO20 and (T)SSOP20 5.2 Pin description Table 2. Pin description Pin Symbol Description 1 OEAB output enable input 19 OEBA output enable input (active LOW) A[0:7] 2, 3, 4, 5, 6, 7, 8, 9 data input or output B[0:7] 18, 17, 16, 15, 14, 13, 12, 11 data output or input 10 GND ground (0 V) 20 VCC supply voltage 74LVC623A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 25 November 2011 © NXP B.V. 2011. All rights reserved. 4 of 18 74LVC623A NXP Semiconductors Octal transceiver with dual enable; 3-state 6. Functional description Table 3. Function table[1] Input Input or output OEAB OEBA An Bn L L An = Bn input H H input Bn = An L H Z Z H L An = Bn input input Bn = An [1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage VI input voltage output voltage VO Conditions Min Max Unit 0.5 +6.5 V [1] 0.5 +6.5 V HIGH or LOW state [2] 0.5 VCC + 0.5 V 3-state [2] 0.5 +6.5 V IIK input clamping current VI < 0 V 50 - mA IOK output clamping current VO > VCC or VO < 0 V - 50 mA IO output current VO = 0 V to VCC - 50 mA ICC supply current - 100 mA IGND ground current 100 - mA Tstg storage temperature 65 150 C - 500 mW total power dissipation Ptot Tamb = 40C to +125 C [3] [1] The minimum input voltage ratings may be exceeded if the input current ratings are observed. [2] The output voltage ratings may be exceeded if the output current ratings are observed. [3] For SO20 package: above 70 C Ptot derates linearly with 8 mW/K. For (T)SSOP20 packages: above 60 C Ptot derates linearly with 5.5 mW/K. 74LVC623A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 25 November 2011 © NXP B.V. 2011. All rights reserved. 5 of 18 74LVC623A NXP Semiconductors Octal transceiver with dual enable; 3-state 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions VCC supply voltage functional VI input voltage VO output voltage Min Typ Max Unit 1.65 - 3.6 V 1.2 - - V 0 - 5.5 V HIGH or LOW state 0 - VCC V 3-state or VCC = 0 V 0 - 5.5 V in free air 40 - +125 C 0 - 20 ns/V 0 - 10 ns/V Tamb ambient temperature t/V input transition rise and fall rate VCC = 1.65 V to 2.7 V VCC = 2.7 V to 3.6 V 9. Static characteristics Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter 40 C to +85 C Conditions Min VIH VIL VOH VOL II HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage Product data sheet 40 C to +125 C Max Min Unit Max VCC = 1.2 V 1.08 - - 1.08 - V VCC = 1.65 V to 1.95 V 0.65  VCC - - 0.65  VCC - V VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V - 0.12 V VCC = 1.2 V - - 0.12 VCC = 1.65 V to 1.95 V - - 0.35  VCC - 0.35  VCC V VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V IO = 100 A; VCC = 1.65 V to 3.6 V VCC  0.2 - - VCC  0.3 - V IO = 4 mA; VCC = 1.65 V 1.2 - - 1.05 - V IO = 8 mA; VCC = 2.3 V 1.8 - - 1.65 - V IO = 12 mA; VCC = 2.7 V 2.2 - - 2.05 - V IO = 18 mA; VCC = 3.0 V 2.4 - - 2.25 - V IO = 24 mA; VCC = 3.0 V 2.2 - - 2.0 - V IO = 100 A; VCC = 1.65 V to 3.6 V - - 0.2 - 0.3 V IO = 4 mA; VCC = 1.65 V - - 0.45 - 0.65 V VI = VIH or VIL VI = VIH or VIL IO = 8 mA; VCC = 2.3 V - - 0.6 - 0.8 V IO = 12 mA; VCC = 2.7 V - - 0.4 - 0.6 V IO = 24 mA; VCC = 3.0 V - - 0.55 - 0.8 V 0.1 5 - 20 A input leakage VCC = 3.6 V; VI = 5.5 V or GND current 74LVC623A Typ[1] All information provided in this document is subject to legal disclaimers. Rev. 5 — 25 November 2011 © NXP B.V. 2011. All rights reserved. 6 of 18 74LVC623A NXP Semiconductors Octal transceiver with dual enable; 3-state Table 6. Static characteristics …continued At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter 40 C to +85 C Conditions Min Typ[1] 40 C to +125 C Max Min Unit Max OFF-state output current VI = VIH or VIL; VCC = 3.6 V; VO = 5.5 V or GND; - 0.1 5 - 20 A IOFF power-off leakage current VCC = 0 V; VI or VO = 5.5 V - 0.1 10 - 20 A ICC supply current VCC = 3.6 V; VI = VCC or GND; IO = 0 A - 0.1 10 - 40 A ICC additional supply current per input pin; VCC = 2.7 V to 3.6 V; VI = VCC  0.6 V; IO = 0 A - 5 500 - 5000 A CI input capacitance VCC = 0 V to 3.6 V; VI = GND to VCC - 4.0 - - - pF CI/O input/output capacitance VCC = 0 V to 3.6 V; VI = GND to VCC - 10.0 - - - pF IOZ [2] [1] All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb = 25 C. [2] For transceivers, the parameter IOZ includes the input leakage current. 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 8. Symbol Parameter tpd propagation delay 40 C to +85 C Conditions An to Bn; Bn to An; see Figure 5 enable time VCC = 1.2 V Min Max - 19 - - - ns VCC = 1.65 V to 1.95 V 1.7 6.4 13.5 1.7 14.2 ns 1.5 3.4 6.7 1.5 7.4 ns VCC = 2.7 V 1.5 3.4 5.7 1.5 7.5 ns 1.0 2.9 5.2 1.0 6.5 ns - 26 - - - ns VCC = 1.65 V to 1.95 V 2.7 8.7 17.0 2.7 17.9 ns VCC = 2.3 V to 2.7 V 2.2 4.8 8.9 2.2 9.8 ns VCC = 2.7 V 1.5 4.2 6.9 1.5 9.0 ns VCC = 3.0 V to 3.6 V 1.0 3.9 6.6 1.0 8.5 ns - 26 - - - ns OEAB to Bn; see Figure 6 OEBA to An; see Figure 7 VCC = 1.2 V Product data sheet Max VCC = 2.3 V to 2.7 V [2] VCC = 1.2 V 74LVC623A Typ[1] [2] VCC = 3.0 V to 3.6 V ten 40 C to +125 C Unit Min [2] VCC = 1.65 V to 1.95 V 2.6 8.1 17.0 2.6 17.9 ns VCC = 2.3 V to 2.7 V 2.2 4.5 8.9 2.2 9.8 ns VCC = 2.7 V 1.5 4.6 7.5 1.5 9.5 ns VCC = 3.0 V to 3.6 V 1.0 3.6 6.6 1.0 8.5 ns All information provided in this document is subject to legal disclaimers. Rev. 5 — 25 November 2011 © NXP B.V. 2011. All rights reserved. 7 of 18 74LVC623A NXP Semiconductors Octal transceiver with dual enable; 3-state Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 8. Symbol Parameter 40 C to +85 C Conditions Min tdis disable time OEAB to Bn; see Figure 6 Min Max - 12 - - - ns 2.3 4.7 10.5 2.3 11.1 ns VCC = 2.3 V to 2.7 V 1.0 2.6 5.7 1.0 6.4 ns VCC = 2.7 V 1.5 4.2 6.2 1.5 8.0 ns 1.0 3.2 5.5 1.0 7.0 ns - 11 - - - ns 3.6 5.2 10.1 3.6 10.7 ns VCC = 3.0 V to 3.6 V [2] VCC = 1.2 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V 1.0 2.9 5.5 1.0 6.1 ns VCC = 2.7 V 1.5 3.7 5.5 1.5 7.0 ns 1.0 3.4 5.3 1.0 7.0 ns - - 1.0 - 1.5 ns - 11.9 - - - pF VCC = 2.3 V to 2.7 V - 15.5 - - - pF VCC = 3.0 V to 3.6 V - 18.8 - - - pF VCC = 3.0 V to 3.6 V VCC = 3.0 V to 3.6 V power dissipation per input; VI = GND to VCC capacitance VCC = 1.65 V to 1.95 V CPD Max VCC = 1.65 V to 1.95 V OEBA to An; see Figure 7 output skew time 40 C to +125 C Unit [2] VCC = 1.2 V tsk(o) Typ[1] [3] [4] [1] Typical values are measured at Tamb = 25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively. [2] tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. [3] [4] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in Volts N = number of inputs switching (CL  VCC2  fo) = sum of the outputs 74LVC623A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 25 November 2011 © NXP B.V. 2011. All rights reserved. 8 of 18 74LVC623A NXP Semiconductors Octal transceiver with dual enable; 3-state 11. Waveforms VI An, Bn input VM GND t PHL t PLH VOH Bn, An output VM VOL mna366 VM = 1.5 V at VCC  2.7 V; VM = 0.5  VCC at VCC < 2.7 V. VOL and VOH are typical output voltage levels that occur with the output load. Fig 5. The inputs An, Bn to outputs Bn, An propagation delays VI OEAB input VM GND tPLZ tPZL VCC output LOW-to-OFF OFF-to-LOW VM VX VOL tPHZ VOH tPZH VY output HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs disabled outputs enabled 001aaa835 Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig 6. Table 8. 3-state enable and disable times for OEAB input Measurement points Supply voltage Input Output VCC VM VM VX VY < 2.7 V 0.5  VCC 0.5  VCC VOL + 0.15 V VOH  0.15 V  2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH  0.3 V 74LVC623A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 25 November 2011 © NXP B.V. 2011. All rights reserved. 9 of 18 74LVC623A NXP Semiconductors Octal transceiver with dual enable; 3-state VI OEBA input VM GND tPLZ tPZL VCC output LOW-to-OFF OFF-to-LOW VM VX VOL tPHZ VOH tPZH VY output HIGH-to-OFF OFF-to-HIGH GND VM outputs enabled outputs disabled outputs enabled 001aaa834 Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig 7. 3-state enable and disable times for OEBA input 74LVC623A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 25 November 2011 © NXP B.V. 2011. All rights reserved. 10 of 18 74LVC623A NXP Semiconductors Octal transceiver with dual enable; 3-state VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VEXT VCC VI RL VO G DUT RT RL CL 001aae331 Test data is given in Table 9. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 8. Table 9. Test circuit for measuring switching times Test data Supply voltage Input Load VEXT VI tr, tf CL RL tPLH, tPHL tPLZ, tPZL tPHZ, tPZH 1.2 V VCC  2 ns 30 pF 1 k open 2  VCC GND 1.65 V to 1.95 V VCC  2 ns 30 pF 1 k open 2  VCC GND 2.3 V to 2.7 V VCC  2 ns 30 pF 500  open 2  VCC GND 2.7 V 2.7 V  2.5 ns 50 pF 500  open 2  VCC GND 3.0 V to 3.6 V 2.7 V  2.5 ns 50 pF 500  open 2  VCC GND 74LVC623A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 25 November 2011 © NXP B.V. 2011. All rights reserved. 11 of 18 74LVC623A NXP Semiconductors Octal transceiver with dual enable; 3-state 12. Package outline SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 D E A X c HE y v M A Z 20 11 Q A2 A (A 3) A1 pin 1 index θ Lp L 10 1 e bp detail X w M 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.01 0.019 0.013 0.014 0.009 0.51 0.49 0.30 0.29 0.05 0.419 0.043 0.055 0.394 0.016 inches 0.1 0.012 0.096 0.004 0.089 0.043 0.039 0.01 0.01 Z (1) 0.9 0.4 0.035 0.004 0.016 θ 8o o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. Fig 9. REFERENCES OUTLINE VERSION IEC JEDEC SOT163-1 075E04 MS-013 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Package outline SOT163-1 (SO20) 74LVC623A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 25 November 2011 © NXP B.V. 2011. All rights reserved. 12 of 18 74LVC623A NXP Semiconductors Octal transceiver with dual enable; 3-state SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm D SOT339-1 E A X c HE y v M A Z 20 11 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 10 w M bp e detail X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 7.4 7.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 0.9 0.5 8o o 0 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION SOT339-1 REFERENCES IEC JEDEC JEITA MO-150 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 10. Package outline SOT339-1 (SSOP20) 74LVC623A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 25 November 2011 © NXP B.V. 2011. All rights reserved. 13 of 18 74LVC623A NXP Semiconductors Octal transceiver with dual enable; 3-state TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 E D A X c HE y v M A Z 11 20 Q A2 (A 3) A1 pin 1 index A θ Lp L 1 10 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8o o 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 REFERENCES IEC JEDEC JEITA MO-153 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 11. Package outline SOT 360-1 (TSSOP20) 74LVC623A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 25 November 2011 © NXP B.V. 2011. All rights reserved. 14 of 18 74LVC623A NXP Semiconductors Octal transceiver with dual enable; 3-state 13. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC623A v.5 20111125 Product data sheet - 74LVC623A v.4 - 74LVC623A v.3 Modifications: 74LVC623A v.4 Modifications: • Typographical errors corrected 20111107 Product data sheet • The format of this document has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • • Legal texts have been adapted to the new company name where appropriate. Table 4, Table 5, Table 6, Table 7, and Table 9: values added for lower voltage ranges. DHVQFN package added to Section 3 and Section 12. 74LVC623A v.3 20040506 Product specification - 74LVC623A v.2 74LVC623A v.2 19980729 Product specification - - 74LVC623A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 25 November 2011 © NXP B.V. 2011. All rights reserved. 15 of 18 74LVC623A NXP Semiconductors Octal transceiver with dual enable; 3-state 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. 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Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 74LVC623A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 25 November 2011 © NXP B.V. 2011. All rights reserved. 16 of 18 74LVC623A NXP Semiconductors Octal transceiver with dual enable; 3-state Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74LVC623A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 25 November 2011 © NXP B.V. 2011. All rights reserved. 17 of 18 74LVC623A NXP Semiconductors Octal transceiver with dual enable; 3-state 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Contact information. . . . . . . . . . . . . . . . . . . . . 17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 25 November 2011 Document identifier: 74LVC623A