INTEGRATED CIRCUITS
74LVT534
3.3 V Octal D-type flip-flop; inverting
(3-State)
Product data
Supersedes data of 1998 Feb 19
2004 Aug 25
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
FEATURES
74LVT534
DESCRIPTION
• 3-State outputs for bus interfacing
• Common output enable
• TTL input and output switching levels
• Input and output interface capability to systems at 5 V supply
• Bus-hold data inputs eliminate the need for external pull-up
The LVT534 is a high-performance BiCMOS product designed for
VCC operation at 3.3 V.
This device is an 8-bit, edge triggered register coupled to eight
3-State output buffers. The two sections of the device are controlled
independently by the clock (CP) and Output Enable (OE) control
gates. The state of each D input (one set-up time before the
LOW-to-HIGH clock transition) is transferred to the corresponding
flip-flop’s Q output.
resistors to hold unused inputs
• Live insertion/extraction permitted
• No bus current loading when output is tied to 5 V bus
• Power-up 3-State
• Power-up reset
• Latch-up protection exceeds 500mA per JEDEC Std 17
• ESD protection exceeds 2000 V per MIL STD 883 Method 3015
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active-LOW Output Enable (OE) controls all eight 3-State buffers
independent of the clock operation.
When OE is LOW, the stored data appears at the outputs. When OE
is HIGH, the outputs are in the high-impedance “off” state, which
means they will neither drive nor load the bus.
and 200 V per Machine Model
QUICK REFERENCE DATA
SYMBOL
CONDITIONS
Tamb = 25 °C; GND = 0 V
PARAMETER
TYPICAL
UNIT
3.0
3.5
ns
tPLH
tPHL
Propagation delay
CP to Qn
CL = 50 pF;
VCC = 3.3 V
CIN
Input capacitance
VI = 0 V or 3.0 V
4
pF
COUT
Output capacitance
Outputs disabled;
VI/O = 0 V or 3.0 V
7
pF
ICCZ
Total supply current
Outputs disabled;
VCC = 3.6 V
0.13
mA
ORDERING INFORMATION
TEMPERATURE RANGE
TYPE NUMBER
DWG NUMBER
20-Pin Plastic SOL
PACKAGES
–40 °C to +85 °C
74LVT534D
SOT163-1
20-Pin Plastic SSOP Type II
–40 °C to +85 °C
74LVT534DB
SOT339-1
20-Pin Plastic TSSOP Type I
–40 °C to +85 °C
74LVT534PW
SOT360-1
PIN CONFIGURATION
PIN DESCRIPTION
OE
1
20 VCC
Q0
2
19 Q7
D0 3
18 D7
D1 4
17 D6
Q1
5
16 Q6
Q2
6
15 Q5
D2 7
14 D5
D3 8
13 D4
9
12 Q4
Q3
GND 10
11 CP
SA00161
2004 Aug 25
2
PIN NUMBER
SYMBOL
FUNCTION
1
OE
3, 4, 7, 8,
13, 14, 17, 18
D0 to D7
Data inputs
2, 5, 6, 9,
12, 15, 16, 19
Q0 to Q7
Inverting 3-State outputs
11
CP
10
GND
Ground (0 V)
20
VCC
Positive supply voltage
Output enable input (active-LOW)
Clock pulse input (active rising
edge)
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
LOGIC SYMBOL
74LVT534
LOGIC SYMBOL (IEEE/IEC)
1
3
4
7
8
13
14
17
18
D0
D1
D2
D3
D4
D5
D6
D7
EN
11
C1
3
11
CP
1
OE
Q0 Q1 Q2 Q3
2
5
6
Q4 Q5 Q6 Q7
9
12
15
16
2
1D
4
5
7
6
8
9
13
12
14
15
17
16
18
19
19
SA00162
SA00163
FUNCTION TABLE
INPUTS
OUTPUTS
Q0 to Q7
OPERATING
MODE
Latch and read
register
OE
CP
Dn
INTERNAL
REGISTER
L
L
↑
↑
l
h
L
H
H
L
L
↑
X
NC
NC
H
H
↑
↑
X
Dn
NC
Dn
Z
Z
H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH
clock transition
L = LOW voltage level
l = LOW voltage level one set-up time prior to the LOW-to-HIGH
clock transition
NC= No change
X = Don’t care
Z = high-impedance “off” state
↑ = LOW-to-HIGH clock transition
↑ = not a LOW-to-HIGH clock transition
Hold
Disable
outputs
LOGIC DIAGRAM
D0
D1
D2
D3
D4
D5
D6
D7
2
3
4
5
6
7
8
9
D
D
D
D
D
D
D
D
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
11
CP
1
OE
19
Q0
18
Q1
17
16
Q2
Q3
15
Q4
14
Q5
13
Q6
12
Q7
SV00168
2004 Aug 25
3
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
ABSOLUTE MAXIMUM RATINGS1, 2
PARAMETER
SYMBOL
VCC
RATING
DC supply voltage
IIK
DC input diode current
VI
DC input voltage3
IOK
DC output diode current
VOUT
CONDITIONS
VI < 0 V
DC output voltage3
IOUT
O
DC output current
Tstg
Storage temperature range
UNIT
–0.5 to +4.6
V
–50
mA
–0.5 to +7.0
V
VO < 0 V
–50
mA
Output in Off or HIGH state
–0.5 to +7.0
V
Output in LOW state
128
Output in HIGH state
–64
mA
–65 to +150
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 °C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
VCC
PARAMETER
DC supply voltage
UNIT
MIN
MAX
2.7
3.6
V
0
5.5
V
2.0
–
V
VI
Input voltage
VIH
HIGH-level input voltage
VIL
Input voltage
–
0.8
V
IOH
HIGH-level output current
–
–32
mA
LOW-level output current
–
32
LOW-level output current; current duty cycle ≤ 50 %, f ≥ 1 kHz
–
64
∆t/∆v
Input transition rise or fall rate; outputs enabled
–
10
ns/V
Tamb
Operating free-air temperature range
–40
+85
°C
IOL
O
2004 Aug 25
4
mA
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
Tamb = –40° C to +85 °C
TEST CONDITIONS
MIN
VIK
Input clamp voltage
VCC = 2.7 V; IIK = –18 mA
VOL
VRST
II
HIGH-level output voltage
LOW-level output voltage
Power-up output low
voltage5
Input leakage current
IHOLD
Output off current
Bus Hold current A
inputs7
UNIT
–
–0.9
–1.2
V
VCC – 0.1
–
V
VCC = 2.7 V; IOH = –8 mA
2.4
2.5
–
V
VCC = 3.0 V; IOH = –32 mA
2.0
2.2
–
V
VCC = 2.7 V; IOL = 100 µA
–
0.1
0.2
V
VCC = 2.7 V; IOL = 24 mA
–
0.3
0.5
V
VCC = 3.0 V; IOL = 16 mA
–
0.25
0.4
V
VCC = 3.0 V; IOL = 32 mA
–
0.3
0.5
V
VCC = 3.0 V; IOL = 64 mA
–
0.4
0.55
V
VCC = 3.6 V; IO = 1 mA; VI = GND or VCC
–
0.13
0.55
V
VCC = 0 V or 3.6 V; VI = 5.5 V
–
1
10
µA
–
± 0.1
±1
µA
–
0.1
1
µA
–
–1
–5
µA
VCC = 3.6 V; VI = VCC or GND
VCC = 3.6 V; VI = VCC
Control pins
Data pins4
VCC = 3.6 V; VI = 0 V
IOFF
MAX
VCC – 0.2
VCC = 2.7 V to 3.6 V; IOH = –100 µA
VOH
TYP1
VCC = 0 V; VI or VO = 0 V to 4.5 V
–
1
± 100
µA
VCC = 3 V; VI = 0.8 V
75
150
–
µA
VCC = 3 V; VI = 2.0 V
VCC = 0 V to 3.6 V; VCC = 3.6 V
–75
–150
–
µA
± 500
–
–
µA
Current into an output in the
HIGH state when VO > VCC
VO = 5.5 V; VCC = 3.0 V
–
60
125
µA
Power-up/down 3-State
output current3
VCC ≤ 1.2 V; VO = 0.5 V to VCC; VI = GND or VCC;
OE/OE = Don’t care
–
1
± 100
µA
IOZH
3-State output HIGH current
VCC= 3.6 V; VO = 3 V; VI = VIL or VIH
–
1
5
µA
IOZL
3-State output LOW current
VCC= 3.6 V; VO = 0.5 V; VI = VIL or VIH
–
1
–5
µA
VCC = 3.6 V; Outputs HIGH; VI = GND or VCC;
IO = 0 mA
–
0.13
0.19
mA
VCC = 3.6 V; Outputs LOW, VI = GND or VCC;
IO = 0 mA
–
3
12
mA
VCC = 3.6 V; Outputs Disabled; VI = GND or VCC;
IO = 0 mA6
–
0.13
0.19
mA
VCC = 3 V to 3.6 V; One input at VCC – 0.6 V;
Other inputs at VCC or GND
–
0.1
0.2
mA
IEX
IPU/PD
ICCH
ICCL
Quiescent supply current3
ICCZ
∆ICC
Additional supply current per
input pin2
NOTES:
1. All typical values are at VCC = 3.3 V and Tamb = 25 °C.
2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND.
3. This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 msec. From VCC = 1.2 V to VCC = 3.3 V ± 0.3 V
a transition time of 100 µsec is permitted. This parameter is valid for Tamb = 25 °C only.
4. Unused pins at VCC or GND.
5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
6. ICCZ is measured with outputs pulled to VCC or down to GND.
7. This is the bus hold overdrive current required to force the input to the opposite logic state.
2004 Aug 25
5
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
AC CHARACTERISTICS
GND = 0 V; tR = tF = 2.5 ns; CL = 50 pF; RL = 500 Ω; Tamb = –40 °C to +85 °C.
LIMITS
SYMBOL
PARAMETER
VCC = 3.3 V ± 0.3 V
WAVEFORM
VCC = 2.7 V
UNIT
MIN
TYP1
MAX
MIN
MAX
fMAX
Maximum clock frequency
1
100
150
–
100
–
ns
tPLH
tPHL
Propagation delay
CP to Qn
1
1.7
2.2
3.0
3.5
4.6
4.9
–
–
5.4
5.2
ns
tPZH
tPZL
Output enable time
to HIGH and LOW level
3
4
1.7
1.7
3.2
3.3
5.4
5.5
–
–
7.0
5.6
ns
tPHZ
tPLZ
Output disable time
from HIGH and LOW level
3
4
2.1
2.1
3.5
3.4
4.8
4.8
–
–
5.3
4.6
ns
NOTE:
1. All typical values are at VCC = 3.3 V and Tamb = 25 °C.
AC SETUP REQUIREMENTS
GND = 0 V; tR = tF = 2.5 ns; CL = 50 pF; RL = 500 Ω; Tamb = –40 °C to +85 °C.
LIMITS
SYMBOL
PARAMETER
WAVEFORM
VCC = 3.3 V ± 0.3 V
VCC = 2.7 V
MIN
TYP
MIN
UNIT
tS(H)
tS(L)
Setup time, HIGH or LOW, Dn to CP
2
2.0
2.6
1.0
1.3
2.0
3.2
ns
tH(H)
tH(L)
Hold time, HIGH or LOW, Dn to CP
2
0
0
–1.3
–0.9
0
0
ns
tW(H)
tW(L)
CP pulse width HIGH or LOW
1
1.5
4.2
0.8
3.0
1.5
5.0
ns
2004 Aug 25
6
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
AC WAVEFORMS
VM = 1.5 V, VIN = GND to 2.7 V
1/fMAX
2.7V
2.7V
CP
1.5V
1.5V
OE
1.5V
tPZH
tw(L)
tPHZ
VOH
tPLH
1.5V
Qn
1.5V
0V
0V
tw(H)
tPHL
1.5V
VOH
Qn
VOH –0.3V
1.5V
1.5V
0V
VOL
SV00044
SV00119
Waveform 3. 3-State Output Enable time to HIGH level and
Output Disable time from HIGH level
Waveform 1. Propagation delay, clock input to output,
clock pulse width, and maximum clock frequency
ÉÉÉ ÉÉÉÉÉÉÉÉ
ÉÉÉ
ÉÉÉ ÉÉÉÉÉÉÉÉ
ÉÉÉ
ÉÉÉ ÉÉÉÉÉÉÉÉ
ÉÉÉ
2.7V
Dn
1.5V
1.5V
1.5V
1.5V
2.7V
OE
0V
ts(H)
th(H)
ts(L)
CP
0V
tPLZ
3V
1.5V
Qn
0V
1.5V
VOL +0.3V
VOL
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
SV00120
SV00108
Waveform 4. 3-State Output Enable time to LOW level and
Output Disable time from LOW level
Waveform 2. Data setup and hold times
2004 Aug 25
1.5V
tPZL
2.7V
1.5V
1.5V
th(L)
7
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
TEST CIRCUIT AND WAVEFORM
6.0 V
VCC
Open
VIN
VOUT
PULSE
GENERATOR
RL
GND
tW
90%
NEGATIVE
PULSE
VM
10%
0V
CL
tTHL (tF)
RL
tTLH (tR)
tTLH (tR)
tTHL (tF)
90%
Test Circuit for 3-State Outputs
POSITIVE
PULSE
AMP (V)
90%
VM
VM
10%
10%
tW
SWITCH POSITION
TEST
SWITCH
tPLH/tPHL
Open
tPLZ/tPZL
6V
tPHZ/tPZH
GND
AMP (V)
VM
10%
D.U.T.
RT
90%
0V
VM = 1.5 V
Input Pulse Definition
INPUT PULSE REQUIREMENTS
DEFINITIONS
FAMILY
RL = Load resistor; see AC CHARACTERISTICS for value.
CL = Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
74LVT
Amplitude
Rep. Rate
2.7 V
v10 MHz
tW
tR
tF
500 ns v2.5 ns v2.5 ns
RT = Termination resistance should be equal to ZOUT of
pulse generators.
SV00092
2004 Aug 25
8
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
SO20: plastic small outline package; 20 leads; body width 7.5 mm
2004 Aug 25
9
74LVT534
SOT163-1
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
2004 Aug 25
10
74LVT534
SOT339-1
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
2004 Aug 25
11
74LVT534
SOT360-1
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
REVISION HISTORY
Rev
Date
Description
_3
20040825
Product data sheet (9397 750 14004). Supersedes Product specification of 1998 Feb 19 (9397 750 03536).
Modifications:
• Ordering information table on page 2:
– remove ‘North America’ column
– change column heading ‘Outside North America’ to ‘Type Number’
• AC characteristics table on page 6: change Max. value of tPHZ from ‘3.0 ns’ to ‘4.8 ns’
_2
19980219
_1
19960813
2004 Aug 25
Product specification (9397 750 03536). ECN 853-1855 18988 of 19 February 1998.
Supersedes data of 1996 Aug 13.
12
Philips Semiconductors
Product data
3.3 V Octal D-type flip-flop, inverting (3-State)
74LVT534
Data sheet status
Level
Data sheet status [1]
Product
status [2] [3]
Definitions
I
Objective data sheet
Development
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data sheet
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data sheet
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL
http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given
in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no
representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be
expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree
to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described
or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated
via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys
no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent,
copyright, or mask work right infringement, unless otherwise specified.
Koninklijke Philips Electronics N.V. 2004
All rights reserved. Printed in U.S.A.
Contact information
For additional information please visit
http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
Date of release: 08-04
For sales offices addresses send e-mail to:
sales.addresses@www.semiconductors.philips.com.
Document order number:
2004 Aug 25
13
9397 750 14004
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