74LVT652DB,112

INTEGRATED CIRCUITS 74LVT652 3.3V Octal transceiver/register, non-inverting (3-State) Product specification Supersedes data of 1994 May 20 IC23 Data Handbook
     1998 Feb 19 Philips Semiconductors Product specification 3.3V Octal transceiver/register, non-inverting (3-State) FEATURES 74LVT652 DESCRIPTION • Independent registers for A and B buses • Multiplexed real-time and stored data • 3-State outputs • Output capability: +64mA/–32mA • TTL input and output switching levels • Input and output interface capability to systems at 5V supply • Bus-hold data inputs eliminate the need for external pull-up The LVT652 is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT652 transceiver/register consists of bus transceiver circuits with 3-State outputs, D–type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output Enable (OEAB, OEBA) and Select (SAB, SBA) pins are provided for bus management. resistors to hold unused inputs • Live insertion/extraction permitted • No bus current loading when output is tied to 5V bus • Power-up 3-State • Power-up reset • Latch–up protection exceeds 500mA per JEDEC Std 17 • ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT 2.8 2.6 ns tPLH tPHL Propagation delay An to Bn or Bn to An CL = 50pF; VCC = 3.3V CIN Input capacitance VI = 0V or 3V 4 pF CI/O I/O capacitance Outputs disabled; VI/O = 0V or 3V 10 pF ICCZ Total supply current Outputs disabled; VCC = 3.6V 0.13 mA ORDERING INFORMATION TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 24-Pin Plastic SOL PACKAGES –40°C to +85°C 74LVT652 D 74LVT652 D SOT137-1 24-Pin Plastic SSOP Type II –40°C to +85°C 74LVT652 DB 74LVT652 DB SOT340-1 24-Pin Plastic TSSOP Type I –40°C to +85°C 74LVT652 PW 74LVT652PW DH SOT355-1 PIN CONFIGURATION PIN DESCRIPTION CPAB 1 24 VCC SAB 2 23 CPBA OEAB 3 22 SBA A0 4 21 OEBA A1 5 20 B0 A2 6 19 B1 A3 7 18 B2 A4 8 17 B3 A5 9 16 B4 A6 10 15 B5 A7 11 14 B6 GND 12 13 B7 PIN NUMBER SYMBOL FUNCTION 1, 23 CPAB / CPBA A to B clock input / B to A clock input 2, 22 SAB / SBA A to B select input / B to A select input 3, 21 OEAB / OEBA A to B Output Enable input (active-High) / B to A Output Enable input (active-Low) 4, 5, 6, 7, 8, 9, 10, 11 A0 – A7 Data inputs/outputs (A side) 20, 19, 18, 17, 16, 15, 14, 13 B0 – B7 Data inputs/outputs (B side) 12 GND Ground (0V) 24 VCC Positive supply voltage SV00051 1998 Feb 19 2 853-1748 18987 Philips Semiconductors Product specification 3.3V Octal transceiver/register, non-inverting (3-State) LOGIC SYMBOL 4 74LVT652 LOGIC SYMBOL (IEEE/IEC) 5 6 7 8 9 10 11 21 EN1(BA) 3 EN2(AB) 23 22 1 A0 A1 A2 A3 A4 A5 A6 A7 23 2 C4 G5 C6 G7 CPBA 22 SBA OEAB 3 2 SAB OEBA 21 1 CPAB ∇1 B0 B1 B2 B3 B4 B5 B6 B7 6D 4 20 19 18 17 16 15 14 13 ≥1 5 20 5 1 7 ≥1 1 7 2 19 5 SV00052 4D 18 6 17 7 16 8 15 9 14 10 13 11 SV00053 LOGIC DIAGRAM OEBA 21 3 OEAB CPBA SBA 23 22 1 CPAB 2 SAB Detail A; 1 of 8 Channels A0 1D C1 Q 4 20 B0 1D C1 Q A1 5 A2 6 A3 7 A4 8 A5 9 A6 10 A7 11 DETAIL A X 7 19 18 17 16 15 14 13 B1 B2 B3 B4 B5 B6 B7 SV00054 1998 Feb 19 3 Philips Semiconductors Product specification 3.3V Octal transceiver/register, non-inverting (3-State) The following examples demonstrate the four fundamental bus-management functions that can be performed with the 74LVT652. REAL TIME BUS TRANSFER BUS B TO BUS A A B A A B X L OEAB OEBA CPAB CPBA SAB SBA H H X TRANSFER STORED DATA TO A OR B B B A X L } X STORAGE FROM A, B, OR A AND B } X The output enable pins determine the direction of the data flow. } L The select pins determine whether data is stored or transferred through the device in real time. REAL TIME BUS TRANSFER BUS A TO BUS B } OEAB OEBA CPAB CPBA SAB SBA L 74LVT652 OEAB OEBA CPAB CPBA SAB SBA X X H ↑ X X X L X X ↑ X X L H ↑ ↑ X X OEAB OEBA CPAB CPBA SAB SBA H L H|L H|L H H SV00055 FUNCTION TABLE INPUTS H L X ↑ * ** DATA I/O OPERATING MODE OEAB OEBA CPAB CPBA SAB SBA An Bn L L H H H or L ↑ H or L ↑ X X X X Input Input X H H H ↑ ↑ H or L ↑ X ** X X Input Unspecified** Output* Store A, Hold B Store A in both registers L L X L H or L ↑ ↑ ↑ X X X ** Unspecified** Output* Input Hold A, Store B Store B in both registers L L L L X X X H or L X X L H Output Input Real time B data to A bus Stored B data to A bus H H H H X H or L X X L H X X Input Output Real time A data to B bus Store A data to B bus H L H or L H or L H H Output Output Stored A data to B bus Stored B data to A bus = = = = Isolation Store A and B data High voltage level Low voltage level Don’t care Low-to-High clock transition The data output function may be enabled or disabled by various signals at the OEBA and OEAB inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock. If both Select controls (SAB and SBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must be staggered in order to load both registers. 1998 Feb 19 4 Philips Semiconductors Product specification 3.3V Octal transceiver/register, non-inverting (3-State) 74LVT652 ABSOLUTE MAXIMUM RATINGS1,2 PARAMETER SYMBOL VCC IIK CONDITIONS RATING UNIT –0.5 to +4.6 V –50 mA –0.5 to +7.0 V VO < 0 –50 mA Output in Off –0.5 to +7.0 V Output in Low state 128 Output in High state –64 DC supply voltage DC input diode current VI < 0 voltage3 VI DC input IOK DC output diode current voltage3 VOUT DC output IOUT O DC output current Tstg Storage temperature range mA –65 to +150 °C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC PARAMETER UNIT DC supply voltage MIN MAX 2.7 3.6 V 0 5.5 V VI Input voltage VIH High-level input voltage VIL Input voltage 0.8 V IOH High-level output current –32 mA IOL Low-level output current 32 mA Low-level output current; current duty cycle ≤ 50%; f ≥ 1kHz 64 ∆t/∆v Input transition rise or fall rate; Outputs enabled 10 ns/V Tamb Operating free-air temperature range +85 °C 1998 Feb 19 2.0 –40 5 V Philips Semiconductors Product specification 3.3V Octal transceiver/register, non-inverting (3-State) 74LVT652 DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C MIN VIK Input clamp voltage VCC = 2.7V; IIK = –18mA VCC = 2.7 to 3.6V; IOH = –100µA VOH VOL VRST High-level output voltage Low-level output voltage Power-up output low voltage5 2.4 2.5 VCC = 3.0V; IOH = –32mA 2.0 2.2 0.1 0.2 VCC = 2.7V; IOL = 24mA 0.3 0.5 VCC = 3.0V; IOL = 16mA 0.25 0.4 VCC = 3.0V; IOL = 32mA 0.3 0.5 VCC = 3.0V; IOL = 64mA 0.4 0.55 VCC = 3.6V; IO = 1mA; VI = GND or VCC 0.13 0.55 Control pins VCC = 3.6V; VI = 5.5V I/O Data pins4 VCC = 0V; VI or VO = 0 to 4.5V VCC = 3V; VI = 0.8V IHOLD IEX IPU/PD Bus Hold current A inputs6 10 1.0 20 0.1 1 –1 -5 1 ±100 VCC = 3V; VI = 2.0V –75 –150 VCC = 0V to 3.6V; VCC = 3.6V ±500 V V µA µA µA VO = 5.5V; VCC = 3.0V 60 125 µA Power up/down 3-State output current3 VCC ≤ 1.2V; VO = 0.5V to VCC; VI = GND or VCC; OE/OE = Don’t care 15 ±100 µA VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 0.13 0.19 VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 3 12 VCC = 3.6V; Outputs Disabled; VI = GND or VCC, IO = 0 0.13 0.19 VCC = 3V to 3.6V; One input at VCC-0.6V, Other inputs at VCC or GND 0.1 0.2 Quiescent supply current ICCZ ∆ICC ±1 1.0 150 V Current into an output in the High state when VO > VCC ICCH ICCL ±0.1 75 UNIT V VCC = 2.7V; IOL = 100µA VCC = 3.6V; VI = 0 Output off current –1.2 VCC = 2.7V; IOH = –8mA VCC = 3.6V; VI = VCC IOFF –0.9 VCC-0.1 VCC = 0 or 3.6V; VI = 5.5V Input leakage current MAX VCC-0.2 VCC = 3.6V; VI = VCC or GND II TYP1 Additional supply current per input pin2 mA mA NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND 3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V ± 0.3V a transition time of 100µsec is permitted. This parameter is valid for Tamb = 25°C only. 4. Unused pins at VCC or GND. 5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. 6. This is the bus hold overdrive current required to force the input to the opposite logic state. 1998 Feb 19 6 Philips Semiconductors Product specification 3.3V Octal transceiver/register, non-inverting (3-State) 74LVT652 AC CHARACTERISTICS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω; Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER WAVEFORM VCC = 3.3V ± 0.3V VCC = 2.7V MAX UNIT MIN TYP1 fMAX Maximum clock frequency 1 150 180 tPLH tPHL Propagation delay CPAB to Bn or CPBA to An 1 1.8 2.0 3.7 3.7 6.0 5.7 6.9 6.4 ns tPLH tPHL Propagation delay An to Bn or Bn to An 2 1.2 1.0 2.8 2.6 4.7 4.6 5.5 5.3 ns tPLH tPHL Propagation delay SAB to Bn or SBA to An 3 1.4 1.4 3.7 4.0 6.4 6.2 7.6 6.8 ns tPZH tPZL Output enable time OEBA to An 5 6 1.0 1.0 2.9 3.0 5.8 6.0 7.2 7.3 ns tPHZ tPLZ Output disable time OEBA to An 5 6 2.2 1.8 3.9 3.2 6.5 5.8 6.9 5.9 ns tPZH tPZL Output enable time OEAB to Bn 5 6 1.0 1.2 3.3 3.4 6.5 6.3 7.5 7.1 ns 5 6 1.7 1.5 4.5 3.8 7.2 5.8 8.1 6.3 ns tPHZ Output disable time tPLZ OEAB to Bn NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. MAX MHz AC SETUP REQUIREMENTS GND = 0V, tR = 2.5ns, tF = 2.5ns, CL = 50pF, RL = 500Ω, Tamb =40 °C to 85 °C LIMITS SYMBOL PARAMETER 1 Tamb = -40 to +85oC VCC = +5.0V ±0.5V Tamb = +25oC VCC = +5.0V WAVEFORM Min Typ Max Min UNIT Max ts(H) ts(L) Setup time An to CPAB, Bn to CPBA 4 1.5 2.2 0.9 1.1 1.6 2.5 ns th(H) th(L) Hold time 1 An to CPAB, Bn to CPBA 4 0 0 –1.0 –1.0 0.0 0.0 ns 1 3.3 3.3 1.0 2.0 3.3 3.3 ns tw(H) Pulse width, High or Low tw(L) CPAB or CPBA NOTE: 1. This data sheet limit may vary among suppliers. 1998 Feb 19 7 Philips Semiconductors Product specification 3.3V Octal transceiver/register, non-inverting (3-State) 74LVT652 AC WAVEFORMS VM = 1.5V, VIN = GND to 2.7V An or Bn 1/fMAX 2.7V CPBA or CPAB 1.5V 1.5V 1.5V An or Bn CPBA or CPAB tw(L) tPLH tPHL VM VM ts(H) 0V tw(H) ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ VOH VM VM ts(L) th(H) VM tw(L) VM 0V SV00128 SV00056 Waveform 4. Data Setup and Hold Times Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency 2.7V OEBA 2.7V VM VM 0V tPHL Bn or An VM VM 0V OEAB VM tPLH 2.7V NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. VOL SBA or SAB An or Bn 0V th(L) 1.5V 1.5V 2.7V tPZH tPHZ VOH VOH An or Bn VOH –0.3V VM VM 0V VOL SV00129 SV00126 Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level Waveform 2. Propagation Delay, An to Bn or Bn to An, SAB to Bn or SBA to An 2.7V OEBA 2.7V SBA or SAB VM VM VM An or Bn tPLH VM 0V tPZL 0V tPHL VM OEAB tPLZ 3V VOH An or Bn VM VM VOL +0.3V VOL VOL SV00130 SV00127 Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level Waveform 3. Propagation Delay, SBA to An or SAB to Bn 1998 Feb 19 8 Philips Semiconductors Product specification 3.3V Octal transceiver/register, non-inverting (3-State) 74LVT652 TEST CIRCUIT AND WAVEFORM 6.0V VCC Open VIN VOUT PULSE GENERATOR RL GND tW 90% NEGATIVE PULSE 90% VM VM 10% 10% D.U.T. RT 0V CL tTHL (tF) RL tTLH (tR) tTLH (tR) tTHL (tF) 90% Test Circuit for 3-State Outputs POSITIVE PULSE AMP (V) 90% VM VM 10% 10% tW SWITCH POSITION TEST SWITCH tPLH/tPHL Open tPLZ/tPZL 6V tPHZ/tPZH GND AMP (V) 0V VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS FAMILY RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. 74LVT Amplitude Rep. Rate 2.7V
10MHz tW tR tF 500ns
2.5ns
2.5ns RT = Termination resistance should be equal to ZOUT of pulse generators. SV00092 1998 Feb 19 9 Philips Semiconductors Product specification 3.3V Octal transceiver/register, non-inverting (3-State) SO24: plastic small outline package; 24 leads; body width 7.5 mm 1998 Feb 19 10 74LVT652 SOT137-1 Philips Semiconductors Product specification 3.3V Octal transceiver/register, non-inverting (3-State) SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm 1998 Feb 19 11 74LVT652 SOT340-1 Philips Semiconductors Product specification 3.3V Octal transceiver/register, non-inverting (3-State) TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm 1998 Feb 19 12 74LVT652 SOT355-1 Philips Semiconductors Product specification 3.3V Octal transceiver/register, non-inverting (3-State) NOTES 1998 Feb 19 13 74LVT652 Philips Semiconductors Product specification 3.3V Octal transceiver/register, non-inverting (3-State) 74LVT652 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.  Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number:
     yyyy mmm dd 14 Date of release: 05-96 9397-750-03545