74LVU04D,112

74LVU04 Hex unbuffered inverter Rev. 7 — 18 September 2014 Product data sheet 1. General description The 74LVU04 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HCU04. The 74LVU04 is a general purpose hex inverter. Each of the six inverters is a single stage with unbuffered outputs. 2. Features and benefits     Wide operating voltage: 1.0 V to 5.5 V Optimized for low voltage applications: 1.0 V to 3.6 V Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 C Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 C  ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V  Multiple package options  Specified from 40 C to +85 C and from 40 C to +125 C 3. Applications  Linear amplifier  Crystal oscillator  Astable multivibrator 74LVU04 NXP Semiconductors Hex unbuffered inverter 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVU04N 40 C to +125 C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1 74LVU04D 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 74LVU04DB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1 74LVU04PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 74LVU04BQ 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5  3  0.85 mm SOT762-1 5. Functional diagram   $ <   $ <     $ <   $ <   $ <             VCC VCC VCC 100 Ω  170 Ω nA  $ <   PQD Fig 1. Logic symbol 74LVU04 Product data sheet   001aah110 PQD Fig 2. nY IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 7 — 18 September 2014 Fig 3. Circuit diagram (one inverter) © NXP Semiconductors N.V. 2014. All rights reserved. 2 of 20 74LVU04 NXP Semiconductors Hex unbuffered inverter 6. Pinning information 6.1 Pinning 1 1A terminal 1 index area 14 VCC 74LVU04 1Y 2 13 6A 12 6Y 2A 3 13 6A 2Y 4 2A 3 12 6Y 3A 5 2Y 4 11 5A 3A 5 10 5Y 3Y 6 3Y 6 9 4A GND 7 8 4Y 11 5A VCC (1) 10 5Y 9 8 14 VCC 2 4Y 1 1Y 7 1A GND 74LVU04 4A 001aah109 Transparent top view 001aah108 (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to VCC. Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14 Fig 5. Pin configuration DHVQFN14 6.2 Pin description Table 2. Pin description Symbol Pin Description 1A 1 data input 1Y 2 data output 2A 3 data input 2Y 4 data output 3A 5 data input 3Y 6 data output GND 7 ground (0 V) 4Y 8 data output 4A 9 data input 5Y 10 data output 5A 11 data input 6Y 12 data output 6A 13 data input VCC 14 supply voltage 74LVU04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 18 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 3 of 20 74LVU04 NXP Semiconductors Hex unbuffered inverter 7. Functional description Table 3. Function table[1] Input nA Output nY L H H L [1] H = HIGH voltage level; L = LOW voltage level. 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V VO = 0.5 V to (VCC + 0.5 V) Min Max Unit 0.5 +7.0 V [1] - 20 mA [1] - 50 mA IO output current - 25 mA ICC supply current - 50 mA IGND ground current 50 - mA Tstg storage temperature 65 +150 C Ptot total power dissipation Tamb = 40 C to +125 C DIP14 package [2] - 750 mW SO14 package [3] - 500 mW (T)SSOP14 package [4] - 500 mW DHVQFN14 package [5] - 500 mW [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] Ptot derates linearly with 12 mW/K above 70 C. [3] Ptot derates linearly with 8 mW/K above 70 C. [4] Ptot derates linearly with 5.5 mW/K above 60 C. [5] Ptot derates linearly with 4.5 mW/K above 60 C. 74LVU04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 18 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 4 of 20 74LVU04 NXP Semiconductors Hex unbuffered inverter 9. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions [1] Min Typ Max Unit 1.0 3.3 5.5 V VCC supply voltage VI input voltage 0 - VCC V VO output voltage 0 - VCC V Tamb ambient temperature 40 +25 +125 C t/V input transition rise and fall rate VCC = 1.0 V to 2.0 V - - 500 ns/V VCC = 2.0 V to 2.7 V - - 200 ns/V VCC = 2.7 V to 3.6 V - - 100 ns/V VCC = 3.6 V to 5.5 V - - 50 ns/V [1] The static characteristics are guaranteed from VCC = 1.2 V to VCC = 5.5 V, but LV devices are guaranteed to function down to VCC = 1.0 V (with input levels GND or VCC). 10. Static characteristics Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage 74LVU04 Product data sheet Conditions VCC = 1.2 V 40 C to +85 C 40 C to +125 C Unit Min Typ[1] Max Min Max 1.0 - - 1.0 - V VCC = 2.0 V 1.6 - - 1.6 - V VCC = 2.7 V to 3.6 V 2.4 - - 2.4 - V VCC = 4.5 V to 5.5 V 0.8VCC - - 0.8VCC - V VCC = 1.2 V - - 0.2 - 0.2 V VCC = 2.0 V - - 0.4 - 0.4 V VCC = 2.7 V to 3.6 V - - 0.5 - 0.5 V VCC = 4.5 V to 5.5 V - - 0.2VCC - IO = 100 A; VCC = 1.2 V - 1.2 - - - V IO = 100 A; VCC = 2.0 V 1.8 2.0 - 1.8 - V IO = 100 A; VCC = 2.7 V 2.5 2.7 - 2.5 - V IO = 100 A; VCC = 3.0 V 2.8 3.0 - 2.8 - V IO = 100 A; VCC = 4.5 V 4.3 4.5 - 4.3 - V IO = 6 mA; VCC = 3.0 V 2.4 2.82 - 2.2 - V IO = 12 mA; VCC = 4.5 V 3.6 4.2 - 3.5 - V 0.2VCC V VI = VIH or VIL All information provided in this document is subject to legal disclaimers. Rev. 7 — 18 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 5 of 20 74LVU04 NXP Semiconductors Hex unbuffered inverter Table 6. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter VOL 40 C to +85 C Conditions LOW-level output voltage Min Typ[1] 40 C to +125 C Unit Max Min Max VI = VIH or VIL IO = 100 A; VCC = 1.2 V - 0 - - - V IO = 100 A; VCC = 2.0 V - 0 0.2 - 0.2 V IO = 100 A; VCC = 2.7 V - 0 0.2 - 0.2 V IO = 100 A; VCC = 3.0 V - 0 0.2 - 0.2 V IO = 100 A; VCC = 4.5 V - 0 0.2 - 0.2 V IO = 6 mA; VCC = 3.0 V - 0.25 0.40 - 0.50 V IO = 12 mA; VCC = 4.5 V - 0.35 0.55 - 0.65 V II input leakage current VI = VCC or GND; VCC = 5.5 V - - 1.0 - 1.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 20.0 - 40 A CI input capacitance - 3.5 - - - pF [1] Typical values are measured at Tamb = 25 C. 11. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; For test circuit see Figure 7. Symbol Parameter propagation delay tpd 40 C to +85 C Conditions Min Max Min Max VCC = 1.2 V - 35 - - - ns VCC = 2.0 V - 12 14 - 17 ns - 9 10 - 13 ns nA, nB to nY; see Figure 6 VCC = 3.0 V to 3.6 V; CL = 15 pF [3] - 6 - - - ns VCC = 3.0 V to 3.6 V [3] - 7 8 - 10 ns - - 7 - 9 ns - 18 - - - pF VCC = 4.5 V to 5.5 V power dissipation capacitance [1] Unit [2] VCC = 2.7 V CPD 40 C to +125 C Typ[1] CL = 50 pF; fi = 1 MHz; VI = GND to VCC [4] All typical values are measured at Tamb = 25 C. [2] tpd is the same as tPLH and tPHL. [3] Typical values are measured at nominal supply voltage (VCC = 3.3 V). [4] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz, fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in V N = number of inputs switching (CL  VCC2  fo) = sum of the outputs. 74LVU04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 18 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 6 of 20 74LVU04 NXP Semiconductors Hex unbuffered inverter 12. Waveforms 9, 90 Q$LQSXW 90 *1' W 3+/ W 3/+ 92+ 90 Q 10 k; Gol = 20 (typical) Typical unity gain bandwidth product is 5 MHz. Fig 13. Linear amplifier Fig 14. Crystal oscillator Table 10. External components for oscillator (f < 1 MHz) All values given are typical and must be used as an initial set-up. Frequency R1 R2 C1 C2 10 kHz to 15.9 kHz 2.2 M 220 k 56 pF 20 pF 16 kHz to 24.9 kHz 2.2 M 220 k 56 pF 10 pF 25 kHz to 54.9 kHz 2.2 M 100 k 56 pF 10 pF 55 kHz to 129.9 kHz 2.2 M 100 k 47 pF 5 pF 130 kHz to 199.9 kHz 2.2 M 47 k 47 pF 5 pF 200 kHz to 349.9 kHz 2.2 M 47 k 47 pF 5 pF 350 kHz to 600 kHz 2.2 M 47 k 47 pF 5 pF 74LVU04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 18 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 10 of 20 74LVU04 NXP Semiconductors Hex unbuffered inverter Table 11. Optimum value for R2 Frequency R2 Optimum for 3 kHz 2.0 k minimum required ICC 8.0 k minimum influence due to change in VCC 6 kHz 1.0 k minimum required ICC 4.7 k minimum influence due to change in VCC 0.5 k minimum required ICC 10 kHz 14 kHz >14 kHz 2.0 k minimum influence due to change in VCC 0.5 k minimum required ICC 1.0 k minimum influence due to change in VCC - replace R2 by C3 with a typical value of 35 pF 001aah116 80 input capacitance (pF) 60 (1) 40 (2) (3) 20 U04 RS U04 R C 0 0 001aah115 VCC = 2.0 V VCC = 3.0 V RS  2  R The average ICC (mA) is approximately 3.5 + 0.05 x f (MHz) x C (pF) at VCC = 3.0 V. 74LVU04 Product data sheet 2 3 input voltage (V) VCC = 1.2 V 1 1 f = ---  --------------T 2.2RC Fig 15. Astable multivibrator 1 Tamb = 25 C. Fig 16. Input capacitance as function of input voltage All information provided in this document is subject to legal disclaimers. Rev. 7 — 18 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 11 of 20 74LVU04 NXP Semiconductors Hex unbuffered inverter 15. Package outline ',3SODVWLFGXDOLQOLQHSDFNDJHOHDGVPLO 627 0( VHDWLQJSODQH ' $ $ $ / F H = Z 0 E H  E  0+  SLQLQGH[ (     PP VFDOH ',0(16,216LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV 81,7 $ PD[ $  PLQ $  PD[ E E F ' ( H H / 0( 0+ Z   = PD[ PP                        LQFKHV                        1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPLQFKPD[LPXPSHUVLGHDUHQRWLQFOXGHG 5()(5(1&(6 287/,1( 9(56,21 ,(& -('(& -(,7$ 627 * 02 6& (8523($1 352-(&7,21 ,668('$7(   Fig 17. Package outline SOT27-1 (DIP14) 74LVU04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 18 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 12 of 20 74LVU04 NXP Semiconductors Hex unbuffered inverter 62SODVWLFVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627 ' ( $ ; F \ +( Y 0 $ =   4 $ $ $  $ SLQLQGH[ ș /S  /  H GHWDLO; Z 0 ES   PP VFDOH ',0(16,216LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP                                                 LQFKHV        ș R R  1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPLQFKPD[LPXPSHUVLGHDUHQRWLQFOXGHG 5()(5(1&(6 287/,1( 9(56,21 ,(& -('(& 627 ( 06 -(,7$ (8523($1 352-(&7,21 ,668('$7(   Fig 18. Package outline SOT108-1 (SO14) 74LVU04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 18 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 13 of 20 74LVU04 NXP Semiconductors Hex unbuffered inverter 6623SODVWLFVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ =   4 $ $ $  $ SLQLQGH[ ș /S /   GHWDLO; Z 0 ES H   PP VFDOH ',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = ș PP                            R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ 02 (8523($1 352-(&7,21 ,668('$7(   Fig 19. Package outline SOT337-1 (SSOP14) 74LVU04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 18 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 14 of 20 74LVU04 NXP Semiconductors Hex unbuffered inverter 76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ =   4 $ SLQLQGH[ $  $ $ ș /S /   H GHWDLO; Z 0 ES   PP VFDOH ',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = ș PP                            R R 1RWHV 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 3ODVWLFLQWHUOHDGSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ 02 (8523($1 352-(&7,21 ,668('$7(   Fig 20. Package outline SOT402-1 (TSSOP14) 74LVU04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 18 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 15 of 20 74LVU04 NXP Semiconductors Hex unbuffered inverter '+94)1SODVWLFGXDOLQOLQHFRPSDWLEOHWKHUPDOHQKDQFHGYHU\WKLQTXDGIODWSDFNDJHQROHDGV 627 WHUPLQDOVERG\[[PP % ' $ $ ( $ F GHWDLO; WHUPLQDO LQGH[DUHD WHUPLQDO LQGH[DUHD & H H E   \ \ & Y 0 & $ % Z 0 & /   (K H     'K ;   PP VFDOH ',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 PP $ PD[ $ E      F ' 'K ( (K          H H / Y Z \ \         1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 5()(5(1&(6 287/,1( 9(56,21 ,(& -('(& -(,7$ 627  02  (8523($1 352-(&7,21 ,668('$7(   Fig 21. Package outline SOT762-1 (DHVQFN14) 74LVU04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 18 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 16 of 20 74LVU04 NXP Semiconductors Hex unbuffered inverter 16. Abbreviations Table 12. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 17. Revision history Table 13. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVU04 v.7 20140918 Product data sheet - 74LVU04 v.6 Modifications: • Descriptive title changed to Hex unbuffered inverter. 74LVU04 v.6 20071220 Product data sheet - 74LVU04 v.5 74LVU04 v.5 20010111 Product specification - 74LVU04 v.4 74LVU04 v.4 20001218 Product specification - 74LVU04 v.3 74LVU04 v.3 19980420 Product specification - 74LVU04 v.1 74LVU04 v.1 19970212 Product specification - - 74LVU04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 18 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 17 of 20 74LVU04 NXP Semiconductors Hex unbuffered inverter 18. Legal information 18.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 18.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 18.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. 74LVU04 Product data sheet Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 7 — 18 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 18 of 20 74LVU04 NXP Semiconductors Hex unbuffered inverter Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 18.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 19. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74LVU04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 18 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 19 of 20 74LVU04 NXP Semiconductors Hex unbuffered inverter 20. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 17 18 18.1 18.2 18.3 18.4 19 20 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Transfer characteristics . . . . . . . . . . . . . . . . . . 8 Application information. . . . . . . . . . . . . . . . . . 10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 18 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Contact information. . . . . . . . . . . . . . . . . . . . . 19 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP Semiconductors N.V. 2014. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 18 September 2014 Document identifier: 74LVU04