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A2I25H060GNR1

A2I25H060GNR1

  • 厂商:

    NXP(恩智浦)

  • 封装:

    TO270-17

  • 描述:

    RF Mosfet LDMOS (Dual) 28V 26mA 2.59GHz 26.1dB 10.5W TO-270WBG-17

  • 数据手册
  • 价格&库存
A2I25H060GNR1 数据手册
Freescale Semiconductor Technical Data Document Number: A2I25H060N Rev. 0, 1/2016 RF LDMOS Wideband Integrated Power Amplifiers The A2I25H060N wideband integrated circuit is an asymmetrical Doherty d e s i g n e d w i t h o n -- c h i p m a t c h i n g t h a t m a k e s i t u s a b l e f r o m 2 3 0 0 t o 2690 MHz. This multi--stage structure is rated for 20 to 32 V operation and covers all typical cellular base station modulation formats. 2600 MHz  Typical Doherty Single--Carrier W--CDMA Characterization Performance: VDD = 28 Vdc, IDQ1A = 26 mA, IDQ2A = 163 mA, VGS1B = 1.7 Vdc, VGS2B = 1.3 Vdc, Pout = 10.5 W Avg., Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF.(1) Frequency Gps (dB) PAE (%) ACPR (dBc) 2496 MHz 27.1 40.9 –31.5 2590 MHz 27.5 40.9 –34.0 2690 MHz 27.1 39.4 –34.7 A2I25H060NR1 A2I25H060GNR1 2300–2690 MHz, 10.5 W AVG., 28 V AIRFAST RF LDMOS WIDEBAND INTEGRATED POWER AMPLIFIERS TO--270WB--17 PLASTIC A2I25H060NR1 2300 MHz  Typical Doherty Single--Carrier W--CDMA Performance: VDD = 28 Vdc, IDQ1A = 28 mA, IDQ2A = 177 mA, VGS1B = 1.8 Vdc, VGS2B = 1.3 Vdc, Pout = 10.5 W Avg., Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF.(1) Frequency Gps (dB) PAE (%) ACPR (dBc) 2300 MHz 26.7 38.9 –33.7 2350 MHz 27.0 38.9 –34.8 2400 MHz 27.1 39.0 –34.7 TO--270WBG--17 PLASTIC A2I25H060GNR1 Features  Advanced High Performance In--Package Doherty  On--Chip Matching (50 Ohm Input, DC Blocked)  Integrated Quiescent Current Temperature Compensation with Enable/Disable Function (2)  Designed for Digital Predistortion Error Correction Systems 1. All data measured in fixture with device soldered to heatsink. 2. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current Control for the RF Integrated Circuit Device Family. Go to http://www.nxp.com/RF and search for AN1977 or AN1987.  Freescale Semiconductor, Inc., 2016. All rights reserved. RF Device Data Freescale Semiconductor, Inc. A2I25H060NR1 A2I25H060GNR1 1 VDS1A VBWA RFinA VDS1A VGS2A VGS1A RFinA N.C. GND GND N.C. RFinB VGS1B VGS2B VDS1B RFout1/VDS2A VGS1A Quiescent Current Temperature Compensation (1) VGS2A VGS1B Quiescent Current Temperature Compensation (1) VGS2B RFinB RFout2/VDS2B VDS1B VBWB 1 2 3 4 5 6 7 8 9 10 11 12 Carrier 17 16 15 14 13 Peaking VBWA(2) RFout1/VDS2A GND RFout2/VDS2B VBWB(2) (Top View) Note: Exposed backside of the package is the source terminal for the transistors. Figure 1. Functional Block Diagram Figure 2. Pin Connections 2. Device can operate with VDD current supplied through pin 13 and pin 17. 1. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current Control for the RF Integrated Circuit Device Family. Go to http://www.nxp.com/RF and search for AN1977 or AN1987. Table 1. Maximum Ratings Rating Symbol Value Unit Drain--Source Voltage VDSS –0.5, +65 Vdc Gate--Source Voltage VGS –0.5, +10 Vdc Operating Voltage VDD 32, +0 Vdc Storage Temperature Range Tstg –65 to +150 C TC –40 to +150 C TJ –40 to +225 C Pin 22 dBm Symbol Value (4,5) Case Operating Temperature Range Operating Junction Temperature Range (3,4) Input Power Table 2. Thermal Characteristics Characteristic Thermal Resistance, Junction to Case Case Temperature 77C, 10.5 W Avg., 2590 MHz Stage 1, 28 Vdc, IDQ1A = 30 mA, VG1A = 3.5 Vdc, VG1B = 1.7 Vdc Stage 2, 28 Vdc, IDQ2A = 190 mA, VG2A = 3.65 Vdc, VG2B = 1.3 Vdc RJC Unit C/W 5.6 2.2 Table 3. ESD Protection Characteristics Test Methodology Class Human Body Model (per JESD22--A114) 1B Machine Model (per EIA/JESD22--A115) A Charge Device Model (per JESD22--C101) II Table 4. Moisture Sensitivity Level Test Methodology Per JESD22--A113, IPC/JEDEC J--STD--020 Rating Package Peak Temperature Unit 3 260 C 3. Continuous use at maximum temperature will affect MTTF. 4. MTTF calculator available at http://www.nxp.com/RF/calculators. 5. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.nxp.com/RF and search for AN1955. A2I25H060NR1 A2I25H060GNR1 2 RF Device Data Freescale Semiconductor, Inc. Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) Symbol Min Typ Max Unit Zero Gate Voltage Drain Leakage Current (VDS = 65 Vdc, VGS = 0 Vdc) IDSS — — 10 Adc Zero Gate Voltage Drain Leakage Current (VDS = 32 Vdc, VGS = 0 Vdc) IDSS — — 1 Adc Gate--Source Leakage Current (VGS = 1.0 Vdc, VDS = 0 Vdc) IGSS — — 1 Adc Gate Threshold Voltage (1) (VDS = 10 Vdc, ID = 4 Adc) VGS(th) 0.8 1.2 1.6 Vdc Gate Quiescent Voltage (VDS = 28 Vdc, IDQ1A = 26 mAdc) VGS(Q) — 2.0 — Vdc Fixture Gate Quiescent Voltage (VDD = 28 Vdc, IDQ1A = 26 mAdc, Measured in Functional Test) VGG(Q) 2.9 3.5 4.4 Vdc Zero Gate Voltage Drain Leakage Current (VDS = 65 Vdc, VGS = 0 Vdc) IDSS — — 10 Adc Zero Gate Voltage Drain Leakage Current (VDS = 32 Vdc, VGS = 0 Vdc) IDSS — — 1 Adc Gate--Source Leakage Current (VGS = 1.0 Vdc, VDS = 0 Vdc) IGSS — — 1 Adc Gate Threshold Voltage (1) (VDS = 10 Vdc, ID = 26 Adc) VGS(th) 0.8 1.2 1.6 Vdc Gate Quiescent Voltage (VDS = 28 Vdc, IDQ2A = 174 mAdc) VGS(Q) — 1.7 — Vdc Fixture Gate Quiescent Voltage (VDD = 28 Vdc, IDQ2A = 174 mAdc, Measured in Functional Test) VGG(Q) 2.9 3.6 4.4 Vdc Drain--Source On--Voltage (1) (VGS = 10 Vdc, ID = 350 mAdc) VDS(on) 0.1 0.22 1.5 Vdc Characteristic Carrier Stage 1 -- Off Characteristics (1) Carrier Stage 1 -- On Characteristics Carrier Stage 2 -- Off Characteristics (1) Carrier Stage 2 -- On Characteristics 1. Each side of device measured separately. (continued) A2I25H060NR1 A2I25H060GNR1 RF Device Data Freescale Semiconductor, Inc. 3 Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) (continued) Characteristic Symbol Min Typ Max Unit Zero Gate Voltage Drain Leakage Current (VDS = 65 Vdc, VGS = 0 Vdc) IDSS — — 10 Adc Zero Gate Voltage Drain Leakage Current (VDS = 32 Vdc, VGS = 0 Vdc) IDSS — — 1 Adc Gate--Source Leakage Current (VGS = 1.0 Vdc, VDS = 0 Vdc) IGSS — — 1 Adc VGS(th) 0.8 1.2 1.6 Vdc Zero Gate Voltage Drain Leakage Current (VDS = 65 Vdc, VGS = 0 Vdc) IDSS — — 10 Adc Zero Gate Voltage Drain Leakage Current (VDS = 32 Vdc, VGS = 0 Vdc) IDSS — — 1 Adc Gate--Source Leakage Current (VGS = 1.0 Vdc, VDS = 0 Vdc) IGSS — — 1 Adc Gate Threshold Voltage (VDS = 10 Vdc, ID = 42 Adc) VGS(th) 0.8 1.2 1.6 Vdc Drain--Source On--Voltage (VGS = 10 Vdc, ID = 565 mAdc) VDS(on) 0.1 0.22 1.5 Vdc Peaking Stage 1 -- Off Characteristics (1) Peaking Stage 1 -- On Characteristics (1) Gate Threshold Voltage (VDS = 10 Vdc, ID = 8 Adc) Peaking Stage 2 -- Off Characteristics (1) Peaking Stage 2 -- On Characteristics (1) 1. Each side of device measured separately. (continued) A2I25H060NR1 A2I25H060GNR1 4 RF Device Data Freescale Semiconductor, Inc. Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) (continued) Characteristic Symbol Min Typ Max Unit (1,2,3) Functional Tests (In Freescale Doherty Production Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1A = 26 mA, IDQ2A = 174 mA, VGS1B = 1.7 Vdc, VGS2B = 1.3 Vdc, Pout = 10.5 W Avg., f = 2590 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset. Power Gain Gps 24.6 26.1 28.0 dB Power Added Efficiency PAE 37.5 40.4 — % Adjacent Channel Power Ratio ACPR — –31.6 –28.0 dBc Pout @ 3 dB Compression Point P3dB 38.9 48.2 — W (2) (In Load Mismatch Freescale Doherty Production Test Fixture, 50 ohm system) IDQ1A = 26 mA, IDQ2A = 174 mA, VGS1B = 1.7 Vdc, VGS2B = 1.3 Vdc, f = 2590 MHz VSWR 10:1 at 32 Vdc, 55 W CW Output Power (3 dB Input Overdrive from 36 W CW Rated Power) No Device Degradation Typical Performance (2) (In Freescale Doherty Characterization Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1A = 26 mA, IDQ2A = 163 mA, VGS1B = 1.7 Vdc, VGS2B = 1.3 Vdc, 2496–2690 MHz Bandwidth Pout @ 1 dB Compression Point, CW P1dB — 52 — W (4) P3dB — 57 — W AM/PM (Maximum value measured at the P3dB compression point across the 2496–2690 MHz frequency range.)  — –27.2 —  VBWres — 180 — MHz — — 4.76 2.33 — — Pout @ 3 dB Compression Point VBW Resonance Point (IMD Third Order Intermodulation Inflection Point) Quiescent Current Accuracy over Temperature (5) with 2 k Gate Feed Resistors (–30 to 85C) Stage 1 with 2 k Gate Feed Resistors (–30 to 85C) Stage 2 IQT % Gain Flatness in 194 MHz Bandwidth @ Pout = 10.5 W Avg. GF — 0.312 — dB Gain Variation over Temperature (–30C to +85C) G — 0.030 — dB/C P1dB — 0.006 — dB/C Output Power Variation over Temperature (–30C to +85C) Table 6. Ordering Information Device A2I25H060NR1 A2I25H060GNR1 Tape and Reel Information R1 Suffix = 500 Units, 44 mm Tape Width, 13--inch Reel Package TO--270WB--17 TO--270WBG--17 1. Part internally matched both on input and output. 2. Measurements made with device in an asymmetrical Doherty configuration. 3. Measurements made with device in straight lead configuration before any lead forming operation is applied. Lead forming is used for gull wing (GN) parts. 4. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF. 5. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current Control for the RF Integrated Circuit Device Family. Go to http://www.nxp.com/RF and search for AN1977 or AN1987. A2I25H060NR1 A2I25H060GNR1 RF Device Data Freescale Semiconductor, Inc. 5 VGG2A C16 C18 VDD1A R1 VGG1A A2I25H060N Rev. 0 C11 R2 C VDD2A C1 C14 CUT OUT AREA C7 C5 R5 Z1 C4 C10 C9 C13 C3 C6 C8 VDD1B VGG1B R4 C12 C15 C2 R3 P VDD2B C17 VGG2B C19 Figure 3. A2I25H060NR1 Production Test Circuit Component Layout Table 7. A2I25H060NR1 Production Test Circuit Component Designations and Values Part Description Part Number Manufacturer C1, C2, C3 6.8 pF Chip Capacitors ATC600F6R8BT250XT ATC C4 1.2 pF Chip Capacitor ATC600F1R2BT250XT ATC C5, C6, C7, C8, C16, C17 4.7 F Chip Capacitors GRM31CR71H475KA12L Murata C9 4.7 pF Chip Capacitor ATC600F4R7BT250XT ATC C10 0.2 pF Chip Capacitor ATC600F0R2BT250XT ATC C11, C12, C18, C19 10 F Chip Capacitors GRM31CR61H106KA12L Murata C13 1 pF Chip Capacitor ATC600F1R0BT250XT ATC C14, C15 1 F Chip Capacitors GRM31MR71H105KA88L Murata R1, R2, R3, R4 2 k, 1/4 W Chip Resistors SG73P2ATTD2001F KOA Speer R5 50 , 10 W Termination RFP-060120A25Z50--2 Anaren Z1 2300–2700 MHz Band, 90, 2 dB Hybrid Coupler CMX25Q02 RN2 Technologies PCB Rogers RO4350B, 0.020, r = 3.66 — MTL A2I25H060NR1 A2I25H060GNR1 6 RF Device Data Freescale Semiconductor, Inc. VGG2A C16 C18 VDD1A R1 VGG1A A2I25H060N Rev. 0 C11 R2 C VDD2A D76511 C14 C7 C20 C5 R5 C9 Q1 Z1 C4 C3 C2 C13 C21 C6 C8 VDD1B VGG1B C1 C10 R4 C12 C15 P R3 VDD2B C17 VGG2B C19 Note: All data measured in fixture with device soldered to heatsink. Figure 4. A2I25H060NR1 Characterization Test Circuit Component Layout Table 8. A2I25H060NR1 Characterization Test Circuit Component Designations and Values Part Description Part Number Manufacturer C1, C2, C5, C6, C7, C8, C16, C17 4.7 F Chip Capacitors GRM31CR71H475KA12L Murata C3 6.8 pF Chip Capacitor ATC600F6R8BT250XT ATC C4 1.2 pF Chip Capacitor ATC600F1R2BT250XT ATC C9 3.6 pF Chip Capacitor ATC600F3R6BT250XT ATC C10 0.2 pF Chip Capacitor ATC600F0R2BT250XT ATC C11, C12, C18, C19, C20, C21 10 F Chip Capacitors GRM31CR61H106KA12L Murata C13 1.5 pF Chip Capacitor ATC600F1R5BT250XT ATC C14, C15 1 F Chip Capacitors GRM31MR71H105KA88L Murata Q1 RF LDMOS Power Amplifier A2I25H060NR1 Freescale R1, R2, R3, R4 2 k, 1/4 W Chip Resistors SG73P2ATTD2001F KOA Speer R5 50 , 10 W Termination RFP-060120A25Z50--2 Anaren Z1 2300–2700 MHz Band, 90, 2 dB Hybrid Coupler CMX25Q02 RN2 Technologies PCB Rogers RO4350B, 0.020, r = 3.66 D76511 MTL A2I25H060NR1 A2I25H060GNR1 RF Device Data Freescale Semiconductor, Inc. 7 TYPICAL CHARACTERISTICS 41 28.5 Single--Carrier W--CDMA, 3.84 MHz Channel 28 Bandwidth, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF 27.5 40 PAE 39 Gps 27 PARC 26.5 –1 –30 –1.5 –32 ACPR 26 –28 –34 –36 25.5 25 2480 2510 2540 2570 2600 2630 f, FREQUENCY (MHz) 2660 2690 –38 2720 –2 –2.5 –3 PARC (dB) Gps, POWER GAIN (dB) 29 42 ACPR (dBc) VDD = 28 Vdc, Pout = 10.5 W (Avg.), IDQ1A = 26 mA IDQ2A = 163 mA, VGS1B = 1.7 Vdc, VGS2B = 1.3 Vdc PAE, POWER ADDED EFFICIENCY (%) 43 30 29.5 –3.5 IMD, INTERMODULATION DISTORTION (dBc) Figure 5. Single--Carrier Output Peak--to--Average Ratio Compression (PARC) Broadband Performance @ Pout = 10.5 Watts Avg. –10 VDD = 28 Vdc, Pout = 21 W (PEP), IDQ1A = 26 mA IDQ2A = 163 mA, VGS1B = 1.7 Vdc, VGS2B = 1.3 Vdc Two--Tone Measurements, (f1 + f2)/2 = Center Frequency of 2590 MHz –20 IM3--U –30 IM3--L –40 IM5--L IM5--U –50 IM7--L –60 1 IM7--U 10 300 100 TWO--TONE SPACING (MHz) 28.5 –1 28 27.5 27 26.5 26 VDD = 28 Vdc, IDQ1A = 26 mA, IDQ2A = 163 mA VGS1B = 1.7 Vdc, VGS2B = 1.3 Vdc, f = 2590 MHz –1 dB = 7.8 W –2 50 PAE ACPR 40 –3 dB = 15.1 W –3 30 –2 dB = 11.4 W –4 20 Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF –5 –6 0 5 Gps PARC 20 10 15 Pout, OUTPUT POWER (WATTS) 25 –10 60 10 0 30 –20 –30 –40 ACPR (dBc) 0 PAE, POWER ADDED EFFICIENCY (%) 29 OUTPUT COMPRESSION AT 0.01% PROBABILITY ON CCDF (dB) Gps, POWER GAIN (dB) Figure 6. Intermodulation Distortion Products versus Two--Tone Spacing –50 –60 –70 Figure 7. Output Peak--to--Average Ratio Compression (PARC) versus Output Power A2I25H060NR1 A2I25H060GNR1 8 RF Device Data Freescale Semiconductor, Inc. TYPICAL CHARACTERISTICS 28 2496 MHz 2496 MHz 2590 MHz 40 2690 MHz 2590 MHz 27 30 2690 MHz 26 2590 MHz 2690 MHz 20 2496 MHz 25 24 50 ACPR 1 Gps 3.84 MHz Channel Bandwidth, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF 10 Pout, OUTPUT POWER (WATTS) AVG. 10 10 0 40 0 –10 –20 –30 ACPR (dBc) 29 Gps, POWER GAIN (dB) 60 VDD = 28 Vdc, IDQ1A = 26 mA, IDQ2A = 163 mA VGS1B = 1.7 Vdc, VGS2B = 1.3 Vdc Single--Carrier W--CDMA PAE PAE, POWER ADDED EFFICIENCY (%) 30 –40 –50 Figure 8. Single--Carrier W--CDMA Power Gain, Power Added Efficiency and ACPR versus Output Power 28 Gain 26 GAIN (dB) 24 22 20 VDD = 28 Vdc Pin = 0 dBm IDQ1A = 26 mA, IDQ2A = 163 mA VGS1B = 1.7 Vdc, VGS2B = 1.3 Vdc 18 16 2200 2300 2400 2500 2600 2700 f, FREQUENCY (MHz) 2800 2900 3000 Figure 9. Broadband Frequency Response A2I25H060NR1 A2I25H060GNR1 RF Device Data Freescale Semiconductor, Inc. 9 Table 9. Carrier Side Load Pull Performance — Maximum Power Tuning VDD = 28 Vdc, IDQ1A = 28 mA, IDQ1B = 182 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Output Power P1dB Zload () (1) Gain (dB) (dBm) (W) D (%) AM/PM () 10.6 – j11.1 31.9 44.5 28 53.1 –6 9.99 – j10.6 32.0 44.5 28 54.9 –8 31.6 44.1 26 52.8 –9 Zsource () Zin () 2496 60.5 – j0.96 57.6 + j1.40 2590 61.5 + j10.9 57.1 – j8.84 2690 60.1 + j18.7 57.9 – j11.6 8.28 – j10.5 f (MHz) Max Output Power P3dB f (MHz) Zsource () Zin () Zload (2) () Gain (dB) (dBm) (W) D (%) AM/PM () 2496 60.5 – j0.96 55.6 – j1.26 10.4 – j11.5 29.8 45.4 35 55.0 –10 2590 61.5 + j10.9 53.7 – j8.80 9.79 – j11.2 29.8 45.4 35 56.1 –14 2690 60.1 + j18.7 54.8 – j8.94 8.61 – j11.3 29.5 45.0 32 54.9 –17 (1) Load impedance for optimum P1dB power. (2) Load impedance for optimum P3dB power. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Table 10. Carrier Side Load Pull Performance — Maximum Efficiency Tuning VDD = 28 Vdc, IDQ1A = 28 mA, IDQ1B = 182 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Drain Efficiency P1dB f (MHz) Zsource () Zin () Zload (1) () Gain (dB) (dBm) (W) D (%) AM/PM () 2496 60.5 – j0.96 60.8 + j0.12 15.3 – j5.12 32.8 43.5 22 59.1 –8 2590 61.5 + j10.9 59.4 – j12.2 12.3 – j3.64 33.0 43.2 21 60.4 –9 2690 60.1 + j18.7 57.9 – j16.6 9.70 – j5.83 32.7 43.3 21 59.0 –9 Max Drain Efficiency P3dB Gain (dB) (dBm) (W) D (%) AM/PM () 14.7 – j5.71 30.8 44.5 28 60.0 –10 56.0 – j11.9 12.1 – j4.46 30.9 44.3 27 61.5 –14 54.7 – j14.0 9.51 – j5.64 30.7 44.1 26 60.4 –17 f (MHz) Zsource () Zin () 2496 60.5 – j0.96 58.6 – j1.83 2590 61.5 + j10.9 2690 60.1 + j18.7 Zload () (2) (1) Load impedance for optimum P1dB efficiency. (2) Load impedance for optimum P3dB efficiency. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Input Load Pull Tuner and Test Circuit Output Load Pull Tuner and Test Circuit Device Under Test Zsource Zin Zload A2I25H060NR1 A2I25H060GNR1 10 RF Device Data Freescale Semiconductor, Inc. Table 11. Peaking Side Load Pull Performance — Maximum Power Tuning VDD = 28 Vdc, VGSA = 1.0 Vdc, VGSB = 1.0 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Output Power P1dB Zsource () Zin () 2496 57.3 – j1.04 47.3 – j5.57 2590 61.1 + j16.3 48.1 – j12.9 2690 61.5 + j21.7 52.7 – j10.3 f (MHz) Zload () (1) Gain (dB) (dBm) (W) D (%) AM/PM () 4.76 – j7.37 23.1 47.5 57 56.2 –32 4.63 – j7.34 23.5 47.5 56 57.0 –38 4.21 – j7.51 23.4 47.1 52 57.6 –43 Max Output Power P3dB f (MHz) Zsource () Zin () Zload (2) () Gain (dB) (dBm) (W) D (%) AM/PM () 2496 57.3 – j1.04 42.5 – j5.20 4.68 – j7.45 21.0 47.8 60 55.0 –44 2590 61.1 + j16.3 44.6 – j8.75 4.63 – j7.51 21.4 47.7 59 56.1 –50 2690 61.5 + j21.7 52.2 – j4.81 4.14 – j7.58 21.3 47.3 54 57.0 –54 (1) Load impedance for optimum P1dB power. (2) Load impedance for optimum P3dB power. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Table 12. Peaking Side Load Pull Performance — Maximum Efficiency Tuning VDD = 28 Vdc, VGSA = 1.0 Vdc, VGSB = 1.0 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Drain Efficiency P1dB f (MHz) Zsource () Zin () Zload (1) () Gain (dB) (dBm) (W) D (%) AM/PM () 2496 57.3 – j1.04 51.2 – j5.71 7.34 – j4.47 23.0 46.6 45 61.3 –35 2590 61.1 + j16.3 50.6 – j15.7 6.35 – j5.05 23.6 46.8 47 62.0 –39 2690 61.5 + j21.7 52.3 – j15.2 5.07 – j4.95 23.4 46.2 42 62.8 –46 Max Drain Efficiency P3dB Gain (dB) (dBm) (W) D (%) AM/PM () 6.93 – j5.75 21.1 47.2 53 59.3 –47 45.6 – j11.3 6.12 – j4.93 21.5 47.0 50 60.5 –55 51.0 – j7.68 5.07 – j5.45 21.4 46.6 46 61.3 –60 f (MHz) Zsource () Zin () 2496 57.3 – j1.04 44.4 – j6.29 2590 61.1 + j16.3 2690 61.5 + j21.7 Zload () (2) (1) Load impedance for optimum P1dB efficiency. (2) Load impedance for optimum P3dB efficiency. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Input Load Pull Tuner and Test Circuit Output Load Pull Tuner and Test Circuit Device Under Test Zsource Zin Zload A2I25H060NR1 A2I25H060GNR1 RF Device Data Freescale Semiconductor, Inc. 11 P1dB – TYPICAL CARRIER LOAD PULL CONTOURS — 2590 MHz 5 5 40.5 41 50 41.5 42 E –5 43.5 –10 P 44.5 42.5 43 –20 E –5 60 56 58 54 52 –10 P 44 –15 50 –15 43 8 6 48 44 43.5 10 12 18 16 14 REAL () 20 48 0 IMAGINARY () IMAGINARY () 0 48 22 –20 24 8 6 10 12 14 16 REAL () 18 46 20 44 22 24 Figure 11. P1dB Load Pull Efficiency Contours (%) Figure 10. P1dB Load Pull Output Power Contours (dBm) 5 5 0 0 33 E –5 IMAGINARY () IMAGINARY () –14 32.5 –10 P –12 –10 –5 EE –8 –10 PP 32 –15 –20 30 29.5 6 8 10 –15 31.5 31 30.5 12 14 16 REAL () –6 –8 18 20 22 24 Figure 12. P1dB Load Pull Gain Contours (dB) NOTE: –20 6 8 10 12 14 16 REAL () 18 20 22 24 Figure 13. P1dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Drain Efficiency Gain Drain Efficiency Linearity Output Power A2I25H060NR1 A2I25H060GNR1 12 RF Device Data Freescale Semiconductor, Inc. P3dB – TYPICAL CARRIER LOAD PULL CONTOURS — 2590 MHz 5 42 41.5 IMAGINARY () 0 0 43 43.5 E –5 44 45 –10 P –15 E –5 60 –10 44.5 8 6 10 12 18 16 14 REAL () 20 22 –20 24 56 54 52 50 48 46 8 6 5 5 0 0 –20 IMAGINARY () 31 E –5 30.5 –10 P 10 12 18 14 16 REAL () 20 22 24 Figure 15. P3dB Load Pull Efficiency Contours (%) Figure 14. P3dB Load Pull Output Power Contours (dBm) IMAGINARY () 58 P –15 44 –20 54 50 42.5 IMAGINARY () 5 –12 –18 –16 –10 E –5 –14 –10 –14 P 30 –15 –20 28 6 8 10 –15 29.5 29 28.5 12 14 16 REAL () –8 18 20 22 24 Figure 16. P3dB Load Pull Gain Contours (dB) NOTE: –20 6 8 10 12 14 16 REAL () 18 20 22 24 Figure 17. P3dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Drain Efficiency Gain Drain Efficiency Linearity Output Power A2I25H060NR1 A2I25H060GNR1 RF Device Data Freescale Semiconductor, Inc. 13 P1dB – TYPICAL PEAKING LOAD PULL CONTOURS — 2590 MHz 0 45 58 –4 E 46 –6 P –8 46 –4 E 60 –6 56 P –8 47 –10 54 –10 45.5 –12 54 –2 45.5 IMAGINARY () IMAGINARY () 44 43.5 –2 0 44.5 3 2 46 46.5 4 5 6 7 8 REAL () 9 10 11 12 –12 21 –2 4 5 6 7 8 REAL () 9 –46 –2 IMAGINARY () IMAGINARY () E –6 –8 23.5 12 –38 E –36 –6 –34 P –8 –32 –30 –10 –10 22 21 –12 –40 –4 23 21.5 11 –44 –42 –4 P 10 0 22 21.5 3 Figure 19. P1dB Load Pull Efficiency Contours (%) Figure 18. P1dB Load Pull Output Power Contours (dBm) 0 2 52 50 48 2 3 22.5 4 5 6 7 8 9 10 11 12 –12 2 3 4 5 6 7 8 9 10 11 REAL () REAL () Figure 20. P1dB Load Pull Gain Contours (dB) Figure 21. P1dB Load Pull AM/PM Contours () NOTE: P = Maximum Output Power E = Maximum Drain Efficiency 12 Gain Drain Efficiency Linearity Output Power A2I25H060NR1 A2I25H060GNR1 14 RF Device Data Freescale Semiconductor, Inc. P3dB – TYPICAL PEAKING LOAD PULL CONTOURS — 2590 MHz 0 43.5 50 45 –2 45.5 –4 46 E –6 46.5 47.5 47 P –8 52 IMAGINARY () IMAGINARY () –2 0 44.5 44 –4 –10 –12 –12 3 2 4 5 6 7 8 REAL () 9 10 11 12 0 52 44 2 3 4 5 50 48 46 6 7 8 REAL () 9 10 11 12 0 19.5 19 –2 20 –2 –4 IMAGINARY () IMAGINARY () 54 Figure 23. P3dB Load Pull Efficiency Contours (%) Figure 22. P3dB Load Pull Output Power Contours (dBm) E –6 21.5 P –8 19.5 21 –10 20 19 –12 60 P –8 –10 56 58 E –6 2 3 –60 –58 –56 –4 –54 –52 E –50 –6 –48 P –8 –46 –44 –10 20.5 4 5 6 7 8 9 10 11 12 –12 2 3 4 5 6 7 8 9 10 11 REAL () REAL () Figure 24. P3dB Load Pull Gain Contours (dB) Figure 25. P3dB Load Pull AM/PM Contours () NOTE: P = Maximum Output Power E = Maximum Drain Efficiency 12 Gain Drain Efficiency Linearity Output Power A2I25H060NR1 A2I25H060GNR1 RF Device Data Freescale Semiconductor, Inc. 15 R6 R1 R2 C7 C18 C17 C25 C26 C27 C19 C23 C3 C2 R5 C1 C9 Z1 C C12 C16 Q1 C10 C13 P C14 C20 C15 C4 C5 C6 C21 C22 R4 C24 C8 C11 A2I25H060N Rev. 0 D76512 C28 C29 C30 R3 R7 Note: All data measured in fixture with device soldered to heatsink. Figure 26. A2I25H060NR1 Test Circuit Component Layout —2300–2400 MHz Table 13. A2I25H060NR1 Test Circuit Component Designations and Values —2300–2400 MHz Part Description Part Number Manufacturer C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11 8.2 pF Chip Capacitors ATC600F8R2BT250XT ATC C12, C13 0.5 pF Chip Capacitors ATC600F0R5BT250XT ATC C14 0.3 pF Chip Capacitor ATC600F0R3BT250XT ATC C15 12 pF Chip Capacitor ATC600F12R0BT250XT ATC C16 1.5 pF Chip Capacitor ATC600F1R5BT250XT ATC C17, C18, C19, C20, C21, C22, C23, C24, C25, C26, C27, C28, C29, C30 10 F Chip Capacitors GRM32ER61H106KA12L Murata Q1 RF LDMOS Power Amplifier A2I25H060NR1 Freescale R1, R2, R3, R4 2 k, 1/4 W Chip Resistors SG73P2ATTD2001F KOA Speer R5 50 , 10 W Termination RFP-060120A25Z50--2 Anaren R6, R7 0 , 3 A Chip Resistors CRCW12060000Z0EA Vishay Z1 2300–2700 MHz Band, 90, 2 dB Hybrid Coupler CMX25Q02 RN2 Technologies PCB Rogers RO4350B, 0.020, r = 3.66 D76512 MTL A2I25H060NR1 A2I25H060GNR1 16 RF Device Data Freescale Semiconductor, Inc. Gps, POWER GAIN (dB) 27.6 39.5 PAE 27.4 Single--Carrier W--CDMA, 3.84 MHz Channel 27.2 Bandwidth, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF 27 Gps 26.6 PARC ACPR 26.2 26 2290 2305 38.5 38 26.8 26.4 39 –28 –1 –30 –1.5 –32 –34 –36 2320 2335 2350 2365 f, FREQUENCY (MHz) 2380 2395 ACPR (dBc) VDD = 28 Vdc, Pout = 10.5 W (Avg.), IDQ1A = 28 mA IDQ2A = 177 mA, VGS1B = 1.8 Vdc, VGS2B = 1.3 Vdc –2 –2.5 –3 PARC (dB) 40 28 27.8 PAE, POWER ADDED EFFICIENCY (%) TYPICAL CHARACTERISTICS — 2300–2400 MHz –3.5 –38 2410 Figure 27. Single--Carrier Output Peak--to--Average Ratio Compression (PARC) Broadband Performance @ Pout = 10.5 Watts Avg. 27 2300 MHz Gps PAE 2400 MHz 2350 MHz 26 50 40 30 2400 MHz 25 60 2300 MHz 2350 MHz 20 2400 MHz 24 23 ACPR 3.84 MHz Channel Bandwidth, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF 10 Pout, OUTPUT POWER (WATTS) AVG. 1 10 10 0 40 0 –10 –20 –30 ACPR (dBc) 28 VDD = 28 Vdc, IDQ1A = 28 mA, IDQ2A = 177 mA 2300 MHz VGS1B = 1.8 Vdc, VGS2B = 1.3 Vdc Single--Carrier W--CDMA 2350 MHz PAE, POWER ADDED EFFICIENCY (%) Gps, POWER GAIN (dB) 29 –40 –50 Figure 28. Single--Carrier W--CDMA Power Gain, Power Added Efficiency and ACPR versus Output Power 28 Gain 26 GAIN (dB) 24 22 20 VDD = 28 Vdc Pin = 0 dBm IDQ1A = 28 mA, IDQ2A = 177 mA VGS1B = 1.8 Vdc, VGS2B = 1.3 Vdc 18 16 2000 2100 2200 2300 2400 2500 f, FREQUENCY (MHz) 2600 2700 2800 Figure 29. Broadband Frequency Response A2I25H060NR1 A2I25H060GNR1 RF Device Data Freescale Semiconductor, Inc. 17 Table 14. Carrier Side Load Pull Performance — Maximum Power Tuning VDD = 28 Vdc, IDQ1A = 28 mA, IDQ1B = 182 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Output Power P1dB f (MHz) Zsource () Zin () 2300 26.5 – j9.90 26.4 + j7.78 2400 44.2 – j12.0 42.3 + j9.38 Zload () (1) Gain (dB) (dBm) (W) D (%) AM/PM () 9.63 – j12.0 30.7 44.4 28 52.7 –4 10.1 – j11.7 31.1 44.3 27 51.2 –2 Max Output Power P3dB f (MHz) Zsource () Zin () Zload (2) () 2300 26.5 – j9.90 27.5 + j6.96 9.11 – j12.5 28.6 45.2 33 53.3 –6 2400 44.2 – j12.0 42.7 + j7.17 9.76 – j11.9 29.0 45.2 33 52.1 –5 Gain (dB) (dBm) (W) D (%) AM/PM () (1) Load impedance for optimum P1dB power. (2) Load impedance for optimum P3dB power. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Table 15. Carrier Side Load Pull Performance — Maximum Efficiency Tuning VDD = 28 Vdc, IDQ1A = 28 mA, IDQ1B = 182 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Drain Efficiency P1dB f (MHz) Zsource () Zin () 2300 26.5 – j9.90 27.3 + j8.98 2400 44.2 – j12.0 44.7 + j10.3 Zload () (1) Gain (dB) (dBm) (W) D (%) AM/PM () 18.2 – j10.7 31.8 43.2 21 59.0 –6 16.7 – j7.02 32.3 43.3 21 56.9 –4 Max Drain Efficiency P3dB f (MHz) Zsource () Zin () Zload (2) () 2300 26.5 – j9.90 28.1 + j8.20 17.0 – j10.3 29.7 44.2 26 59.2 –9 2400 44.2 – j12.0 44.7 + j8.13 17.0 – j7.71 30.3 44.1 26 57.7 –6 Gain (dB) (dBm) (W) D (%) AM/PM () (1) Load impedance for optimum P1dB efficiency. (2) Load impedance for optimum P3dB efficiency. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Input Load Pull Tuner and Test Circuit Output Load Pull Tuner and Test Circuit Device Under Test Zsource Zin Zload A2I25H060NR1 A2I25H060GNR1 18 RF Device Data Freescale Semiconductor, Inc. Table 16. Peaking Side Load Pull Performance — Maximum Power Tuning VDD = 28 Vdc, VGSA = 1.0 Vdc, VGSB = 1.0 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Output Power P1dB f (MHz) Zsource () Zin () 2300 23.9 + j2.41 24.2 – j4.45 2400 36.1 – j2.99 35.3 – j2.41 Zload () (1) Gain (dB) (dBm) (W) D (%) AM/PM () 4.16 – j7.89 21.4 47.4 55 54.7 –32 4.57 – j7.10 22.2 47.4 54 54.2 –31 Max Output Power P3dB f (MHz) Zsource () Zin () Zload (2) () 2300 23.9 + j2.41 24.4 – j6.32 4.16 – j7.97 19.4 47.7 59 53.9 –42 2400 36.1 – j2.99 32.8 – j4.53 4.57 – j7.27 20.2 47.6 58 53.3 –42 Gain (dB) (dBm) (W) D (%) AM/PM () (1) Load impedance for optimum P1dB power. (2) Load impedance for optimum P3dB power. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Table 17. Peaking Side Load Pull Performance — Maximum Efficiency Tuning VDD = 28 Vdc, VGSA = 1.0 Vdc, VGSB = 1.0 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Drain Efficiency P1dB f (MHz) Zsource () Zin () 2300 23.9 + j2.41 24.7 – j3.51 2400 36.1 – j2.99 37.0 – j1.38 Zload () (1) Gain (dB) (dBm) (W) D (%) AM/PM () 7.56 – j8.25 21.3 46.6 45 60.5 –34 8.23 – j5.70 22.0 46.4 44 59.7 –34 Max Drain Efficiency P3dB f (MHz) Zsource () Zin () Zload (2) () 2300 23.9 + j2.41 24.8 – j5.77 6.68 – j8.13 19.4 47.1 52 58.0 –46 2400 36.1 – j2.99 34.2 – j4.41 7.40 – j5.84 20.1 47.0 50 57.3 –47 Gain (dB) (dBm) (W) D (%) AM/PM () (1) Load impedance for optimum P1dB efficiency. (2) Load impedance for optimum P3dB efficiency. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Input Load Pull Tuner and Test Circuit Output Load Pull Tuner and Test Circuit Device Under Test Zsource Zin Zload A2I25H060NR1 A2I25H060GNR1 RF Device Data Freescale Semiconductor, Inc. 19 P1dB – TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 2300 MHz 5 5 41.5 41 0 –5 IMAGINARY () IMAGINARY () 0 40.5 42 42.5 –10 E P 44 –15 –25 10 5 –10 EE PP 15 42.5 20 REAL () 25 30 35 5 0 0 10 5 –5 –5 IMAGINARY () IMAGINARY () E –15 29 –25 10 20 REAL () 20 REAL () 30 25 35 –10 –10 P –15 E –4 –6 31.5 15 50 –8 –20 29.5 30.5 5 15 32 31 30 48 –12 –14 P 46 52 Figure 31. P1dB Load Pull Efficiency Contours (%) 5 –10 56 54 44 –25 Figure 30. P1dB Load Pull Output Power Contours (dBm) –20 58 –15 –20 42.5 42 41 41.5 –5 43 43.5 –20 52 41 25 30 35 Figure 32. P1dB Load Pull Gain Contours (dB) NOTE: –25 0 5 –2 10 15 20 REAL () 25 30 35 Figure 33. P1dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Drain Efficiency Gain Drain Efficiency Linearity Output Power A2I25H060NR1 A2I25H060GNR1 20 RF Device Data Freescale Semiconductor, Inc. P3dB – TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 2300 MHz 5 0 5 41 41.5 0 –5 –10 E P 45 –15 44.5 –20 –25 IMAGINARY () IMAGINARY () 42 41 41.5 43.5 44 10 15 42 20 REAL () 25 30 –10 E 58 P 56 –15 –20 42.5 5 –5 54 41.5 43 42 54 –25 35 Figure 34. P3dB Load Pull Output Power Contours (dBm) 52 44 46 10 5 50 48 15 20 REAL () 30 25 35 Figure 35. P3dB Load Pull Efficiency Contours (%) 5 5 0 0 –5 –5 –10 IMAGINARY () IMAGINARY () –16 E P –15 27 –20 –25 26.5 5 29 28 –12 –10 E P 20 REAL () 25 30 35 Figure 36. P3dB Load Pull Gain Contours (dB) NOTE: –25 –8 –6 –20 0 15 –10 –15 30 29.5 27.5 28.5 10 –14 5 –2 10 –4 15 20 REAL () 25 30 35 Figure 37. P3dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Drain Efficiency Gain Drain Efficiency Linearity Output Power A2I25H060NR1 A2I25H060GNR1 RF Device Data Freescale Semiconductor, Inc. 21 P1dB – TYPICAL PEAKING LOAD PULL CONTOURS — 2300 MHz –2 45.5 45 44 –2 45 –4 P –8 E –10 46 –12 –14 44 3 2 45.5 6 5 7 8 REAL () 44.5 9 10 11 60 P –8 E –10 2 3 4 7 8 REAL () 9 10 11 12 –2 18 18.5 19.5 19 20 21 20.5 –6 –4 21.5 P –8 E –10 –6 –40 P –8 E –10 –26 –28 –38 –36 –34 –24 –12 –14 6 5 Figure 39. P1dB Load Pull Efficiency Contours (%) IMAGINARY () IMAGINARY () –4 56 –6 –14 12 Figure 38. P1dB Load Pull Output Power Contours (dBm) –2 54 –12 45 44.5 4 52 58 46.5 47 –6 IMAGINARY () IMAGINARY () –4 48 50 46 44 –32 –30 –12 19.5 19 2 3 4 5 6 7 8 9 10 11 12 –14 2 3 4 5 6 7 8 9 10 11 12 REAL () REAL () Figure 40. P1dB Load Pull Gain Contours (dB) Figure 41. P1dB Load Pull AM/PM Contours () NOTE: P = Maximum Output Power E = Maximum Drain Efficiency Gain Drain Efficiency Linearity Output Power A2I25H060NR1 A2I25H060GNR1 22 RF Device Data Freescale Semiconductor, Inc. P3dB – TYPICAL PEAKING LOAD PULL CONTOURS — 2300 MHz –4 IMAGINARY () –2 44 45 44.5 45.5 45.5 47 –6 –8 46.5 46 47.5 P E –10 44 46 42 –4 IMAGINARY () –2 50 48 52 54 56 –6 P P –8 EE –10 45.5 –12 –14 3 2 –12 45 44 44.5 4 5 6 7 8 REAL () 9 10 11 –14 12 19 –6 19.5 –8 P E –10 –12 2 3 7 8 REAL () –6 9 10 11 12 –50 –52 –8 P E –48 –10 17.5 4 17.5 5 6 7 8 9 10 11 12 –14 –44 –46 –38 –12 17 –14 6 5 –4 IMAGINARY () IMAGINARY () 18.5 18 17 4 –2 16 16.5 17.5 –4 3 Figure 43. P3dB Load Pull Efficiency Contours (%) Figure 42. P3dB Load Pull Output Power Contours (dBm) –2 2 –40 –42 –36 2 3 4 5 6 7 8 9 10 11 12 REAL () REAL () Figure 44. P3dB Load Pull Gain Contours (dB) Figure 45. P3dB Load Pull AM/PM Contours () NOTE: P = Maximum Output Power E = Maximum Drain Efficiency Gain Drain Efficiency Linearity Output Power A2I25H060NR1 A2I25H060GNR1 RF Device Data Freescale Semiconductor, Inc. 23 PACKAGE DIMENSIONS A2I25H060NR1 A2I25H060GNR1 24 RF Device Data Freescale Semiconductor, Inc. A2I25H060NR1 A2I25H060GNR1 RF Device Data Freescale Semiconductor, Inc. 25 A2I25H060NR1 A2I25H060GNR1 26 RF Device Data Freescale Semiconductor, Inc. A2I25H060NR1 A2I25H060GNR1 RF Device Data Freescale Semiconductor, Inc. 27 A2I25H060NR1 A2I25H060GNR1 28 RF Device Data Freescale Semiconductor, Inc. A2I25H060NR1 A2I25H060GNR1 RF Device Data Freescale Semiconductor, Inc. 29 PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS Refer to the following resources to aid your design process. Application Notes  AN1955: Thermal Measurement Methodology of RF Power Amplifiers  AN1977: Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family  AN1987: Quiescent Current Control for the RF Integrated Circuit Device Family Engineering Bulletins  EB212: Using Data Sheet Impedances for RF LDMOS Devices Software  Electromigration MTTF Calculator  RF High Power Model  .s2p File Development Tools  Printed Circuit Boards To Download Resources Specific to a Given Part Number: 1. Go to http://www.nxp.com/RF 2. Search by part number 3. Click part number link 4. Choose the desired resource from the drop down menu REVISION HISTORY The following table summarizes revisions to this document. Revision Date 0 Jan. 2016 Description  Initial release of data sheet A2I25H060NR1 A2I25H060GNR1 30 RF Device Data Freescale Semiconductor, Inc. How to Reach Us: Home Page: freescale.com Web Support: freescale.com/support Information in this document is provided solely to enable system and software implementers to use Freescale products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including “typicals,” must be validated for each customer application by customer’s technical experts. Freescale does not convey any license under its patent rights nor the rights of others. Freescale sells products pursuant to standard terms and conditions of sale, which can be found at the following address: freescale.com/SalesTermsandConditions. Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast is a trademark of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. E 2016 Freescale Semiconductor, Inc. A2I25H060NR1 A2I25H060GNR1 Document Number: RF Device Data A2I25H060N Rev. 0, 1/2016Semiconductor, Inc. Freescale 31
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