A2T21H140-24SR3

NXP Semiconductors Technical Data Document Number: A2T21H140--24S Rev. 0, 03/2017 RF Power LDMOS Transistor N--Channel Enhancement--Mode Lateral MOSFET This 36 W asymmetrical Doherty RF power LDMOS transistor is designed for cellular base station applications covering the frequency range of 2110 to 2170 MHz. 2100 MHz  Typical Doherty Single--Carrier W--CDMA Performance: VDD = 28 Vdc, IDQA = 350 mA, VGSB = 0.5 Vdc, Pout = 36 W Avg., Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. Frequency Gps (dB) D (%) Output PAR (dB) ACPR (dBc) 2110 MHz 17.4 53.1 6.9 –30.2 2140 MHz 17.5 53.3 6.8 –31.4 2170 MHz 17.5 53.0 6.7 –32.1 A2T21H140--24SR3 2110–2170 MHz, 36 W AVG., 28 V AIRFAST RF POWER LDMOS TRANSISTOR Features  Advanced high performance in--package Doherty  Greater negative gate--source voltage range for improved Class C operation  Designed for digital predistortion error correction systems NI--780S--4L2L 6 VBWA(1) Carrier RFinA/VGSA 1 5 RFoutA/VDSA RFinB/VGSB 2 4 RFoutB/VDSB Peaking 3 VBWB(1) (Top View) Figure 1. Pin Connections 1. Device cannot operate with VDD current supplied through pin 3 and pin 6.  2017 NXP B.V. RF Device Data NXP Semiconductors A2T21H140--24SR3 1 Table 1. Maximum Ratings Rating Symbol Value Unit Drain--Source Voltage VDSS –0.5, +65 Vdc Gate--Source Voltage VGS –6.0, +10 Vdc Operating Voltage VDD 32, +0 Vdc Storage Temperature Range Tstg –65 to +150 C Case Operating Temperature Range TC –40 to +150 C Operating Junction Temperature Range (1,2) TJ –40 to +225 C Symbol Value (2,3) Unit RJC 0.45 C/W Table 2. Thermal Characteristics Characteristic Thermal Resistance, Junction to Case Case Temperature 77C, 36 W Avg., W--CDMA, 28 Vdc, IDQA = 350 mA, VGSB = 0.5 Vdc, 2140 MHz Table 3. ESD Protection Characteristics Test Methodology Class Human Body Model (per JESD22--A114) 2 Charge Device Model (per JESD22--C101) C2 Table 4. Electrical Characteristics (TA = 25C unless otherwise noted) Symbol Min Typ Max Unit Zero Gate Voltage Drain Leakage Current (VDS = 65 Vdc, VGS = 0 Vdc) IDSS — — 10 Adc Zero Gate Voltage Drain Leakage Current (VDS = 32 Vdc, VGS = 0 Vdc) IDSS — — 1 Adc Gate--Source Leakage Current (VGS = 5 Vdc, VDS = 0 Vdc) IGSS — — 1 Adc Gate Threshold Voltage (VDS = 10 Vdc, ID = 70 Adc) VGS(th) 0.8 1.2 1.6 Vdc Gate Quiescent Voltage (VDD = 28 Vdc, IDA = 350 mAdc, Measured in Functional Test) VGSA(Q) 1.4 1.8 2.2 Vdc Drain--Source On--Voltage (VGS = 10 Vdc, ID = 0.7 Adc) VDS(on) 0.1 0.2 0.3 Vdc Gate Threshold Voltage (VDS = 10 Vdc, ID = 100 Adc) VGS(th) 0.8 1.2 1.6 Vdc Drain--Source On--Voltage (VGS = 10 Vdc, ID = 1.0 Adc) VDS(on) 0.1 0.2 0.3 Vdc Characteristic Off Characteristics (4) On Characteristics -- Side A (4) On Characteristics -- Side B (4) 1. 2. 3. 4. Continuous use at maximum temperature will affect MTTF. MTTF calculator available at http://www.nxp.com/RF/calculators. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.nxp.com/RF and search for AN1955. Each side of device measured separately. (continued) A2T21H140--24SR3 2 RF Device Data NXP Semiconductors Table 4. Electrical Characteristics (TA = 25C unless otherwise noted) (continued) Characteristic Symbol Min Typ Max Unit (1,2) Functional Tests (In NXP Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 350 mA, VGSB = 0.5 Vdc, Pout = 36 W Avg., f = 2110 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset. Power Gain Gps 16.7 17.4 19.7 dB Drain Efficiency D 50.1 53.1 — % PAR 6.4 6.9 — dB ACPR — –30.2 –26.6 dBc Output Peak--to--Average Ratio @ 0.01% Probability on CCDF Adjacent Channel Power Ratio Load Mismatch (2) (In NXP Doherty Test Fixture, 50 ohm system) IDQA = 350 mA, VGSB = 0.5 Vdc, f = 2140 MHz VSWR 10:1 at 32 Vdc, 200 W CW Output Power (3 dB Input Overdrive from 120 W CW Rated Power) No Device Degradation Typical Performance (2) (In NXP Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 350 mA, VGSB = 0.5 Vdc, 2110–2170 MHz Bandwidth Pout @ 3 dB Compression Point (3) P3dB — 169 — W  — –23 —  VBWres — 140 — MHz Gain Flatness in 60 MHz Bandwidth @ Pout = 36 W Avg. GF — 0.18 — dB Gain Variation over Temperature (–30C to +85C) G — 0.008 — dB/C P1dB — 0.004 — dB/C AM/PM (Maximum value measured at the P3dB compression point across the 2110–2170 MHz bandwidth) VBW Resonance Point (IMD Third Order Intermodulation Inflection Point) Output Power Variation over Temperature (–30C to +85C) Table 5. Ordering Information Device A2T21H140--24SR3 Tape and Reel Information R3 Suffix = 250 Units, 44 mm Tape Width, 13--inch Reel Package NI--780S--4L2L 1. Part internally matched both on input and output. 2. Measurements made with device in an asymmetrical Doherty configuration. 3. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF. A2T21H140--24SR3 RF Device Data NXP Semiconductors 3 VGGA VDDA C17 R2 C7 C6 C18 C4 C3 C C10 C9 C5 P R1 C11 C15 C14 C8 CUT OUT AREA C1 Z1 C16 A2T21H140--24S Rev. 3 C2 R3 R4 C12 C20 C19 C21 D86183 C13 C22 C23 R5 C24 VGGB VDDB Figure 2. A2T21H140--24SR3 Test Circuit Component Layout Table 6. A2T21H140--24SR3 Test Circuit Component Designations and Values Part Description Part Number Manufacturer C1, C12, C13, C14, C16, C23 10 F Chip Capacitor C5750X7S2A106M TDK C2, C4, C7, C11, C15, C19, C22 10 pF Chip Capacitor ATC600F100JT250XT ATC C3 1.6 pF Chip Capacitor ATC600F1R6BT250XT ATC C5, C10, C20 0.3 pF Chip Capacitor ATC600F0R3BT250XT ATC C6 0.1 pF Chip Capacitor ATC600F0R1BT250XT ATC C8 0.7 pF Chip Capacitor ATC600F0R7BT250XT ATC C9 0.2 pF Chip Capacitor ATC600F0R2BT250XT ATC C17, C24 220 F, 50 V Electrolytic Capacitor 227CKS050M Illinois Capacitor C18 9.1 pF Chip Capacitor ATC600F9R1BT250XT ATC C21 0.4 pF Chip Capacitor ATC600F0R4BT250XT ATC R1 50  4 W Chip Resistor C10A50Z4 Anaren R2, R5 20 k 1/4 W Chip Resistor CRCW120620K0JNEA Vishay R3, R4 5.1  1/4 W Chip Resistor CRCW12065R10FKEA Vishay Z1 2000--2300 MHz Band, 90, 5 dB Directional Coupler X3C21P1--05S Anaren PCB Rogers RO4350B, 0.020, r = 3.66 D86183 MTL A2T21H140--24SR3 4 RF Device Data NXP Semiconductors 17.6 53.4 53.2 D Gps 17.5 53.6 53.0 –24 –2.8 –26 –3.0 17.4 17.3 PARC 17.2 –28 –30 17.1 17.0 Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF 16.9 2060 2080 2100 2120 2140 ACPR 2160 –32 2180 2200 ACPR (dBc) Gps, POWER GAIN (dB) VDD = 28 Vdc, Pout = 36 W (Avg.), IDQA = 350 mA, VGSB = 0.5 Vdc 17.8 Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth 17.7 –34 2220 –3.2 –3.4 –3.6 PARC (dB) 53.8 17.9 D, DRAIN EFFICIENCY (%) TYPICAL CHARACTERISTICS — 2110–2170 MHz –3.8 f, FREQUENCY (MHz) IMD, INTERMODULATION DISTORTION (dBc) Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression (PARC) Broadband Performance @ Pout = 36 Watts Avg. –20 VDD = 28 Vdc, Pout = 12 W (PEP), IDQA = 350 mA VGSB = 0.5 Vdc IM3--U –30 IM3--L –40 IM5--L IM5--U –50 IM7--L –60 –70 IM7--U Two--Tone Measurements (f1 + f2)/2 = Center Frequency of 2140 MHz 1 100 10 200 TWO--TONE SPACING (MHz) 17.8 –1 17.6 17.4 17.2 17.0 16.8 –2 VDD = 28 Vdc, IDQA = 350 mA, VGSB = 0.5 Vdc, f = 2140 MHz D Gps –1 dB = 16 W –3 dB = 35 W 45 Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF 10 20 –26 PARC ACPR –6 60 50 –4 –5 –24 55 –2 dB = 25 W –3 65 30 40 50 60 –28 –30 ACPR (dBc) 0 D DRAIN EFFICIENCY (%) 18.0 OUTPUT COMPRESSION AT 0.01% PROBABILITY ON CCDF (dB) Gps, POWER GAIN (dB) Figure 4. Intermodulation Distortion Products versus Two--Tone Spacing –32 40 –34 35 –36 Pout, OUTPUT POWER (WATTS) Figure 5. Output Peak--to--Average Ratio Compression (PARC) versus Output Power A2T21H140--24SR3 RF Device Data NXP Semiconductors 5 TYPICAL CHARACTERISTICS — 2110–2170 MHz Gps, POWER GAIN (dB) 20 18 2110 MHz 16 2140 MHz 55 2170 MHz 2110 MHz 45 2140 MHz Gps 2140 MHz 2170 MHz 14 ACPR 2110 MHz 35 25 15 12 10 Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF 5 100 200 10 1 0 65 D –10 –20 –30 –40 ACPR (dBc) VDD = 28 Vdc, IDQA = 350 mA, VGSB = 0.5 Vdc Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth 2170 MHz D, DRAIN EFFICIENCY (%) 22 –50 –60 Pout, OUTPUT POWER (WATTS) AVG. Figure 6. Single--Carrier W--CDMA Power Gain, Drain Efficiency and ACPR versus Output Power 20 Gain 18 GAIN (dB) 16 14 12 10 VDD = 28 Vdc Pin = 0 dBm IDQA = 350 mA VGSB = 0.5 Vdc 8 6 4 1800 1900 2000 2100 2200 2300 2400 2500 2600 f, FREQUENCY (MHz) Figure 7. Broadband Frequency Response A2T21H140--24SR3 6 RF Device Data NXP Semiconductors Table 7. Carrier Side Load Pull Performance — Maximum Power Tuning VDD = 28 Vdc, IDQA = 355 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Output Power P1dB f (MHz) Zsource () Zin () Zload () (1) Gain (dB) (dBm) (W) D (%) AM/PM () 2110 11.6 – j15.5 10.4 + j14.9 5.77 – j12.5 19.2 48.8 76 53.7 –16 2140 15.8 – j15.3 13.7 + j15.3 5.77 – j10.6 19.3 48.8 76 55.6 –17 2170 19.4 – j11.9 17.8 + j13.4 5.88 – j11.2 19.2 48.8 77 55.6 –16 Max Output Power P3dB f (MHz) Zsource () Zin () Zload (2) () Gain (dB) (dBm) (W) D (%) AM/PM () 2110 11.6 – j15.5 11.9 + j16.0 5.74 – j12.6 17.2 49.6 91 55.6 –21 2140 15.8 – j15.3 16.2 + j15.8 5.91 – j12.0 17.1 49.6 91 56.5 –22 2170 19.4 – j11.9 21.0 + j12.6 6.02 – j12.4 17.0 49.6 92 56.5 –21 (1) Load impedance for optimum P1dB power. (2) Load impedance for optimum P3dB power. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Table 8. Carrier Side Load Pull Performance — Maximum Efficiency Tuning VDD = 28 Vdc, IDQA = 355 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Drain Efficiency P1dB f (MHz) Zsource () Zin () Zload (1) () Gain (dB) (dBm) (W) D (%) AM/PM () 2110 11.6 – j15.5 9.85 + j17.0 11.9 – j3.16 22.8 46.2 42 66.1 –28 2140 15.8 – j15.3 13.9 + j17.0 9.84 – j5.25 21.9 47.1 52 66.4 –25 2170 19.4 – j11.9 18.9 + j15.3 9.56 – j4.82 22.0 47.0 50 66.7 –26 Max Drain Efficiency P3dB Gain (dB) (dBm) (W) D (%) AM/PM () 10.5 – j5.83 20.1 47.8 60 66.2 –33 15.8 + j18.3 8.46 – j5.24 19.7 47.9 62 67.1 –36 22.0 + j15.6 8.08 – j5.38 19.6 47.9 62 67.4 –35 f (MHz) Zsource () Zin () 2110 11.6 – j15.5 11.2 + j17.5 2140 15.8 – j15.3 2170 19.4 – j11.9 Zload () (2) (1) Load impedance for optimum P1dB efficiency. (2) Load impedance for optimum P3dB efficiency. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Input Load Pull Tuner and Test Circuit Output Load Pull Tuner and Test Circuit Device Under Test Zsource Zin Zload A2T21H140--24SR3 RF Device Data NXP Semiconductors 7 P1dB – TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 2140 MHz –2 E –6 46.5 –8 –10 47 47 P 47.5 –12 47.5 –10 P 62 60 –14 48.5 4 6 8 10 REAL () 12 14 –16 16 Figure 8. P1dB Load Pull Output Power Contours (dBm) 50 2 4 6 56 54 8 10 REAL () 12 14 16 –2 –4 IMAGINARY () 22 –8 21.5 –10 P 21 –12 E –6 19 19.5 2 4 6 –24 –20 –10 P –18 –12 –16 –14 20 8 10 REAL () –26 –22 –8 20.5 –14 –28 –30 –4 22.5 E –6 –16 52 58 Figure 9. P1dB Load Pull Efficiency Contours (%) –2 IMAGINARY () 64 –8 48 –14 2 66 E –6 –12 48 –16 –4 46 IMAGINARY () IMAGINARY () –4 –2 45.5 45 12 14 16 Figure 10. P1dB Load Pull Gain Contours (dB) NOTE: –16 2 4 6 8 10 REAL () 12 14 16 Figure 11. P1dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Drain Efficiency Gain Drain Efficiency Linearity Output Power A2T21H140--24SR3 8 RF Device Data NXP Semiconductors P3dB – TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 2140 MHz IMAGINARY () –4 –2 46.5 45.5 –4 46 47 E –6 IMAGINARY () –2 –8 47.5 –10 48 –12 48.5 –14 –16 48 P 49.5 2 6 8 10 REAL () –10 60 12 14 –16 16 Figure 12. P3dB Load Pull Output Power Contours (dBm) 2 54 6 4 56 58 8 10 REAL () 12 –2 –4 –6 20 –8 19.5 –10 –12 19 P 16.5 –14 17 2 4 6 17.5 –32 –30 –8 –10 –26 –24 –22 –28 P –14 18 8 10 REAL () 16 –34 E –6 –12 18.5 14 –36 –4 20.5 E IMAGINARY () IMAGINARY () 52 Figure 13. P3dB Load Pull Efficiency Contours (%) –2 –16 62 P –14 49 4 64 –8 –12 48.5 49 66 E –6 12 14 16 Figure 14. P3dB Load Pull Gain Contours (dB) NOTE: –16 –20 2 4 6 8 10 REAL () 12 14 16 Figure 15. P3dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Drain Efficiency Gain Drain Efficiency Linearity Output Power A2T21H140--24SR3 RF Device Data NXP Semiconductors 9 Table 9. Peaking Side Load Pull Performance — Maximum Power Tuning VDD = 28 Vdc, VGSB = 0.5 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Output Power P1dB f (MHz) Zsource () Zin () Zload () (1) Gain (dB) (dBm) (W) D (%) AM/PM () 2110 10.2 – j17.7 11.6 + j18.7 5.96 – j12.8 14.5 50.5 113 56.5 –29 2140 13.9 – j18.3 16.0 + j19.0 6.26 – j13.0 14.5 50.5 112 56.8 –30 2170 19.5 – j16.1 21.7 + j17.2 6.42 – j13.3 14.4 50.5 113 57.2 –30 Max Output Power P3dB f (MHz) Zsource () Zin () Zload (2) () Gain (dB) (dBm) (W) D (%) AM/PM () 2110 10.2 – j17.7 13.8 + j19.4 6.34 – j13.6 12.4 51.3 134 58.1 –36 2140 13.9 – j18.3 19.3 + j18.8 6.62 – j13.9 12.4 51.2 132 57.6 –37 2170 19.5 – j16.1 25.4 + j14.9 6.85 – j14.3 12.3 51.2 132 57.8 –37 (1) Load impedance for optimum P1dB power. (2) Load impedance for optimum P3dB power. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Table 10. Peaking Side Load Pull Performance — Maximum Efficiency Tuning VDD = 28 Vdc, VGSB = 0.5 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Drain Efficiency P1dB f (MHz) Zsource () Zin () Zload (1) () Gain (dB) (dBm) (W) D (%) AM/PM () 2110 10.2 – j17.7 9.39 + j20.4 11.1 – j5.75 16.0 48.6 73 70.2 –34 2140 13.9 – j18.3 13.5 + j22.1 10.3 – j4.94 15.9 48.4 68 70.0 –36 2170 19.5 – j16.1 20.4 + j21.8 9.59 – j6.35 15.7 48.8 75 70.0 –36 Max Drain Efficiency P3dB Gain (dB) (dBm) (W) D (%) AM/PM () 11.6 – j8.27 13.9 49.8 95 69.7 –42 17.9 + j21.8 11.2 – j7.51 13.8 49.6 91 69.3 –44 25.6 + j19.4 10.4 – j7.20 13.7 49.5 89 69.4 –45 f (MHz) Zsource () Zin () 2110 10.2 – j17.7 12.2 + j21.0 2140 13.9 – j18.3 2170 19.5 – j16.1 Zload () (2) (1) Load impedance for optimum P1dB efficiency. (2) Load impedance for optimum P3dB efficiency. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Input Load Pull Tuner and Test Circuit Output Load Pull Tuner and Test Circuit Device Under Test Zsource Zin Zload A2T21H140--24SR3 10 RF Device Data NXP Semiconductors P1dB – TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 2140 MHz –2 –2 IMAGINARY () 47 48 –4 E E 48.5 –6 IMAGINARY () 47.5 –4 46.5 –8 49 –10 –12 –16 50 4 6 –10 64 54 12 8 10 REAL () 14 –16 16 Figure 16. P1dB Load Pull Output Power Contours (dBm) 2 4 6 60 58 12 8 10 REAL () 14 16 –2 –4 –4 –44 E –6 IMAGINARY () IMAGINARY () 62 56 Figure 17. P1dB Load Pull Efficiency Contours (%) –2 –8 –10 15.5 –12 –42 –40 –38 –6 –36 E –34 –8 –32 –10 –30 –12 13 2 P P 12 –14 –16 P –14 48 2 66 –8 –12 49.5 P 49 –14 68 –6 13.5 4 14 6 15 –14 14.5 8 10 REAL () 12 14 16 Figure 18. P1dB Load Pull Gain Contours (dB) NOTE: –16 2 4 6 8 10 REAL () 12 14 16 Figure 19. P1dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Drain Efficiency Gain Drain Efficiency Linearity Output Power A2T21H140--24SR3 RF Device Data NXP Semiconductors 11 P3dB – TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 2140 MHz –2 48 –4 48.5 –6 49 –8 IMAGINARY () IMAGINARY () –4 –2 47.5 47 E 49.5 –10 50 –12 51 2 4 6 12 8 10 REAL () 14 –16 16 –2 –2 –4 –4 –6 E –8 –10 13.5 –12 64 54 P 56 2 4 6 62 60 58 12 8 10 REAL () –6 –50 –52 –8 –48 –46 –14 11 2 P 11.5 4 12 6 13 –42 –10 –40 8 10 REAL () –38 –14 12.5 12 14 16 Figure 22. P3dB Load Pull Gain Contours (dB) NOTE: 16 E –44 –12 10 14 Figure 21. P3dB Load Pull Efficiency Contours (%) IMAGINARY () IMAGINARY () 66 –10 –14 P Figure 20. P3dB Load Pull Output Power Contours (dBm) –16 68 E –8 –12 50.5 –14 –16 –6 –16 P 2 4 6 –36 8 10 REAL () 12 14 16 Figure 23. P3dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Drain Efficiency Gain Drain Efficiency Linearity Output Power A2T21H140--24SR3 12 RF Device Data NXP Semiconductors PACKAGE DIMENSIONS A2T21H140--24SR3 RF Device Data NXP Semiconductors 13 A2T21H140--24SR3 14 RF Device Data NXP Semiconductors PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS Refer to the following resources to aid your design process. Application Notes  AN1907: Solder Reflow Attach Method for High Power RF Devices in Plastic Packages  AN1955: Thermal Measurement Methodology of RF Power Amplifiers  AN3789: Clamping of High Power RF Transistors and RFICs in Over--Molded Plastic Packages Engineering Bulletins  EB212: Using Data Sheet Impedances for RF LDMOS Devices Software  Electromigration MTTF Calculator  .s2p File Development Tools  Printed Circuit Boards To Download Resources Specific to a Given Part Number: 1. Go to http://www.nxp.com/RF 2. Search by part number 3. Click part number link 4. Choose the desired resource from the drop down menu REVISION HISTORY The following table summarizes revisions to this document. Revision Date 0 Mar. 2017 Description  Initial release of data sheet A2T21H140--24SR3 RF Device Data NXP Semiconductors 15 How to Reach Us: Home Page: nxp.com Web Support: nxp.com/support Information in this document is provided solely to enable system and software implementers to use NXP products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. NXP reserves the right to make changes without further notice to any products herein. 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All other product or service names are the property of their respective owners. E 2017 NXP B.V. A2T21H140--24SR3 Document Number: A2T21H140--24S Rev. 0, 03/2017 16 RF Device Data NXP Semiconductors