NXP Semiconductors
Technical Data
Document Number: A2V09H400--04N
Rev. 1, 03/2017
RF Power LDMOS Transistor
N--Channel Enhancement--Mode Lateral MOSFET
This 107 W asymmetrical Doherty RF power LDMOS transistor is designed
for cellular base station applications covering the frequency range of 720 to
960 MHz.
780 MHz
Typical Doherty Single--Carrier W--CDMA Performance: VDD = 48 Vdc,
IDQA = 688 mA, VGSB = 0.6 Vdc, Pout = 107 W Avg., Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF.
Frequency
Gps
(dB)
D
(%)
Output PAR
(dB)
ACPR
(dBc)
733 MHz
17.5
56.3
7.2
–31.3
780 MHz
18.0
55.8
7.2
–36.4
821 MHz
17.4
55.6
6.9
–35.0
A2V09H400--04NR3
720–960 MHz, 107 W AVG., 48 V
AIRFAST RF POWER LDMOS
TRANSISTOR
OM--780--4L
PLASTIC
Features
Advanced high performance in--package Doherty
Greater negative gate--source voltage range for improved Class C
operation
Designed for digital predistortion error correction systems
Carrier
RFinA/VGSA 3
1 RFoutA/VDSA
RFinB/VGSB 4
2 RFoutB/VDSB
Peaking
(Top View)
Note: Exposed backside of the package is
the source terminal for the transistor.
Figure 1. Pin Connections
2016–2017 NXP B.V.
RF Device Data
NXP Semiconductors
A2V09H400--04NR3
1
Table 1. Maximum Ratings
Symbol
Value
Unit
Drain--Source Voltage
Rating
VDSS
–0.5, +105
Vdc
Gate--Source Voltage
VGS
–6.0, +10
Vdc
Operating Voltage
VDD
55, +0
Vdc
Storage Temperature Range
Tstg
–65 to +150
C
Case Operating Temperature Range
TC
–40 to +150
C
(1,2)
TJ
–40 to +225
C
Characteristic
Symbol
Value (2,3)
Unit
RJC
0.50
C/W
Operating Junction Temperature Range
Table 2. Thermal Characteristics
Thermal Resistance, Junction to Case
Case Temperature 76C, 107 W Avg., W--CDMA, 48 Vdc, IDQA = 688 mA,
VGSB = 0.6 Vdc, 780 MHz
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
2
Charge Device Model (per JESD22--C101)
C3
Table 4. Moisture Sensitivity Level
Test Methodology
Per JESD22--A113, IPC/JEDEC J--STD--020
Rating
Package Peak Temperature
Unit
3
260
C
Table 5. Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 105 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 55 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
Adc
Gate--Source Leakage Current
(VGS = 5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
Adc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 137 Adc)
VGS(th)
1.3
1.7
2.3
Vdc
Gate Quiescent Voltage
(VDD = 48 Vdc, ID = 688 mAdc, Measured in Functional Test)
VGSA(Q)
2.0
2.5
3.3
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 1.4 Adc)
VDS(on)
0.1
0.2
0.4
Vdc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 211 Adc)
VGS(th)
1.3
1.8
2.3
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 2.1 Adc)
VDS(on)
0.1
0.2
0.5
Vdc
Characteristic
Off
Characteristics (4)
On Characteristics -- Side A, Carrier
On Characteristics -- Side B, Peaking
1.
2.
3.
4.
Continuous use at maximum temperature will affect MTTF.
MTTF calculator available at http://www.nxp.com/RF/calculators.
Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.nxp.com/RF and search for AN1955.
Each side of device measured separately.
(continued)
A2V09H400--04NR3
2
RF Device Data
NXP Semiconductors
Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
Tests (1,2)
Functional
(In NXP Doherty Test Fixture, 50 ohm system) VDD = 48 Vdc, IDQA = 688 mA, VGSB = 0.6 Vdc, Pout = 107 W Avg.,
f = 780 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured
in 3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain
Gps
17.1
17.9
20.0
dB
Drain Efficiency
D
51.0
55.8
—
%
PAR
6.8
7.2
—
dB
ACPR
—
–36.4
–31.0
dBc
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
Load Mismatch (2) (In NXP Doherty Test Fixture, 50 ohm system) IDQA = 688 mA, VGSB = 0.6 Vdc, f = 780 MHz, 12 sec(on),
10% Duty Cycle
VSWR 10:1 at 52 Vdc, 437 W Pulsed CW Output Power
(3 dB Input Overdrive from 200 W Pulsed CW Rated Power)
No Device Degradation
Typical Performance (2) (In NXP Doherty Test Fixture, 50 ohm system) VDD = 48 Vdc, IDQA = 688 mA, VGSB = 0.6 Vdc,
733–821 MHz Bandwidth
Pout @ 3 dB Compression Point (3)
P3dB
—
562
—
W
—
–14
—
VBWres
—
60
—
MHz
Gain Flatness in 88 MHz Bandwidth @ Pout = 107 W Avg.
GF
—
0.6
—
dB
Gain Variation over Temperature
(–30C to +85C)
G
—
0.007
—
dB/C
P1dB
—
0.003
—
dB/C
AM/PM
(Maximum value measured at the P3dB compression point across
the 733--821 MHz frequency range)
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Output Power Variation over Temperature
(–30C to +85C)
Table 6. Ordering Information
Device
A2V09H400--04NR3
Tape and Reel Information
R3 Suffix = 250 Units, 32 mm Tape Width, 13--inch Reel
Package
OM--780--4L
1. Part internally input matched.
2. Measurement made with device in an asymmetrical Doherty configuration.
3. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
A2V09H400--04NR3
RF Device Data
NXP Semiconductors
3
C25
C28
C17
VGGA
C21
C13
C20
C19
R1
C11
C32
Z1
C6
C7
P
C5
C12*
A2V09H400--4N
Rev. 2
C30
C3*
C4
C
C1
C2
R2
C10*
C31
C8
CUT OUT AREA
R3
VDDA
C15
C9
C22
C18
C16
C26
C23
C27
VGGB
C14
C24
VDDB
C29
D86951
*C3, C10 and C12 are mounted vertically.
Figure 2. A2V09H400--04NR3 Test Circuit Component Layout
Table 7. A2V09H400--04NR3 Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
C1, C4, C31
0.5 pF Chip Capacitor
ATC600F0R5BT250XT
ATC
C2, C10, C11, C13, C14, C16, C32
82 pF Chip Capacitor
ATC600F820JT250XT
ATC
C3
12 pF Chip Capacitor
ATC600F120JT250XT
ATC
C5
15 pF Chip Capacitor
ATC600F150JT250XT
ATC
C6, C8
8.2 pF Chip Capacitor
ATC100B8R2JT500XT
ATC
C7
5.6 pF Chip Capacitor
ATC100B5R6BP500XT
ATC
C9
9.1 pF Chip Capacitor
ATC100B9R1CT500XT
ATC
C12
1 pF Chip Capacitor
ATC100B1R0BT500XT
ATC
C15
18 pF Chip Capacitor
ATC100B180JT500XT
ATC
C17, C18
1000 pF Chip Capacitor
ATC800B102JW50XT
ATC
C19, C22
15 F Chip Capacitor
C5750X7S2A156M230KB
TDK
C20, C21, C23, C24, C25, C26, C27
10 F Chip Capacitor
GRM32ER61H106KA12L
Murata
C28, C29
470 F, 63 V Electrolytic Capacitor
MCGPR63V477M13X26-RH
Multicomp
C30
0.7 pF Chip Capacitor
ATC600F0R7BT250XT
ATC
R1, R2
3 , 1/4 W Chip Resistor
CRCW12063R00JNEA
Vishay
R3
51 , 1/2 W Chip Resistor
CRCW201051R0JNEF
Vishay
Z1
800–1000 MHz Band, 90 2 dB Asymmetric Coupler
CMX09Q02
Cemax
PCB
Rogers RO3006, 0.025, r = 6.5
D86951
MTL
A2V09H400--04NR3
4
RF Device Data
NXP Semiconductors
17.4
56
54
52
D
17.1
50
Gps
16.8
PARC
16.5
–26
–2.6
–29
–2.9
–32
16.2
ACPR
15.9
15.6
15.3
690
–35
–38
Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
710
730
750
770
790
810
ACPR (dBc)
Gps, POWER GAIN (dB)
VDD = 48 Vdc, Pout = 107 W (Avg.), IDQA = 688 mA, VGSB = 0.6 Vdc
18.0 Single--Carrier W--CDMA, 3.84 MHz
17.7 Channel Bandwidth
–41
850
830
–3.2
–3.5
–3.8
PARC (dB)
58
18.3
D, DRAIN
EFFICIENCY (%)
TYPICAL CHARACTERISTICS
–4.1
f, FREQUENCY (MHz)
IMD, INTERMODULATION DISTORTION (dBc)
Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 107 Watts Avg.
0
VDD = 48 Vdc, Pout = 45 W (PEP), IDQA = 688 mA, VGSB = 0.6 Vdc
Two--Tone Measurements
(f1 + f2)/2 = Center Frequency of 780 MHz
–15
IM3--U
–30
IM5--L
–45
IM5--U
–60
–75
1
IM3--L
IM7--L
IM7--U
10
100
200
TWO--TONE SPACING (MHz)
18.8
0
18.5
18.2
17.9
17.6
17.3
VDD = 48 Vdc, IDQA = 688 mA, VGSB = 0.6 Vdc, f = 780 MHz
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
–1 dB = 51 W
PARC
–1
70
–20
60
–25
D
–2 dB = 76 W
ACPR
–2
50
40
–3 dB = 104 W
30
–3
Gps
–4
–5
40
70
100
130
–35
–40
20
–45
10
–50
Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF
10
–30
160
ACPR (dBc)
1
D DRAIN EFFICIENCY (%)
19.1
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
Gps, POWER GAIN (dB)
Figure 4. Intermodulation Distortion Products
versus Two--Tone Spacing
Pout, OUTPUT POWER (WATTS)
Figure 5. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
A2V09H400--04NR3
RF Device Data
NXP Semiconductors
5
TYPICAL CHARACTERISTICS
Gps, POWER GAIN (dB)
20
18
733 MHz 50
780 MHz
40
Gps
733 MHz
780 MHz
16
30
821 MHz
14
ACPR
12
10
20
733 MHz
780 MHz
821 MHz
10
Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF
1
10
0
60
0
500
100
–10
D, DRAIN EFFICIENCY (%)
VDD = 48 Vdc, IDQA = 688 mA, VGSB = 0.6 Vdc
Single--Carrier W--CDMA, 3.84 MHz
Channel Bandwidth
821 MHz
D
–20
–30
–40
ACPR (dBc)
22
–50
–60
Pout, OUTPUT POWER (WATTS) AVG.
Figure 6. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
24
21
GAIN (dB)
18
VDD = 48 Vdc
Pin = 0 dBm
IDQA = 688 mA
VGSB = 0.6 Vdc
Gain
15
12
9
6
550
600
650
700
750
800
850
900
950
f, FREQUENCY (MHz)
Figure 7. Broadband Frequency Response
A2V09H400--04NR3
6
RF Device Data
NXP Semiconductors
Table 8. Carrier Side Load Pull Performance — Maximum Power Tuning
VDD = 48 Vdc, IDQA = 671 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
733
4.47 – j2.44
4.03 + j2.52
780
3.47 – j2.93
3.34 + j2.89
822
3.43 – j3.86
3.29 + j3.69
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2.75 – j0.69
19.4
54.2
265
57.5
–10
2.13 – j0.09
20.4
54.4
275
61.9
–10
2.20 – j0.30
20.7
54.3
269
61.9
–12
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
733
4.47 – j2.44
3.75 + j2.70
2.85 – j0.74
17.3
54.9
307
59.5
–11
780
3.47 – j2.93
3.16 + j3.19
2.40 – j0.28
18.3
55.0
319
63.7
–14
822
3.43 – j3.86
3.13 + j4.04
2.40 – j0.48
18.6
54.9
311
63.1
–17
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 9. Carrier Side Load Pull Performance — Maximum Efficiency Tuning
VDD = 48 Vdc, IDQA = 671 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
733
4.47 – j2.44
3.66 + j2.54
2.99 + j1.14
21.1
53.1
203
64.8
–12
780
3.47 – j2.93
2.88 + j3.27
2.32 + j2.37
23.1
51.8
150
72.3
–16
822
3.43 – j3.86
2.85 + j4.05
2.10 + j1.87
23.3
51.9
155
71.9
–20
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2.99 + j0.86
18.9
54.0
252
65.9
–14
3.04 + j3.30
2.92 + j0.91
19.7
54.4
276
72.5
–16
2.91 + j4.24
2.55 + j1.44
20.7
53.4
217
72.0
–22
f
(MHz)
Zsource
()
Zin
()
733
4.47 – j2.44
3.54 + j2.68
780
3.47 – j2.93
822
3.43 – j3.86
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2V09H400--04NR3
RF Device Data
NXP Semiconductors
7
P1dB – TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 780 MHz
3
3
50.5
E
52.5
51
1
53
53.5
51.5
54
0
P
53.5
52
–1
53.5
52.5
1.0
1.5
2.0
2.5
3.0
REAL ()
3.5
4.0
0.5
1.0
1.5
2.0
2.5
3.0
REAL ()
3.5
4.0
4.5
–16
22.5
1
22
21.5
21
0
P
20.5
20
–1
1.5
E
2
IMAGINARY ()
IMAGINARY ()
60
58
56
E
23
1.0
P
3
23.5
–2
0.5
62
Figure 9. P1dB Load Pull Efficiency Contours (%)
24
2
66
68
0
–2
4.5
64
70
1
Figure 8. P1dB Load Pull Output Power Contours (dBm)
3
E
–1
53
–2
0.5
60
2
IMAGINARY ()
IMAGINARY ()
2
72
52
2.0
2.5
3.0
REAL ()
3.5
4.0
1
–12
–14
–12
0
P
–1
4.5
Figure 10. P1dB Load Pull Gain Contours (dB)
NOTE:
–14
–16
–2
–10
–10
0.5
1.0
1.5
2.0
2.5
3.0
REAL ()
3.5
4.0
4.5
Figure 11. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2V09H400--04NR3
8
RF Device Data
NXP Semiconductors
P3dB – TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 780 MHz
3
3
51.5
51
52.5
52
2
53.5
1
54
E
0
54.5
–1
–2
53
55 P
IMAGINARY ()
IMAGINARY ()
2
53.5
1.0
1.5
2.0
2.5
3.0
REAL ()
4.0
3.5
0
56
0.5
1.0
1
E
19.5
19
0
P
18.5
18
–1
1.5
2.5
3.0
REAL ()
3.5
4.0
4.5
–26
–24
2.0
2.5
3.0
REAL ()
–20
1
E
–18
0
–16
P
–14
–1
17.5
17
1.0
2.0
60
58
–22
20.5
20
0.5
1.5
2
IMAGINARY ()
21
62
P
3
2
66
68
Figure 13. P3dB Load Pull Efficiency Contours (%)
3
IMAGINARY ()
E
70
–2
4.5
Figure 12. P3dB Load Pull Output Power Contours (dBm)
–2
72
1
–1
54
0.5
64
3.5
4.0
4.5
Figure 14. P3dB Load Pull Gain Contours (dB)
NOTE:
–2
–12
0.5
1.0
1.5
2.0
2.5
3.0
REAL ()
3.5
4.0
4.5
Figure 15. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2V09H400--04NR3
RF Device Data
NXP Semiconductors
9
Table 10. Peaking Side Load Pull Performance — Maximum Power Tuning
VDD = 48 Vdc, VGSB = 1.4 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
733
2.73 – j3.69
2.47 + j3.65
780
2.44 – j4.29
2.28 + j4.37
822
2.79 – j4.96
2.32 + j5.16
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1.34 – j0.74
16.6
56.3
424
62.8
–21
1.34 – j0.92
16.9
56.4
434
62.7
–20
1.34 – j1.07
17.2
56.2
418
62.5
–20
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
733
2.73 – j3.69
2.21 + j3.92
1.51 – j1.12
14.2
56.9
490
60.9
–23
780
2.44 – j4.29
2.02 + j4.66
1.50 – j1.02
14.9
57.1
507
65.1
–25
822
2.79 – j4.96
2.08 + j5.50
1.45 – j1.16
15.2
56.9
485
63.8
–26
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 11. Peaking Side Load Pull Performance — Maximum Efficiency Tuning
VDD = 48 Vdc, VGSB = 1.4 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
733
2.73 – j3.69
2.18 + j3.50
1.66 + j0.50
17.7
54.5
285
74.2
–25
780
2.44 – j4.29
1.97 + j4.28
1.83 + j0.34
18.4
54.9
311
77.2
–23
822
2.79 – j4.96
1.75 + j4.95
1.36 + j0.77
18.8
53.0
200
76.0
–27
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1.87 + j0.45
15.7
55.2
333
73.8
–28
1.85 + j4.60
2.05 – j0.01
16.1
56.0
399
76.3
–27
1.80 + j5.39
1.84 + j0.26
16.7
55.0
314
74.4
–29
f
(MHz)
Zsource
()
Zin
()
733
2.73 – j3.69
2.00 + j3.77
780
2.44 – j4.29
822
2.79 – j4.96
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2V09H400--04NR3
10
RF Device Data
NXP Semiconductors
P1dB – TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 780 MHz
1.5
1.0
55
–0.5
P
–1.0
56
–1.5
54
–2.0
IMAGINARY ()
0
70
E
68
0
66
–0.5
64
P
–1.0
62
–1.5
55.5
54.5
–2.0
55
53.5
–2.5
0.5
66
72
76
0.5
54.5
E
74
1.0
1.0
55
1.5
2.5
2.0
–2.5
0.5
3.0
1.0
1.5
2.0
2.5
3.0
REAL ()
REAL ()
Figure 16. P1dB Load Pull Output Power Contours (dBm)
Figure 17. P1dB Load Pull Efficiency Contours (%)
1.5
1.5
18.5
1.0
18
0.5
–0.5
17
P
–1.0
16.5
–1.5
14.5
–2.5
0.5
1.0
–22
E
–32
0
–20
–24
–0.5
–22
–1.0
P
–1.5
16
–2.0
–24
0.5
E
17.5
0
–28 –26
1.0
IMAGINARY ()
IMAGINARY ()
53.5
54
0.5
IMAGINARY ()
1.5
53
52.5
15.5
15
1.5
–18
–2.0
2.0
2.5
3.0
–2.5
0.5
–16
1.0
1.5
2.0
2.5
3.0
REAL ()
REAL ()
Figure 18. P1dB Load Pull Gain Contours (dB)
Figure 19. P1dB Load Pull AM/PM Contours ()
NOTE:
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2V09H400--04NR3
RF Device Data
NXP Semiconductors
11
P3dB – TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 780 MHz
1.5
55
0.5
IMAGINARY ()
1.0
54.5
53
0
55.5
E
–0.5
56
–1.0
P
57
–1.5
–2.0
74
0
E
56.5
55.5
–2.5
0.5
56
1.5
66
–1.0
P
60
2.0
2.5
–2.5
0.5
3.0
1.0
1.5
REAL ()
1.5
1.0
1.0
16.5
E
15.5
–1.0
P
15
–1.5
12.5
–2.5
0.5
1.0
13
1.5
2.5
3.0
–32
13.5
2.0
–30
0
E
–28
–0.5
–26
–1.0
P
–24
–22
–1.5
14.5
–2.0
2.0
–34
0.5
IMAGINARY ()
IMAGINARY ()
0.5
–0.5
64
Figure 21. P3dB Load Pull Efficiency Contours (%)
1.5
16
62
REAL ()
Figure 20. P3dB Load Pull Output Power Contours (dBm)
0
68
–2.0
56
1.0
70
76
–0.5
–1.5
55
72
0.5
IMAGINARY ()
1.0
1.5
54
53.5
–20
–2.0
14
2.5
3.0
–2.5
0.5
1.0
REAL ()
1.5
2.0
2.5
3.0
REAL ()
Figure 22. P3dB Load Pull Gain Contours (dB)
NOTE:
Figure 23. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2V09H400--04NR3
12
RF Device Data
NXP Semiconductors
PACKAGE DIMENSIONS
A2V09H400--04NR3
RF Device Data
NXP Semiconductors
13
A2V09H400--04NR3
14
RF Device Data
NXP Semiconductors
A2V09H400--04NR3
RF Device Data
NXP Semiconductors
15
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
AN1907: Solder Reflow Attach Method for High Power RF Devices in Plastic Packages
AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
Electromigration MTTF Calculator
.s2p File
Development Tools
Printed Circuit Boards
To Download Resources Specific to a Given Part Number:
1. Go to http://www.nxp.com/RF
2. Search by part number
3. Click part number link
4. Choose the desired resource from the drop down menu
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
Description
0
Nov. 2016
Initial release of data sheet
1
Mar. 2017
On Characteristics table: Side A Carrier, Side B Peaking: updated VGS(th) Typ values and VDS(on) Min, Typ
and Max values to reflect the actual performance of the device, p. 2
Typical Performance table: added Gain Variation and Output Power Variation over Temperature typical
values, p. 3
780 MHz: added load pull performance tables and contour graphs, pp. 7--12
A2V09H400--04NR3
16
RF Device Data
NXP Semiconductors
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nxp.com/support
Information in this document is provided solely to enable system and software
implementers to use NXP products. There are no express or implied copyright licenses
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in this document. NXP reserves the right to make changes without further notice to any
products herein.
NXP makes no warranty, representation, or guarantee regarding the suitability of its
products for any particular purpose, nor does NXP assume any liability arising out of the
application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation consequential or incidental damages. “Typical” parameters
that may be provided in NXP data sheets and/or specifications can and do vary in
different applications, and actual performance may vary over time. All operating
parameters, including “typicals,” must be validated for each customer application by
customer’s technical experts. NXP does not convey any license under its patent rights
nor the rights of others. NXP sells products pursuant to standard terms and conditions of
sale, which can be found at the following address: nxp.com/SalesTermsandConditions.
NXP, the NXP logo, and Airfast are trademarks of NXP B.V. All other product or service
names are the property of their respective owners.
E 2016–2017 NXP B.V.
A2V09H400--04NR3
Document
Number: Data
A2V09H400--04N
RF Device
Rev. 1,
03/2017
NXP
Semiconductors
17
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