NXP Semiconductors
Technical Data
Document Number: A3T19H455W23S
Rev. 0, 12/2017
RF Power LDMOS Transistor
N--Channel Enhancement--Mode Lateral MOSFET
This 81 W asymmetrical Doherty RF power LDMOS transistor is designed
for cellular base station applications requiring very wide instantaneous
bandwidth capability covering the frequency range of 1930 to 1990 MHz.
1900 MHz
Typical Doherty Single--Carrier W--CDMA Performance: VDD = 30 Vdc,
IDQA = 540 mA, VGSB = 0.6 Vdc, Pout = 81 W Avg., Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF.
Frequency
Gps
(dB)
D
(%)
Output PAR
(dB)
ACPR
(dBc)
1930 MHz
16.2
49.6
8.1
–31.0
1960 MHz
16.5
49.4
8.0
–32.1
1990 MHz
16.4
49.1
7.8
–32.6
Features
Advanced high performance in--package Doherty
Designed for wide instantaneous bandwidth applications
Greater negative gate--source voltage range for improved Class C operation
Able to withstand extremely high output VSWR and broadband operating
conditions
Designed for digital predistortion error correction systems
A3T19H455W23SR6
1930–1990 MHz, 81 W AVG., 30 V
AIRFAST RF POWER LDMOS
TRANSISTOR
ACP--1230S--4L2S
6 VBWA(2)
Carrier
5 RFoutA/VDSA
RFinA/VGSA 1
(1)
RFinB/VGSB 2
4 RFoutB/VDSB
Peaking
3 VBWB(2)
(Top View)
Figure 1. Pin Connections
1. Pin connections 4 and 5 are DC coupled
and RF independent.
2. Device can operate with VDD current
supplied through pin 3 and pin 6.
2017 NXP B.V.
RF Device Data
NXP Semiconductors
A3T19H455W23SR6
1
Table 1. Maximum Ratings
Rating
Symbol
Value
Unit
Drain--Source Voltage
VDSS
--0.5, +65
Vdc
Gate--Source Voltage
VGS
--6.0, +10
Vdc
Operating Voltage
VDD
32, +0
Vdc
Storage Temperature Range
Tstg
--65 to +150
C
Case Operating Temperature Range
TC
--40 to +150
C
Operating Junction Temperature Range (1,2)
TJ
--40 to +225
C
CW
172
0.7
W
W/C
Symbol
Value (2,3)
Unit
RJC
0.14
C/W
CW Operation @ TC = 25C when DC current is fed through pin 3 and pin 6
Derate above 25C
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Case Temperature 81C, 81 W Avg., W--CDMA, 30 Vdc, IDQA = 600 mA,
VGSB = 0.6 Vdc, 1960 MHz
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
2
Charge Device Model (per JESD22--C101)
C3
Table 4. Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 32 Vdc, VGS = 0 Vdc)
IDSS
—
—
5
Adc
Gate--Source Leakage Current
(VGS = 5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
Adc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 160 Adc)
VGS(th)
1.4
1.8
2.2
Vdc
Gate Quiescent Voltage
(VDD = 30 Vdc, IDA = 540 mAdc, Measured in Functional Test)
VGSA(Q)
2.2
2.6
3.0
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 1.6 Adc)
VDS(on)
0.05
0.15
0.3
Vdc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 360 Adc)
VGS(th)
0.8
1.2
1.6
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 3.6 Adc)
VDS(on)
0.05
0.15
0.3
Vdc
Characteristic
Off Characteristics
(4)
On Characteristics -- Side A, Carrier
On Characteristics -- Side B, Peaking
1.
2.
3.
4.
Continuous use at maximum temperature will affect MTTF.
MTTF calculator available at http://www.nxp.com/RF/calculators.
Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.nxp.com/RF and search for AN1955.
Side A and Side B are tied together for this measurement.
(continued)
A3T19H455W23SR6
2
RF Device Data
NXP Semiconductors
Table 4. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
(1,2,3)
Functional Tests
(In NXP Doherty Test Fixture, 50 ohm system) VDD = 30 Vdc, IDQA = 540 mA, VGSB = 0.6 Vdc, Pout = 81 W Avg.,
f = 1990 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured
in 3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain
Gps
15.2
16.4
17.7
dB
Drain Efficiency
D
46.0
49.1
—
%
Pout @ 3 dB Compression Point, CW
P3dB
56.0
56.9
—
dBm
Adjacent Channel Power Ratio
ACPR
—
–32.6
–28.0
dBc
Load Mismatch
10% Duty Cycle
(3)
(In NXP Doherty Test Fixture, 50 ohm system) IDQA = 540 mA, VGSB = 0.6 Vdc, f = 1960 MHz, 12 sec(on),
VSWR 10:1 at 32 Vdc, 490 W Pulsed CW Output Power
(3 dB Input Overdrive from 340 W Pulsed CW Rated Power)
No Device Degradation
Typical Performance (3) (In NXP Doherty Test Fixture, 50 ohm system) VDD = 30 Vdc, IDQA = 540 mA, VGSB = 0.6 Vdc,
1930–1990 MHz Bandwidth
Pout @ 3 dB Compression Point (4)
P3dB
—
541
—
W
—
–29
—
VBWres
—
200
—
MHz
Gain Flatness in 60 MHz Bandwidth @ Pout = 81 W Avg.
GF
—
0.3
—
dB
Gain Variation over Temperature
(–30C to +85C)
G
—
0.009
—
dB/C
P1dB
—
0.004
—
dB/C
AM/PM
(Maximum value measured at the P3dB compression point across
the 1930–1990 MHz bandwidth)
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Output Power Variation over Temperature
(–30C to +85C)
Table 5. Ordering Information
Device
A3T19H455W23SR6
1.
2.
3.
4.
Tape and Reel Information
R6 Suffix = 150 Units, 56 mm Tape Width, 13--inch Reel
Package
ACP--1230S--4L2S
VDDA and VDDB must be tied together and powered by a single DC power supply.
Part internally matched both on input and output.
Measurements made with device in an asymmetrical Doherty configuration.
P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
3
D98988
VGGA
VDDA
C3
C1
C4
C7
C9
R1
C13
C21
C19
Z1
P
C22
CUT OUT AREA
C18
R4 C17
C20
C24
R2
C10
C15
C23
C
R3
A3T19H455W23S
Rev. 0
C11
C16
C14
C8
C12
C5
C6
C2
VGGB
VDDB
Note: VDDA and VDDB must be tied together and powered by a single DC power supply.
Figure 2. A3T19H455W23SR6 Test Circuit Component Layout
Table 6. A3T19H455W23SR6 Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
C1, C2
470 F, 63 V Electrolytic Capacitor
MCGPR63V477M13X26-RH
Multicomp
C3, C4, C5, C6
10 F Chip Capacitor
C5750X7S2A106M230KB
TDK
C7, C8
220 nF Chip Capacitor
C1206C224Z5VACTU
Kemet
C9, C10, C11, C12, C20
10 pF Chip Capacitor
ATC100B100JT500XT
ATC
C13, C14
10 F Chip Capacitor
C3225X7S1H106K
TDK
C15, C16, C17
10 pF Chip Capacitor
ATC600F100JT250XT
ATC
C18
8.2 pF Chip Capacitor
ATC600F8R2BT250XT
ATC
C19
5.1 pF Chip Capacitor
ATC100B5R1CT500XT
ATC
C21
1.3 pF Chip Capacitor
ATC100B1R3BW500XT
ATC
C22, C24
0.3 pF Chip Capacitor
ATC100B0R3BT500XT
ATC
C23
0.2 pF Chip Capacitor
ATC100B0R2BT500XT
ATC
R1, R2
3.3 , 1/4 W Chip Resistor
WCR1206-3R3F
Welwyn
R3
50 , 8 W Termination Chip Resistor
C8A50Z4A
Anaren
R4
0 , 1/4 W Chip Resistor
CWCR08050000Z0EA
Vishay
Z1
1800-2200 MHz Band, 90, 2 dB Directional Coupler
X3C20F1-02S
Anaren
PCB
Rogers RO4350B, 0.020, r = 3.66
D98988
MTL
A3T19H455W23SR6
4
RF Device Data
NXP Semiconductors
16.6
52
50
D
16.4
48
Gps
16.2
46
16
PARC
15.8
15.6
–25
–1.7
–27
–1.9
–29
15.4
15
1880
1900
1920
1940
–31
ACPR
Input Signal PAR = 9.9 dB @
0.01% Probability on CCDF
15.2
1960
1980
–33
2000
2020
–2.1
–2.3
–2.5
–35
2040
PARC (dB)
16.8
Gps, POWER GAIN (dB)
54
VDD = 30 Vdc, Pout = 81 W (Avg.), IDQA = 540 mA, VGSB = 0.6 Vdc
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
ACPR (dBc)
17
D, DRAIN
EFFICIENCY (%)
TYPICAL CHARACTERISTICS — 1930–1990 MHz
–2.7
f, FREQUENCY (MHz)
IMD, INTERMODULATION DISTORTION (dBc)
Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 81 Watts Avg.
–20
VDD = 30 Vdc, Pout = 39 W (PEP), IDQA = 540 mA
VGSB = 0.6 Vdc, Two--Tone Measurements
–30
(f1 + f2)/2 = Center Frequency of 1960 MHz
IM3--U
IM3--L
IM5--L
–40
IM5--U
–50
IM7--L
–60
–70
IM7--U
10
1
100
300
TWO--TONE SPACING (MHz)
17
0
16.5
16
15.5
15
14.5
VDD = 30 Vdc, IDQA = 540 mA, VGSB = 0.6 Vdc, f = 1960 MHz
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF
Gps
–1
D
ACPR
–3 dB = 115.8 W
–4
60
–28
50
–2 dB = 86.2 W
–3
–27
55
–1 dB = 53.3 W
–2
65
45
40
–29
–30
ACPR (dBc)
1
D DRAIN EFFICIENCY (%)
17.5
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
Gps, POWER GAIN (dB)
Figure 4. Intermodulation Distortion Products
versus Two--Tone Spacing
–31
–32
PARC
–5
30
60
90
120
150
35
180
–33
Pout, OUTPUT POWER (WATTS)
Figure 5. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
5
TYPICAL CHARACTERISTICS — 1930–1990 MHz
Gps, POWER GAIN (dB)
18
Gps
16
1930 MHz
14
1960 MHz
1990 MHz
D
1990 MHz
1960 MHz
1930 MHz
10
55
0
45
35
ACPR
25
12
1990 MHz
1960 MHz
1930 MHz
10
8
65
Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF
10
1
100
15
5
500
–10
–20
–30
ACPR (dBc)
VDD = 30 Vdc, IDQA = 540 mA, VGSB = 0.6 Vdc
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
D, DRAIN EFFICIENCY (%)
20
–40
–50
Pout, OUTPUT POWER (WATTS) AVG.
Figure 6. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
18
16
GAIN (dB)
14
VDD = 30 Vdc
Pin = 0 dBm
IDQA = 540 mA
VGSB = 0.6 Vdc
Gain
12
10
8
6
1550
1650
1750
1850
1950
2050
2150
2250
2350
f, FREQUENCY (MHz)
Figure 7. Broadband Frequency Response
A3T19H455W23SR6
6
RF Device Data
NXP Semiconductors
Table 7. Carrier Side Load Pull Performance — Maximum Power Tuning
VDD = 30 Vdc, IDQA = 779 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
1930
3.52 – j7.64
3.44 + j7.03
1960
4.30 – j7.50
4.65 + j7.55
1990
5.95 – j8.89
6.72 + j7.83
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1.09 – j4.64
18.6
52.9
194
58.8
–14
1.03 – j4.61
18.6
52.8
191
57.7
–14
1.04 – j4.86
18.4
52.8
190
57.2
–15
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1930
3.52 – j7.64
3.33 + j7.60
1.06 – j4.73
16.4
53.6
229
59.3
–20
1960
4.30 – j7.50
4.78 + j8.27
1.03 – j5.00
16.2
53.6
228
57.2
–19
1990
5.95 – j8.89
7.14 + j9.00
1.04 – j4.94
16.3
53.6
227
58.1
–21
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 8. Carrier Side Load Pull Performance — Maximum Efficiency Tuning
VDD = 30 Vdc, IDQA = 779 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1930
3.52 – j7.64
3.49 + j7.36
2.43 – j3.71
21.5
50.9
124
73.0
–21
1960
4.30 – j7.50
4.78 + j8.04
2.32 – j3.40
21.8
50.5
112
72.5
–21
1990
5.95 – j8.89
6.95 + j8.48
2.19 – j3.23
21.9
50.1
103
72.5
–23
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2.66 – j4.05
19.3
51.6
145
72.0
–26
4.88 + j8.52
2.50 – j3.81
19.5
51.4
137
71.6
–27
7.08 + j9.14
2.07 – j3.99
19.1
51.9
154
71.4
–27
f
(MHz)
Zsource
()
Zin
()
1930
3.52 – j7.64
3.46 + j7.73
1960
4.30 – j7.50
1990
5.95 – j8.89
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
7
Table 9. Peaking Side Load Pull Performance — Maximum Power Tuning
VDD = 30 Vdc, VGSB = 0.6 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
1930
2.29 – j6.45
1.80 + j5.63
1960
3.54 – j6.53
2.40 + j6.06
1990
4.98 – j6.44
3.24 + j6.51
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2.37 – j5.99
13.5
56.0
400
52.9
–29
2.60 – j5.99
13.8
56.0
399
54.1
–28
2.78 – j5.86
13.9
55.9
392
54.2
–29
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1930
2.29 – j6.45
1.90 + j5.91
2.55 – j6.21
11.4
56.6
462
53.9
–35
1960
3.54 – j6.53
2.60 + j6.41
2.81 – j6.09
11.7
56.6
459
54.9
–35
1990
4.98 – j6.44
3.69 + j6.91
3.13 – j6.18
11.7
56.5
450
54.6
–34
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 10. Peaking Side Load Pull Performance — Maximum Efficiency Tuning
VDD = 30 Vdc, VGSB = 0.6 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1930
2.29 – j6.45
1.66 + j5.59
3.67 – j4.21
14.5
55.2
328
59.4
–33
1960
3.54 – j6.53
2.16 + j5.99
3.59 – j3.69
14.7
54.8
301
60.3
–33
1990
4.98 – j6.44
2.92 + j6.48
3.32 – j3.45
14.7
54.7
298
60.4
–33
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
3.95 – j4.87
12.2
56.1
403
59.5
–39
2.49 + j6.40
4.03 – j4.56
12.4
55.9
393
60.1
–38
3.49 + j6.92
3.84 – j4.23
12.5
55.8
384
60.1
–38
f
(MHz)
Zsource
()
Zin
()
1930
2.29 – j6.45
1.82 + j5.90
1960
3.54 – j6.53
1990
4.98 – j6.44
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A3T19H455W23SR6
8
RF Device Data
NXP Semiconductors
–1
–1
–2
–2
–3
–3
E
–4
52.5 52 51.5
P
–5
51
50.5
–6
–7
IMAGINARY ()
IMAGINARY ()
P1dB – TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 1960 MHz
50
49.5
2
1
3
REAL ()
4
5
0
2
1
3
REAL ()
–3
22
E
21.5
P
21
18.5
0
1
19
2
19.5
20
3
REAL ()
4
5
6
–26
–24
–2
IMAGINARY ()
IMAGINARY ()
56
Figure 9. P1dB Load Pull Efficiency Contours (%)
22.5
–2
–7
60
–1
–6
62
P
–5
–7
6
–1
–5
64
E
–4
–6
48.5
Figure 8. P1dB Load Pull Output Power Contours (dBm)
–4
66
70
58
49
0
68
–22
–20
–3
–18
E
–4
–16
P
–5
–14
20.5
–6
4
5
6
Figure 10. P1dB Load Pull Gain Contours (dB)
NOTE:
–7
–12
0
1
2
3
REAL ()
4
5
6
Figure 11. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
9
–1
–1
–2
–2
–3
–3
IMAGINARY ()
IMAGINARY ()
P3dB – TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 1960 MHz
E
–4
53 52.5
–5
52
P
51.5
51
50.5
50
–6
–7
2
1
3
REAL ()
4
66
5
Figure 12. P3dB Load Pull Output Power Contours (dBm)
62
70
–5
–7
6
64
E
–4
60
P
58
56
–6
49.5
0
68
54
0
2
1
3
REAL ()
4
6
Figure 13. P3dB Load Pull Efficiency Contours (%)
–1
–1
20.5
–2
5
–32
–30
–2
20
E
–4
–5
–7
19.5
19
P
17
0
1
–3
–26
E
–4
–24
–22
–5
P
–20
18.5
16.5
–6
IMAGINARY ()
IMAGINARY ()
–28
–3
2
17.5
–6
18
3
REAL ()
4
5
6
Figure 14. P3dB Load Pull Gain Contours (dB)
NOTE:
–7
–18
–16
0
1
2
3
REAL ()
4
5
6
Figure 15. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A3T19H455W23SR6
10
RF Device Data
NXP Semiconductors
P1dB – TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 1960 MHz
–2
52.5
54
–3
54.5
52
E
–4
IMAGINARY ()
IMAGINARY ()
–3
–2
53.5
53
55
–5
–6
55.5
P
58
E
–4
56
54
–5
–6
52
P
50
–7
–8
–7
0
2
1
3
REAL ()
4
5
–8
6
–2
–2
–3
–3
E
–4
14.5
–5
–6
11
13.5
11.5
–7
–8
14
P
12
0
1
2
12.5
1
2
3
REAL ()
4
5
6
Figure 18. P1dB Load Pull Gain Contours (dB)
NOTE:
–36
–38
4
5
6
–34
–32
E
–4
–30
–5
–6
P
–7
13
3
REAL ()
0
46
Figure 17. P1dB Load Pull Efficiency Contours (%)
IMAGINARY ()
IMAGINARY ()
Figure 16. P1dB Load Pull Output Power Contours (dBm)
48
44
–8
–24
0
1
2
–28
–26
3
REAL ()
4
5
6
Figure 19. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
11
P3dB – TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 1960 MHz
–2
–2
53.5
54.5
55
53
–3
52.5
–4
55.5
IMAGINARY ()
IMAGINARY ()
–3
54
E
–5
56
–6
P
56.5
58
–4
–5
54
–6
–7
–7
–8
–8
P
52
50
44
0
1
2
3
REAL ()
4
5
6
–2
–2
–3
–3
12.5
–4
E
–5
12
–6
P
–8
11.5
9
–7
9.5
0
1
10
2
10.5
3
REAL ()
0
1
3
REAL ()
–42
4
6
Figure 22. P3dB Load Pull Gain Contours (dB)
NOTE:
6
–38
–4
–36
E
–5
–6
–34
P
–7
5
5
–40
–44
–32
11
4
2
48
46
Figure 21. P3dB Load Pull Efficiency Contours (%)
IMAGINARY ()
IMAGINARY ()
Figure 20. P3dB Load Pull Output Power Contours (dBm)
56
E
–8
–30
–28
0
1
2
3
REAL ()
4
5
6
Figure 23. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A3T19H455W23SR6
12
RF Device Data
NXP Semiconductors
PACKAGE DIMENSIONS
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
13
A3T19H455W23SR6
14
RF Device Data
NXP Semiconductors
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
AN1908: Solder Reflow Attach Method for High Power RF Devices in Air Cavity Packages
AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
Electromigration MTTF Calculator
RF High Power Model
.s2p File
Development Tools
Printed Circuit Boards
To Download Resources Specific to a Given Part Number:
1. Go to http://www.nxp.com/RF
2. Search by part number
3. Click part number link
4. Choose the desired resource from the drop down menu
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
0
Dec. 2017
Description
Initial release of data sheet
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
15
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application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation consequential or incidental damages. “Typical” parameters
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parameters, including “typicals,” must be validated for each customer application by
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NXP, the NXP logo and Airfast are trademarks of NXP B.V. All other product or service
names are the property of their respective owners.
E 2017 NXP B.V.
A3T19H455W23SR6
Document Number: A3T19H455W23S
Rev. 0, 12/2017
16
RF Device Data
NXP Semiconductors
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