BLF7G10L-250;
BLF7G10LS-250
Power LDMOS transistor
Rev. 4 — 13 September 2012
Product data sheet
1. Product profile
1.1 General description
250 W LDMOS power transistor for base station applications at frequencies from
869 MHz to 960 MHz.
Table 1.
Typical performance
Test signal: 3GPP; test model 1; 64 DPCH; PAR = 7.5 dB at 0.01 % probability on CCDF per carrier;
carrier spacing = 5 MHz. Typical RF performance at Tcase = 25 C.
Test signal
2-carrier W-CDMA
2-carrier W-CDMA
f
IDq
VDS
PL(AV)
Gp
D
ACPR
(MHz)
(mA)
(V)
(W)
(dB)
(%)
(dBc)
869 to 894
[1]
1800
30
60
19.5
27.4
35.6
920 to 960
[2]
1800
30
60
19.5
30.5
34
[1]
In a common source class-AB application test circuit.
[2]
In a common source class-AB production test circuit.
1.2 Features and benefits
Excellent ruggedness
High efficiency
Low Rth providing excellent thermal stability
Designed for broadband operation (869 MHz to 960 MHz)
Lower output capacitance for improved performance in Doherty applications
Designed for low memory effects providing excellent pre-distortability
Internally matched for ease of use (input and output)
Integrated ESD protection
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
RF power amplifiers for W-CDMA base stations and multi carrier applications in the
869 MHz to 960 MHz frequency range
BLF7G10L-250; BLF7G10LS-250
NXP Semiconductors
Power LDMOS transistor
2. Pinning information
Table 2.
Pinning
Pin
Description
Simplified outline
Graphic symbol
BLF7G10L-250 (SOT502A)
1
drain
2
gate
3
source
1
1
3
[1]
2
2
3
sym112
BLF7G10LS-250 (SOT502B)
1
drain
2
gate
3
source
1
1
3
[1]
2
2
3
sym112
[1]
Connected to flange
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name Description
Version
BLF7G10L-250
-
flanged ceramic package; 2 mounting holes; 2 leads
SOT502A
BLF7G10LS-250
-
earless flanged ceramic package; 2 leads
SOT502B
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
VDS
Conditions
Min
Max
Unit
drain-source voltage
-
65
V
VGS
gate-source voltage
0.5
+13
V
Tstg
storage temperature
65
+150
C
Tj
junction temperature
-
200
C
5. Thermal characteristics
Table 5.
Thermal characteristics
Symbol Parameter
Rth(j-c)
BLF7G10L-250_7G10LS-250
Product data sheet
Conditions
Typ
thermal resistance from junction to case Tcase = 80 C; PL = 60 W (CW);
VDS = 30 V; IDq = 1800 mA
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 13 September 2012
Unit
0.38 K/W
© NXP B.V. 2012. All rights reserved.
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BLF7G10L-250; BLF7G10LS-250
NXP Semiconductors
Power LDMOS transistor
6. Characteristics
Table 6.
DC characteristics
Tj = 25 C unless otherwise specified.
Symbol Parameter
Conditions
V(BR)DSS drain-source breakdown voltage VGS = 0 V; ID = 3.3 mA
Min
Typ
Max
Unit
65
-
-
V
VGS(th)
gate-source threshold voltage
VDS = 10 V; ID = 330 mA
1.50
1.9
2.30
V
IDSS
drain leakage current
VGS = 0 V; VDS = 28 V
-
-
5
A
IDSX
drain cut-off current
VGS = VGS(th) + 3.75 V;
VDS = 10 V
-
56
-
A
IGSS
gate leakage current
VGS = 11 V; VDS = 0 V
-
-
0.5
mA
gfs
forward transconductance
VDS = 10 V; ID = 11.55 A
-
22
-
S
RDS(on)
drain-source on-state resistance VGS = VGS(th) + 3.75 V;
ID = 11.55 A
-
57
-
m
Table 7.
RF characteristics
Test signal: 2-carrier W-CDMA; PAR = 7.5 dB at 0.01 % probability on the CCDF;
3GPP test model 1; 64 DPCH; f1 = 920 MHz; f2 = 925 MHz; f3 = 955 MHz; f4 = 960 MHz;
RF performance at VDS = 30 V; IDq = 1800 mA; Tcase = 25 C; unless otherwise specified; in a
class-AB production test circuit.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Gp
power gain
PL(AV) = 60 W
18.5
19.5
-
dB
RLin
input return loss
PL(AV) = 60 W
-
15.5
10
dB
D
drain efficiency
PL(AV) = 60 W
27
30.5
-
%
ACPR
adjacent channel power ratio
PL(AV) = 60 W
-
34
31
dBc
7. Test information
7.1 Ruggedness in class-AB operation
The BLF7G10L-250 and BLF7G10LS-250 are capable of withstanding a load mismatch
corresponding to VSWR = 10 : 1 through all phases under the following conditions:
VDS = 30 V; IDq = 1800 mA; PL = 200 W (CW); f = 920 MHz to 960 MHz.
7.2 Impedance information
Table 8.
Typical impedance information
IDq = 1800 mA; main transistor VDS = 30 V.
ZS and ZL defined in Figure 1.
BLF7G10L-250_7G10LS-250
Product data sheet
f
ZS
ZL
(MHz)
()
()
925
3.1 j3.3
1.0 j1.7
942
3.2 j3.3
1.0 j1.6
960
3.4 j3.5
0.9 j1.4
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 13 September 2012
© NXP B.V. 2012. All rights reserved.
3 of 13
BLF7G10L-250; BLF7G10LS-250
NXP Semiconductors
Power LDMOS transistor
drain
ZL
gate
ZS
001aaf059
Fig 1.
Definition of transistor impedance
7.3 Circuit
Printed-Circuit Board (PCB): Rogers RO3006; r = 6.15 F/m; thickness = 0.635 mm; thickness copper plating = 35 m.
The vias can be used as a reference to place components.
The above layout shows the test circuit used to measure the devices in production. A more appropriate application
demonstration for specific customer needs can be provided.
See Table 9 for list of components.
Fig 2.
Component layout
Table 9.
List of components
See Figure 2 for component layout.
BLF7G10L-250_7G10LS-250
Product data sheet
Component
Description
Value
Remarks
C1, C2, C3, C4, C5, C6
multilayer ceramic chip capacitor
82 pF
ATC800B
C7, C9, C12, C14
multilayer ceramic chip capacitor
10 F
Murata
C8, C10, C11, C13
multilayer ceramic chip capacitor
1 F
Murata
C15, C16
electrolytic capacitor
470 F, 63 V
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 13 September 2012
© NXP B.V. 2012. All rights reserved.
4 of 13
BLF7G10L-250; BLF7G10LS-250
NXP Semiconductors
Power LDMOS transistor
7.4 Graphs
7.4.1 CW pulsed
aaa-001555
22
Gp
Gp
(dB)
ηD
(%)
(1)
(2)
(3)
18
18
48
52
PL (dBm)
56
20
14
0
10
VDS = 30 V; IDq = 1800 mA.
20
0
120
240
PL (W)
0
360
VDS = 30 V; IDq = 1800 mA.
(1) f = 920 MHz
(1) f = 920 MHz
(2) f = 940 MHz
(2) f = 940 MHz
(3) f = 960 MHz
(3) f = 960 MHz
Fig 3.
40
(1)
(2)
(3)
ηD
14
44
ηD
(%)
(1)
(2)
(3)
ηD
10
60
Gp
Gp
(dB)
40
(1)
(2)
(3)
aaa-001556
22
60
Power gain and drain efficiency as function of
output power; typical values
Fig 4.
Power gain and drain efficiency as function of
output power; typical values
aaa-001559
-12
RLin
(dB)
-14
(1)
(2)
-16
(3)
-18
-20
44
48
52
PL (dBm)
56
VDS = 30 V; IDq = 1800 mA.
(1) f = 920 MHz
(2) f = 940 MHz
(3) f = 960 MHz
Fig 5.
Input return loss as a function of output power; typical values
BLF7G10L-250_7G10LS-250
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 13 September 2012
© NXP B.V. 2012. All rights reserved.
5 of 13
BLF7G10L-250; BLF7G10LS-250
NXP Semiconductors
Power LDMOS transistor
7.4.2 2-Carrier W-CDMA
aaa-001561
21
Gp
(dB)
ηD
(%)
Gp
20
(1)
(2)
(3)
19
(1)
(2)
(3)
18
aaa-001562
21
50
Gp
(dB)
40
20
30
19
20
18
17
10
17
16
38
40
42
44
46
48
50
52
PL (dBm)
0
16
VDS = 30 V; IDq = 1800 mA.
40
(1)
(2)
(3)
30
(1)
(2)
(3)
ηD
20
10
0
40
80
(1) f = 920 MHz
(2) f = 940 MHz
(2) f = 940 MHz
(3) f = 960 MHz
(3) f = 960 MHz
Power gain and drain efficiency as function of
output power; typical values
Fig 7.
aaa-001564
-10
Power gain and drain efficiency as function of
output power; typical values
aaa-001566
-20
ACPR
(dBc)
RLin
(dB)
-30
-14
ACPR5M
(1)
(1)
(2)
(3)
-40
(2)
-50
38
42
46
50
PL (dBm)
-60
54
VDS = 30 V; IDq = 1800 mA.
(1)
(2)
(3)
38
42
(1) f = 920 MHz
(2) f = 940 MHz
(2) f = 940 MHz
(3) f = 960 MHz
(3) f = 960 MHz
Input return loss as a function of output
power; typical values
BLF7G10L-250_7G10LS-250
Product data sheet
46
50
PL (dBm)
54
VDS = 30 V; IDq = 1800 mA.
(1) f = 920 MHz
Fig 8.
ACPR10M
(3)
-18
-22
PL (W)
0
120
VDS = 30 V; IDq = 1800 mA.
(1) f = 920 MHz
Fig 6.
ηD
(%)
Gp
ηD
50
Fig 9.
Adjacent channel power ratio (5 MHz and
10 MHz) as function of output power; typical
values
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 13 September 2012
© NXP B.V. 2012. All rights reserved.
6 of 13
BLF7G10L-250; BLF7G10LS-250
NXP Semiconductors
Power LDMOS transistor
aaa-001568
9
PAR
(dB)
8
(1)
(2)
(3)
7
6
5
38
42
46
50
PL (dBm)
54
VDS = 30 V; IDq = 1800 mA.
(1) f = 920 MHz
(2) f = 940 MHz
(3) f = 960 MHz
Fig 10. Peak-to-average ratio as a function of output power; typical values
BLF7G10L-250_7G10LS-250
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 13 September 2012
© NXP B.V. 2012. All rights reserved.
7 of 13
BLF7G10L-250; BLF7G10LS-250
NXP Semiconductors
Power LDMOS transistor
8. Package outline
Flanged ceramic package; 2 mounting holes; 2 leads
SOT502A
D
A
F
3
D1
U1
B
q
c
C
1
H
L
E1
p
U2
E
w1 M A M B M
A
2
w2 M C M
b
0
5
Q
10 mm
scale
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
UNIT
A
b
c
mm
4.72
3.43
12.83
12.57
0.15
0.08
inches
0.186
0.135
0.505 0.006
0.495 0.003
OUTLINE
VERSION
E
E1
F
H
L
p
Q
q
U1
U2
w1
w2
20.02 19.96
19.61 19.66
9.50
9.30
9.53
9.25
1.14
0.89
19.94
18.92
5.33
4.32
3.38
3.12
1.70
1.45
27.94
34.16
33.91
9.91
9.65
0.25
0.51
0.788 0.786
0.772 0.774
0.374 0.375
0.366 0.364
0.067
1.100
0.057
1.345
1.335
0.390
0.380
0.01
0.02
D
D1
0.045 0.785
0.035 0.745
0.210 0.133
0.170 0.123
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
03-01-10
12-05-02
SOT502A
Fig 11. Package outline SOT502A
BLF7G10L-250_7G10LS-250
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 13 September 2012
© NXP B.V. 2012. All rights reserved.
8 of 13
BLF7G10L-250; BLF7G10LS-250
NXP Semiconductors
Power LDMOS transistor
Earless flanged ceramic package; 2 leads
SOT502B
D
A
F
3
D
D1
c
U1
1
L
H
E1
U2
E
2
w2 M D M
b
0
5
Q
10 mm
scale
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
UNIT
A
b
c
mm
4.72
3.43
12.83
12.57
0.15
0.08
inches
0.186
0.135
0.505 0.006
0.495 0.003
OUTLINE
VERSION
E
E1
F
H
L
Q
U1
U2
w2
20.02 19.96
19.61 19.66
9.50
9.30
9.53
9.25
1.14
0.89
19.94
18.92
5.33
4.32
1.70
1.45
20.70
20.45
9.91
9.65
0.25
0.788 0.786
0.772 0.774
0.374 0.375
0.366 0.364
0.045 0.785
0.035 0.745
0.210
0.170
0.067 0.815
0.057 0.805
D
D1
REFERENCES
IEC
JEDEC
JEITA
0.390
0.010
0.380
EUROPEAN
PROJECTION
ISSUE DATE
07-05-09
12-05-02
SOT502B
Fig 12. Package outline SOT502B
BLF7G10L-250_7G10LS-250
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 13 September 2012
© NXP B.V. 2012. All rights reserved.
9 of 13
BLF7G10L-250; BLF7G10LS-250
NXP Semiconductors
Power LDMOS transistor
9. Handling information
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling
electrostatic sensitive devices.
Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or
equivalent standards.
10. Abbreviations
Table 10.
Abbreviations
Acronym
Description
3GPP
Third Generation Partnership Project
CCDF
Complementary Cumulative Distribution Function
CW
Continuous Wave
DPCH
Dedicated Physical CHannel
ESD
ElectroStatic Discharge
LDMOS
Laterally Diffused Metal Oxide Semiconductor
PAR
Peak-to-Average Ratio
VSWR
Voltage Standing Wave Ratio
W-CDMA
Wideband Code Division Multiple Access
11. Revision history
Table 11.
Revision history
Document ID
Release date Data sheet status
BLF7G10L-250_7G10LS-250 v.4 20120913
Modifications:
Product data sheet
Change
notice
Supersedes
-
BLF7G10L-250_7G10LS-250 v.3
•
Section 1.1 on page 1: The frequency has been changed to range from 869 MHz to
960 MHz.
•
•
Table 1 on page 1: An extra row has been added to the table.
Section 1.2 on page 1: The frequency has been changed to range from 869 MHz to
960 MHz.
•
Section 1.3 on page 1: The frequency has been changed to range from 869 MHz to
960 MHz.
•
•
•
•
Table 7 on page 3: The title of this table has been changed.
Table 7 on page 3: The table has been moved to Section 6 on page 3.
Section 7.3 on page 4: Section has been moved in front of Section 7.4 on page 5.
Section 9 on page 10: This section has been added.
BLF7G10L-250_7G10LS-250 v.3 20120216
Product data sheet
-
BLF7G10L-250_7G10LS-250 v.2
BLF7G10L-250_7G10LS-250 v.2 20111114
Preliminary data sheet -
BLF7G10L-250_7G10LS-250 v.1
BLF7G10L-250_7G10LS-250 v.1 20110225
Objective data sheet
-
BLF7G10L-250_7G10LS-250
Product data sheet
-
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Rev. 4 — 13 September 2012
© NXP B.V. 2012. All rights reserved.
10 of 13
BLF7G10L-250; BLF7G10LS-250
NXP Semiconductors
Power LDMOS transistor
12. Legal information
12.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
12.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
BLF7G10L-250_7G10LS-250
Product data sheet
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 13 September 2012
© NXP B.V. 2012. All rights reserved.
11 of 13
NXP Semiconductors
BLF7G10L-250; BLF7G10LS-250
Power LDMOS transistor
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
BLF7G10L-250_7G10LS-250
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 13 September 2012
© NXP B.V. 2012. All rights reserved.
12 of 13
NXP Semiconductors
BLF7G10L-250; BLF7G10LS-250
Power LDMOS transistor
14. Contents
1
1.1
1.2
1.3
2
3
4
5
6
7
7.1
7.2
7.3
7.4
7.4.1
7.4.2
8
9
10
11
12
12.1
12.2
12.3
12.4
13
14
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics . . . . . . . . . . . . . . . . . . 2
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Test information . . . . . . . . . . . . . . . . . . . . . . . . . 3
Ruggedness in class-AB operation . . . . . . . . . 3
Impedance information . . . . . . . . . . . . . . . . . . . 3
Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
CW pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2-Carrier W-CDMA . . . . . . . . . . . . . . . . . . . . . 6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
Handling information. . . . . . . . . . . . . . . . . . . . 10
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10
Legal information. . . . . . . . . . . . . . . . . . . . . . . 11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Contact information. . . . . . . . . . . . . . . . . . . . . 12
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 13 September 2012
Document identifier: BLF7G10L-250_7G10LS-250