BUJ105AD
Silicon diffused power transistor
Rev. 01 — 14 December 2004 Product data sheet
1. Product profile
1.1 General description
High-voltage, high-speed planar-passivated NPN power switching transistor in a SOT428 (D-PAK) surface mounted package.
1.2 Features
s Low thermal resistance s Fast switching
1.3 Applications
s Electronic lighting ballast s Inverters s DC-to-DC converters s Motor control systems
1.4 Quick reference data
s VCESM ≤ 700 V s Ptot ≤ 80 W s IC ≤ 8 A s hFEsat = 11 (typ)
2. Pinning information
Table 1: Pin 1 2 3 mb Pinning Description base collector emitter mounting base; connected to collector
2 1 3 1 3
sym056
Simplified outline
[1]
Symbol
mb
2
SOT428 (D-PAK)
[1] It is not possible to make a connection to pin 2 of the SOT428 (D-PAK) package.
Philips Semiconductors
BUJ105AD
Silicon diffused power transistor
3. Ordering information
Table 2: Ordering information Package Name BUJ105AD D-PAK Description Version plastic single-ended surface mounted package; 3 leads (one lead cropped) SOT428 Type number
4. Limiting values
Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCESM VCEO VCBO IC ICM IB IBM Ptot Tstg Tj Parameter peak collector-emitter voltage collector-emitter voltage collector-base voltage collector current (DC) peak collector current base current (DC) peak base current total power dissipation storage temperature junction temperature Tmb = ≤ 25 °C; see Figure 1 Conditions VBE = 0 V open base open emitter Min −65 Max 700 400 700 8 16 4 8 80 +150 150 Unit V V V A A A A W °C °C
120 Pder (%) 80
001aab993
40
0 0 40 80 120 Tmb (°C) 160
P tot P der ( % ) = ------------------------ × 100 % P tot ( 25 ° C ) Fig 1. Normalized total power dissipation as a function of mounting base temperature
9397 750 14196
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 14 December 2004
2 of 12
Philips Semiconductors
BUJ105AD
Silicon diffused power transistor
5. Thermal characteristics
Table 4: Symbol Rth(j-mb) Rth(j-a)
[1]
Thermal characteristics Parameter thermal resistance from junction to mounting base thermal resistance from junction to ambient Conditions see Figure 2
[1]
Min -
Typ 75
Max 1.56 -
Unit K/W K/W
Device mounted on a printed-circuit board; minimum footprint
10 Zth(j-mb) (K/W) 1 δ = 0.5 0.2 0.1 10−1 0.05 0.02 0.01
tp T Ptot
001aab998
δ=
tp T
t
10−2 10−5
10−4
10−3
10−2
10−1
1 tp (s)
10
Fig 2. Transient thermal impedance from junction to mounting base as a function of pulse duration
6. Characteristics
Table 5: Characteristics Tmb = 25 °C; unless otherwise specified. Symbol ICES ICBO ICEO IEBO VCEOsus VCEsat VBEsat hFE hFEsat
9397 750 14196
Parameter collector-emitter cut-off current collector-base cut-off current collector-emitter cut-off current emitter-base cut-off current collector-emitter sustaining voltage collector-emitter saturation voltage base-emitter saturation voltage DC current gain DC saturation current gain
Conditions VBE = 0 V; VCE = VCESMmax VBE = 0 V; VCE = VCESMmax; Tj = 125 °C VBE = 0 V; VCE = VCESMmax VCEO = VCEOMmax = 400 V VEB = 9 V; IC = 0 A IB = 0 A; IC = 10 mA; L = 25 mH; see Figure 3 and 4 IC = 4.0 A; IB = 0.8 A; see Figure 11 IC = 4.0 A; IB = 0.8 A; see Figure 12 IC = 1 mA; VCE = 5 V IC = 500 mA; VCE = 5 V; see Figure 10 IC = 4.0 A; VCE = 5 V
[1] [1] [1] [1]
Min 400 10 13 8
Typ 0.3 1.0 14 23 11
Max 0.2 0.5 0.2 0.1 1 1.0 1.5 34 36 15
Unit mA mA mA mA mA V V V
Static characteristics
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 14 December 2004
3 of 12
Philips Semiconductors
BUJ105AD
Silicon diffused power transistor
Table 5: Characteristics …continued Tmb = 25 °C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Dynamic characteristics Switching times (resistive load); see Figure 5 and 6 ton tstg tf tstg tf tstg tf
[1]
turn-on time storage time fall time storage time fall time storage time fall time
ICon = 5 A; IBon = −IBoff = 1 A; RL = 75 Ω
-
0.65 1.8 0.3 1.2 20 1.4 25
1 2.5 0.5 1.7 50 1.9 100
µs µs µs µs ns µs ns
Switching times (inductive load); see Figure 7 and 8 ICon = 5 A; IBon = 1 A; LB = 1 µH; VBB = −5 V ICon = 5 A; IBon = 1 A; LB = 1 µH; VBB = −5 V; Tj = 100 °C -
Switching times (inductive load); see Figure 7 and 8
Measured with half sine-wave voltage (curve tracer).
IC (mA) 50 V 100 Ω to 200 Ω horizontal oscilloscope vertical 6V 300 Ω 30 Hz to 60 Hz
001aab987
250
100 1Ω 10 0 min VCE (V) VCEOsus
001aab988
Fig 3. Test circuit for collector-emitter sustaining voltage
Fig 4. Oscilloscope display for collector-emitter sustaining voltage test waveform
9397 750 14196
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 14 December 2004
4 of 12
Philips Semiconductors
BUJ105AD
Silicon diffused power transistor
IC VCC 90 % ICon 90 %
RL VIM 0 tp T
001aab989
RB DUT tf IB ton tstg toff IBon 10 %
10 % t
VIM = −6 V to +8 V; VCC = 250 V; tp = 20 µs; δ = tp/T = 0.01. RB and RL calculated from ICon and IBon requirements.
t tr ≤ 30 ns −IBoff
001aab990
Fig 5. Test circuit for resistive load switching
Fig 6. Switching times waveforms for resistive load
IC ICon 90 %
VCC
LC 10 % IBon VBB LB DUT IB tstg toff IBon t tf t
001aab991
−IBoff
VCC = 300 V; VBB = −5 V; LC = 200 µH; LB = 1 µH.
001aab992
Fig 7. Test circuit for inductive load switching
Fig 8. Switching times waveforms for inductive load
9397 750 14196
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 14 December 2004
5 of 12
Philips Semiconductors
BUJ105AD
Silicon diffused power transistor
102
001aac045
102
001aac046
hFE
Tj = 100 °C 25 °C
hFE
Tj = 100 °C 25 °C
10
−40 °C
10
−40 °C
1 10−2
10−1
1 IC (A)
10
1 10−2
10−1
1 IC (A)
10
Fig 9. DC current gain as a function of collector current; typical values at VCE = 1 V
2.0 VCEsat (V) 1.6 IC = 1 A 2A 3A 4A
001aab995
Fig 10. DC current gain as a function of collector current; typical values at VCE = 5 V
1.3 VBEsat (V) 1.1
001aac047
1.2 0.9 0.8 Tj = −40 °C 25 °C 0.7 0.4 100 °C
0 10−2
10−1
1 IB (A)
10
0.5 10−1
1 IC (A)
10
Tj = 25 °C.
IC/IB = 4.
Fig 11. Collector-emitter saturation voltage as a function of base current; typical values
Fig 12. Base-emitter saturation voltage as a function of collector current; typical values
9397 750 14196
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 14 December 2004
6 of 12
Philips Semiconductors
BUJ105AD
Silicon diffused power transistor
0.6 VCEsat (V) 0.4
001aac048
VCC LC Tj = 100 °C 25 °C −40 °C
VCEclamp probe point
0.2
IBon VBB
LB DUT
001aab999
0 10−1
1 IC (A)
10
IC/IB = 4.
VCEclamp < 700 V; VCC = 150 V; VBB = −5 V, −3 V and −1 V; LB = 1 µH; LC = 200 µH.
Fig 13. Collector-emitter saturation voltage as a function of collector current; typical values
10 IC (A) 8
Fig 14. Test circuit for reverse bias safe operating area
001aac049
6 VBB = −5 V 4 −3 V −1 V 2
0 0 200 400 600 800 VCEclamp (V)
Tj < Tj(max).
Fig 15. Reverse bias safe operating area
7. Package information
Epoxy meets requirements of UL94 V-0 at 1⁄8 inch.
9397 750 14196
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 14 December 2004
7 of 12
Philips Semiconductors
BUJ105AD
Silicon diffused power transistor
8. Package outline
Plastic single-ended surface mounted package (D-PAK); 3 leads (one lead cropped) SOT428
y E b2 A A1 A E1
mounting base D1 HD
D2
2 L2 1 3
L L1
b1 e e1
b
w
M
A
c
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 2.38 2.22 A1 0.93 0.73 b 0.89 0.71 b1 1.1 0.9 b2 5.46 5.00 c 0.56 0.20 D1 6.22 5.98 D2 min 4.0 E 6.73 6.47 E1 min 4.45 e 2.285 e1 4.57 HD 10.4 9.6 L 2.95 2.55 L1 min 0.5 L2 0.9 0.5 w 0.2 y max 0.2
OUTLINE VERSION SOT428
REFERENCES IEC JEDEC TO-252 JEITA SC-63
EUROPEAN PROJECTION
ISSUE DATE 01-12-11 04-10-14
Fig 16. Package outline SOT428 (SC-63)
9397 750 14196 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 14 December 2004
8 of 12
Philips Semiconductors
BUJ105AD
Silicon diffused power transistor
9. Mounting
7.0
7.0
2.15
1.5
2.5
4.57
001aab021
Dimensions in mm.
Fig 17. SOT428 soldering pattern for surface mounting
9397 750 14196
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 14 December 2004
9 of 12
Philips Semiconductors
BUJ105AD
Silicon diffused power transistor
10. Revision history
Table 6: Revision history Release date 20041214 Data sheet status Product data sheet Change notice Doc. number 9397 750 14196 Supersedes Document ID BUJ105AD_1
9397 750 14196
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 14 December 2004
10 of 12
Philips Semiconductors
BUJ105AD
Silicon diffused power transistor
11. Data sheet status
Level I II Data sheet status [1] Objective data Preliminary data Product status [2] [3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
III
Product data
Production
[1] [2] [3]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
12. Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
13. Disclaimers
Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
14. Contact information
For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
9397 750 14196
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 14 December 2004
11 of 12
Philips Semiconductors
BUJ105AD
Silicon diffused power transistor
15. Contents
1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 11 12 13 14 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 3 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Package information . . . . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Mounting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Contact information . . . . . . . . . . . . . . . . . . . . 11
© Koninklijke Philips Electronics N.V. 2004
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 14 December 2004 Document number: 9397 750 14196
Published in The Netherlands
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