BUJ303B,127

DISCRETE SEMICONDUCTORS DATA SHEET BUJ303B Silicon Diffused Power Transistor Product specification March 2002 NXP Semiconductors Product specification Silicon Diffused Power Transistor BUJ303B GENERAL DESCRIPTION High-voltage, high-speed planar-passivated npn power switching transistor in a TO220AB envelope intended for use in high frequency electronic lighting ballast applications, converters, inverters, switching regulators, motor control systems, etc. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT VCESM VCBO VCEO IC ICM Ptot VCEsat hFEsat tf Collector-emitter voltage peak value Collector-Base voltage (open emitter) Collector-emitter voltage (open base) Collector current (DC) Collector current peak value Total power dissipation Collector-emitter saturation voltage DC current gain Fall time VBE = 0 V 0.25 10.5 300 1050 1050 400 5 10 100 1.5 - V V V A A W V PINNING - TO220AB PIN base 2 collector 3 emitter tab PIN CONFIGURATION DESCRIPTION 1 Tmb ≤ 25 ˚C IC = 3 A; IB = 1 A IC = 3 A; VCE = 1.5 V IC=2.5 A,IB1=0.5 A ns SYMBOL c tab b collector e 1 23 LIMITING VALUES Limiting values in accordance with the Absolute Maximum Rating System (IEC 134) SYMBOL PARAMETER CONDITIONS VCESM VCEO VCBO IC ICM IB IBM Ptot Tstg Tj Collector to emitter voltage Collector to emitter voltage (open base) Collector to base voltage (open emitter) Collector current (DC) Collector current peak value Base current (DC) Base current peak value Total power dissipation Storage temperature Junction temperature VBE = 0 V Tmb ≤ 25 ˚C MIN. MAX. UNIT -65 - 1050 400 1050 5 10 2 4 100 150 150 V V V A A A A W ˚C ˚C TYP. MAX. UNIT - 1.25 K/W 60 - K/W THERMAL RESISTANCES SYMBOL PARAMETER Rth j-mb Junction to mounting base Rth j-a Junction to ambient March 2002 CONDITIONS in free air 1 Rev 1.000 NXP Semiconductors Product specification Silicon Diffused Power Transistor BUJ303B STATIC CHARACTERISTICS Tmb = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS 1 MIN. TYP. MAX. UNIT VBE = 0 V; VCE = VCESMmax VBE = 0 V; VCE = VCESMmax; Tj = 125 ˚C - - 1.0 2.0 mA mA - - 0.1 mA ICES,ICBO ICES Collector cut-off current ICEO Collector cut-off current 1 VCEO = VCEOMmax(400V) IEBO VCEOsust VCEsat Emitter cut-off current Collector-emitter sustaining voltage Collector-emitter saturation voltage VEB = 9 V; IC = 0 A IC = 300 mA; L = 25 mH IC = 3 A; IB = 1 A IC = 1 A; IB = 0.2 A 400 - 0.25 - 0.1 1.5 0.5 mA V V V VBEsat hFE Base-emitter saturation voltage DC current gain IC = 3 A; IB = 1 A IC = 10 mA; VCE = 5 V IC = 800 mA; VCE = 3 V 10 23 1.0 31 1.5 40 V hFEsat DC current gain IC = 3 A; VCE = 1.5 V - 10.5 - TYP. MAX. UNIT 1 2.5 0.3 - µs µs µs 2 200 - µs ns 3 300 - µs ns DYNAMIC CHARACTERISTICS Tmb = 25 ˚C unless otherwise specified SYMBOL ton ts tf PARAMETER CONDITIONS Switching times (resistive load) ICon = 2.5 A; IBon = 0.5 A IBoff = -1 A; VCC = 250 V; Turn-on time Turn-off storage time Turn-off fall time Switching times (inductive load) ts tf Turn-off storage time Turn-off fall time Switching times (inductive load) ts tf Turn-off storage time Turn-off fall time ICon = 2.5 A; IBon = 0.5 A; -VBB = 5 V; LC = 300 µH; LB = 1 µH; VCC = 350 V ICon = 2.5 A; IBon = 0.5 A; -VBB = 5 V; LC = 300 µH; LB = 1 µH; VCC = 350 V; Tj = 100 ˚C 1 Measured with half sine-wave voltage (curve tracer). March 2002 2 Rev 1.000 NXP Semiconductors Product specification Silicon Diffused Power Transistor BUJ303B 100-200R ICon 90 % 90 % + 50v + VB IC 25 mH 10 % ts ton Pulse in Oscilloscope Horizontal 50R tf toff IBon IB 10 % Oscilloscope Vertical tr C.T. 30ns -IBoff Fig.1. Test circuit for VCEOsust. Fig.4. Switching times waveforms with resistive load. IC / mA VCC LC 400 300 IBon LB T.U.T. -VBB 0 min VCEOsust VCE / V Fig.5. Test circuit inductive load. VCC = 350 V; -VBE = 5 V; LC = 300 uH; LB = 1 uH Fig.2. Oscilloscope display for VCEOsust. VCC ICon 90 % IC RL VIM 10 % RB 0 T.U.T. ts tf t toff tp IB IBon T t -IBoff Fig.3. Test circuit resistive load. VIM = -6 to +8 V VCC = 250 V; tp = 20 µs; δ = tp / T = 0.01. RB and RL calculated from ICon and IBon requirements. March 2002 Fig.6. Switching times waveforms with inductive load. 3 Rev 1.000 NXP Semiconductors Product specification Silicon Diffused Power Transistor Normalised Power Derating PD% 120 BUJ303B VBEsat (V) 1.4 110 100 1.2 90 80 1.0 70 0.8 60 50 0.6 40 0.4 30 20 0.2 10 0 0 0 20 40 60 80 100 Tmb / C 120 140 0.1 1.0 10.0 IC (A) Fig.10. Base-Emitter saturation voltage. Solid lines = typ values, VBEsat = f(IC); at IC/IB =4. Fig.7. Normalised power dissipation. PD% = 100⋅PD/PD 25˚C = f (Tmb) 100 0.5 VCEsat (V) hFE 0.4 VCE = 5 V 0.3 10 VCE = 1 V 0.2 0.1 1 0.01 0 0.1 1 IC (A) 10 Fig.11. Collector-Emitter saturation voltage. Solid lines = typ values, VCEsat = f(IC); at IC/IB =4. 2 10 IC = 1 A 2 A 3 A 10.0 IC (A) Fig.8. Typical DC current gain. hFE = f(IC) parameter VCE VCEsat (V) 1.0 0.1 Zth / (K/W) 4A 1 D= 0.5 1 0.1 0.2 0.1 0.05 0.02 0 PD tp D= T 0 0.01 0.1 1 IB (A) 0.01 1E-06 10 Fig.9. Collector-Emitter saturation voltage. Solid lines = typ values, VCEsat = f(IB); Tj = 25˚C. March 2002 1E-04 1E-02 t/s tp T t 1E+00 Fig.12. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T 4 Rev 1.000 NXP Semiconductors Product specification Silicon Diffused Power Transistor BUJ303B 102 VCC IC (A) Duty cycle = 0.01 LC ICM max IC max PROBE POINT IBon tp= 10 VCL(RBSOAR) LB 10us II T.U.T. -VBB (1) 100us 1 Fig.13. Test Circuit for reverse bias safe operating area. Vcl ≤ 1000V; Vcc = 150V; VBB = -5V; LB = 1µH; Lc = 200µH (2) 1ms I 10-1 III 10ms DC 12 IC 10-2 (A) 10 8 1 10 102 103 VCE (V) Fig.15. Forward bias safe operating area. Ths ≤ 25 ˚C 6 (1) (2) I II III 4 2 0 0 200 400 600 800 1200 1000 VCLAMP (V) NB: Fig.14. Reverse bias safe operating area Tj ≤ Tjmax March 2002 5 Ptot max and Ptot peak max lines. Second breakdown limits. Region of permissible DC operation. Extension for repetitive pulse operation. Extension during turn-on in single transistor converters provided that RBE ≤ 100 Ω and tp ≤ 0.6 µs. Mounted with heatsink compound and 30 ± 5 newton force on the centre of the envelope. Rev 1.000 NXP Semiconductors Product specification Silicon Diffused Power Transistor BUJ303B MECHANICAL DATA Dimensions in mm 4,5 max Net Mass: 2 g 10,3 max 1,3 3,7 2,8 5,9 min 15,8 max 3,0 max not tinned 3,0 13,5 min 1,3 max 1 2 3 (2x) 0,9 max (3x) 2,54 2,54 0,6 2,4 Fig.16. TO220AB; pin 2 connected to mounting base. Notes 1. Refer to mounting instructions for TO220 envelopes. 2. Epoxy meets UL94 V0 at 1/8". March 2002 6 Rev 1.000 NXP Semiconductors Legal information DATA SHEET STATUS DOCUMENT STATUS(1) PRODUCT STATUS(2) DEFINITION Objective data sheet Development This document contains data from the objective specification for product development. Preliminary data sheet Qualification This document contains data from the preliminary specification. Product data sheet Production This document contains the product specification. Notes 1. Please consult the most recently issued document before initiating or completing a design. 2. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 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