BUK7510-55AL

BUK7510-55AL N-channel TrenchMOS standard level FET Rev. 03 — 4 August 2009 Product data sheet 1. Product profile 1.1 General description Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits Q101 compliant Suitable for thermally demanding environments due to 175 °C rating Suitable for use in control systems due to stable operation in linear mode 1.3 Applications 12 V and 24 V loads Automotive systems DC motor control Repetitive clamped inductive switching 1.4 Quick reference data Table 1. VDS ID Ptot Quick reference Conditions VGS = 10 V; Tmb = 25 °C; see Figure 1; see Figure 3 Tmb = 25 °C; see Figure 2 [1] Min Typ Max 55 75 300 Unit V A W drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C drain current total power dissipation Symbol Parameter Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy Dynamic characteristics QGD gate-drain charge VGS = 10 V; ID = 25 A; VDS = 44 V; Tj = 25 °C; see Figure 15 VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 12; see Figure 13 50 nC ID = 75 A; Vsup ≤ 55 V; RGS = 50 Ω; VGS = 10 V; Tj(init) = 25 °C; unclamped 1.1 J Static characteristics RDSon drain-source on-state resistance 8.5 10 mΩ [1] Continuous current is limited by package. NXP Semiconductors BUK7510-55AL N-channel TrenchMOS standard level FET 2. Pinning information Table 2. Pin 1 2 3 mb Pinning information Symbol G D S D Description gate drain source mounting base; connected to drain mb D Simplified outline Graphic symbol G mbb076 S 123 SOT78 (TO-220AB; SC-46) 3. Ordering information Table 3. Ordering information Package Name BUK7510-55AL TO-220AB; SC-46 Description Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB Version SOT78 Type number BUK7510-55AL_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 4 August 2009 2 of 13 NXP Semiconductors BUK7510-55AL N-channel TrenchMOS standard level FET 4. Limiting values Table 4. Symbol VDS VDGR VGS ID Limiting values Parameter drain-source voltage drain-gate voltage gate-source voltage drain current Tmb = 25 °C; VGS = 10 V; see Figure 1; see Figure 3 Tmb = 25 °C; VGS = 10 V; see Figure 1; see Figure 3 Tmb = 100 °C; VGS = 10 V; see Figure 1 IDM Ptot Tstg Tj IS ISM EDS(AL)S peak drain current total power dissipation storage temperature junction temperature source current peak source current Tmb = 25 °C; Tmb = 25 °C; tp ≤ 10 µs; pulsed; Tmb = 25 °C Avalanche ruggedness non-repetitive ID = 75 A; Vsup ≤ 55 V; RGS = 50 Ω; VGS = 10 V; drain-source avalanche Tj(init) = 25 °C; unclamped energy repetitive drain-source avalanche energy see Figure 4 [4][5] [6] 1.1 J [1][2] [3] Tmb = 25 °C; tp ≤ 10 µs; pulsed; see Figure 3 Tmb = 25 °C; see Figure 2 [1][2] [3] [3] Conditions Tj ≥ 25 °C; Tj ≤ 175 °C RGS = 20 kΩ Min -20 -55 -55 Max 55 55 20 122 75 75 490 300 175 175 122 75 490 Unit V V V A A A A W °C °C A A A In accordance with the Absolute Maximum Rating System (IEC 60134). Source-drain diode EDS(AL)R - - J [1] [2] [3] [4] [5] [6] Current is limited by power dissipation chip rating. Refer to document 9397 750 12572 for further information. Continuous current is limited by package. Single-shot avalanche rating limited by maximum junction temperature of 175 °C. Repetitive avalanche rating limited by average junction temperature of 170 °C. Refer to AN10273 for further information. BUK7510-55AL_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 4 August 2009 3 of 13 NXP Semiconductors BUK7510-55AL N-channel TrenchMOS standard level FET 150 ID (A) 100 (1) 003aaa726 120 Pder (%) 80 03aa16 50 40 0 0 50 100 150 Tmb (°C) 200 0 0 50 100 150 Tmb (°C) 200 Fig 1. Continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature 003aaa737 103 ID (A) 102 (1) Limit RDSon = VDS / ID tp = 10 μ s 100 μ s 1 ms DC 10 10 ms 100 ms 1 1 10 VDS (V) 102 Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage BUK7510-55AL_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 4 August 2009 4 of 13 NXP Semiconductors BUK7510-55AL N-channel TrenchMOS standard level FET 102 IAV (A) 003aaa739 (1) Tj = 25 ˚C (2) 10 (3) 150 ˚C 1 10-1 10-2 10-1 1 tAV (ms) 10 Fig 4. Single-shot and repetitive avalanche rating; avalanche current as a function of avalanche period 5. Thermal characteristics Table 5. Symbol Rth(j-a) Rth(j-mb) Thermal characteristics Parameter Conditions Min Typ 60 0.25 Max 0.5 Unit K/W K/W thermal resistance from vertical in still air junction to ambient thermal resistance from see Figure 5 junction to mounting base 1 Zth(j-mb) (K/W) δ = 0.5 003aaa734 10-1 0.2 0.1 0.05 0.02 tp T 10 -2 P δ= single shot 10-3 10-6 10-5 10-4 10-3 10-2 10-1 tp T t tp (s) 1 Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration BUK7510-55AL_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 4 August 2009 5 of 13 NXP Semiconductors BUK7510-55AL N-channel TrenchMOS standard level FET 6. Characteristics Table 6. Symbol V(BR)DSS VGS(th) Characteristics Parameter drain-source breakdown voltage gate-source threshold voltage Conditions ID = 250 µA; VGS = 0 V; Tj = -55 °C ID = 250 µA; VGS = 0 V; Tj = 25 °C ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 10; see Figure 11 ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 10; see Figure 11 ID = 1 mA; VDS = VGS; Tj = 175 °C; see Figure 10; see Figure 11 IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance VDS = 55 V; VGS = 0 V; Tj = 175 °C VDS = 55 V; VGS = 0 V; Tj = 25 °C VDS = 0 V; VGS = +20 V; Tj = 25 °C VDS = 0 V; VGS = -20 V; Tj = 25 °C VGS = 10 V; ID = 25 A; Tj = 175 °C; see Figure 12; see Figure 13 VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 12; see Figure 13 Dynamic characteristics QG(tot) QGS QGD VGS(pl) Ciss Coss Crss td(on) tr td(off) tf LD total gate charge gate-source charge gate-drain charge gate-source plateau voltage input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time internal drain inductance from contact screw on package to centre of die; Tj = 25 °C from drain lead 6mm from package to centre of die; Tj = 25 °C LS internal source inductance source-drain voltage reverse recovery time recovered charge from source lead to source bond pad; Tj = 25 °C IS = 25 A; VGS = 0 V; Tj = 25 °C; see Figure 14 IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 30 V; Tj = 25 °C VDS = 30 V; RL = 1.2 Ω; VGS = 10 V; RG(ext) = 10 Ω; Tj = 25 °C ID = 25 A; VDS = 44 V; Tj = 25 °C; see Figure 15 VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 °C; see Figure 16 ID = 25 A; VDS = 44 V; VGS = 10 V; Tj = 25 °C; see Figure 15 124 22 50 5 4710 980 560 33 117 132 95 3.5 4.5 7.5 6280 1180 770 nC nC nC V pF pF pF ns ns ns ns nH H nH Min 50 55 2 1 Typ 3 0.05 2 2 8.5 Max 4 4.4 500 10 100 100 20 10 Unit V V V V V µA µA nA nA mΩ mΩ Static characteristics Source-drain diode VSD trr Qr BUK7510-55AL_3 - 0.85 73 430 1.2 - V ns nC © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 4 August 2009 6 of 13 NXP Semiconductors BUK7510-55AL N-channel TrenchMOS standard level FET 400 ID (A) 300 003aaa729 20 RDSon (mΩ) 15 7 8 9 10 003aaa731 20 18 16 14 12 200 100 0 0 2 4 VGS (V) = 10 9.5 9 8.5 8 7.5 7 6.5 6 5.5 5 4.5 6 8 VDS (V) 10 10 VGS (V) = 20 5 0 0 100 200 300 ID (A) 400 Fig 6. Output characteristics: drain current as a function of drain-source voltage; typical values 40 003aaa732 Fig 7. Drain-source on-state resistance as a function of drain current; typical values 003aaa733 150 ID (A) 100 gfs (S) 35 30 50 25 Tj = 175 °C 20 0 20 40 60 ID (A) 80 0 0 2 4 6 8 10 VGS (V) Tj = 25 °C Fig 8. Forward transconductance as a function of drain current; typical values Fig 9. Transfer characteristics: drain current as a function of gate-source voltage; typical values BUK7510-55AL_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 4 August 2009 7 of 13 NXP Semiconductors BUK7510-55AL N-channel TrenchMOS standard level FET 5 VGS(th) (V) 4 max 03aa32 10−1 ID (A) 10−2 min typ max 03aa35 3 typ 10−3 2 min 10−4 1 10−5 0 −60 10−6 0 60 120 Tj (°C) 180 0 2 4 VGS (V) 6 Fig 10. Gate-source threshold voltage as a function of junction temperature 18 RDSon (mΩ) 14 003aaa730 Fig 11. Sub-threshold drain current as a function of gate-source voltage 2 a 1.5 03ne89 1 10 0.5 6 5 10 15 VGS (V) 20 0 -60 0 60 120 Tj (°C) 180 Fig 12. Drain-source on-state resistance as a function of gate-source voltage; typical values Fig 13. Normalized drain-source on-state resistance factor as a function of junction temperature BUK7510-55AL_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 4 August 2009 8 of 13 NXP Semiconductors BUK7510-55AL N-channel TrenchMOS standard level FET 150 IS (A) 100 003aaa736 10 VGS (V) 8 VDS = 14 V 6 003aaa735 VDS = 44 V Tj = 25 °C 50 Tj = 175 °C 4 2 0 0.0 0 0.3 0.6 0.9 VSD (V) 1.2 0 50 100 QG (nC) 150 Fig 14. Source current as a function of source-drain voltage; typical values 8000 C (pF) 6000 Fig 15. Gate-source voltage as a function of gate charge; typical values 003aaa738 Ciss 4000 Coss C 2000 rss 0 10-1 1 10 VDS (V) 102 Fig 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values BUK7510-55AL_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 4 August 2009 9 of 13 NXP Semiconductors BUK7510-55AL N-channel TrenchMOS standard level FET 7. Package outline Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78 E p A A1 q D1 mounting base D L1(1) L2(1) Q L b1(2) (3×) b2(2) (2×) 1 2 3 b(3×) e e c 0 5 scale 10 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 4.7 4.1 A1 1.40 1.25 b 0.9 0.6 b1(2) 1.6 1.0 b2(2) 1.3 1.0 c 0.7 0.4 D 16.0 15.2 D1 6.6 5.9 E 10.3 9.7 e 2.54 L 15.0 12.8 L1(1) 3.30 2.79 L2(1) max. 3.0 p 3.8 3.5 q 3.0 2.7 Q 2.6 2.2 Notes 1. Lead shoulder designs may vary. 2. Dimension includes excess dambar. OUTLINE VERSION SOT78 REFERENCES IEC JEDEC 3-lead TO-220AB JEITA SC-46 EUROPEAN PROJECTION ISSUE DATE 08-04-23 08-06-13 Fig 17. Package outline SOT78 (TO-220AB) BUK7510-55AL_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 4 August 2009 10 of 13 NXP Semiconductors BUK7510-55AL N-channel TrenchMOS standard level FET 8. Revision history Table 7. Revision history Release date 20090804 Data sheet status Product data sheet Product data sheet Product data sheet Change notice Supersedes BUK7510-55AL_2 BUK75_7610_55AL_1 Document ID BUK7510-55AL_3 Modifications: BUK7510-55AL_2 BUK75_7610_55AL_1 • Package outline updated. 20080103 20050331 BUK7510-55AL_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 4 August 2009 11 of 13 NXP Semiconductors BUK7510-55AL N-channel TrenchMOS standard level FET 9. Legal information 9.1 Data sheet status Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Document status [1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 9.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — is a trademark of NXP B.V. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com BUK7510-55AL_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 4 August 2009 12 of 13 NXP Semiconductors BUK7510-55AL N-channel TrenchMOS standard level FET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Contact information. . . . . . . . . . . . . . . . . . . . . .12 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 4 August 2009 Document identifier: BUK7510-55AL_3