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BUT12AI,127

BUT12AI,127

  • 厂商:

    NXP(恩智浦)

  • 封装:

    SOT78

  • 描述:

    TRANS NPN 450V 8A TO220AB

  • 数据手册
  • 价格&库存
BUT12AI,127 数据手册
Philips Semiconductors Product specification Silicon Diffused Power Transistor BUT12AI GENERAL DESCRIPTION Improved high-voltage, high-speed glass-passivated npn power transistor in a TO220AB envelope specially suited for use in overhead/high frequency lighting ballast applications and converters, inverters, switching regulators, motor control systems, etc. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS VCESM VCEO IC ICM Ptot VCEsat ICsat tf Collector-emitter voltage peak value Collector-emitter voltage (open base) Collector current (DC) Collector current peak value Total power dissipation Collector-emitter saturation voltage Collector saturation current Inductive fall time VBE = 0 V PINNING - TO220AB PIN 1 base 2 collector 3 emitter tab MAX. UNIT 5 1000 450 8 20 110 1.5 300 V V A A W V A ns Ths ≤ 25 ˚C IC = 5 A; IB = 0.86A ICon = 5 A; IBon = 1.0 A;Tj ≤ 100˚C PIN CONFIGURATION DESCRIPTION TYP. SYMBOL c tab b collector e 1 23 LIMITING VALUES Limiting values in accordance with the Absolute Maximum Rating System (IEC 134) SYMBOL PARAMETER CONDITIONS VCESM VCEO IC ICM IB IBM Ptot Tstg Tj Collector-emitter voltage peak value Collector-emitter voltage (open base) Collector current (DC) Collector current peak value Base current (DC) Base current peak value Total power dissipation Storage temperature Junction temperature VBE = 0 V Ths ≤ 25 ˚C MIN. MAX. UNIT -65 - 1000 450 8 20 4 6 110 150 150 V V A A A A W ˚C ˚C TYP. MAX. UNIT THERMAL RESISTANCES SYMBOL PARAMETER CONDITIONS Rth j-hs Junction to heatsink with heatsink compound - 1.15 K/W Rth j-a Junction to ambient in free air - 60 K/W June 1997 1 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor BUT12AI STATIC CHARACTERISTICS Ths = 25 ˚C unless otherwise specified SYMBOL ICES ICES PARAMETER Collector cut-off current IEBO VCEOsust VCEsat VBEsat hFE hFE hFEsat CONDITIONS MIN. TYP. MAX. UNIT - - 1.0 3.0 mA mA 450 - 10 - mA V 10 14 5.8 18 20 10 1.5 1.3 35 35 12.5 V V TYP. MAX. UNIT - 1.0 4.0 0.8 µs µs µs 1.9 150 2.5 300 µs ns 1 VBE = 0 V; VCE = VCESMmax VBE = 0 V; VCE = VCESMmax; Tj = 125 ˚C Emitter cut-off current VEB = 9 V; IC = 0 A Collector-emitter sustaining voltage IB = 0 A; IC = 100 mA; L = 25 mH Collector-emitter saturation voltages IC = 5 A; IB = 0.86 A Base-emitter saturation voltage IC = 5 A; IB = 0.86 A DC current gain IC = 10mA; VCE = 5 V IC = 1.0A; VCE = 5 V IC = 5.0A; VCE = 1.5 V DYNAMIC CHARACTERISTICS Ths = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS ton ts tf Switching times (resistive load) Turn-on time Turn-off storage time Turn-off fall time ICon =5 A; IBon = -IBoff = 1.0 A Switching times (inductive load) ICon = 5 A; IBon = 1.0 A; LB = 1 µH; -VBB = 5 V; Tj = 100 ˚C ts tf Turn-off storage time Turn-off fall time IC / mA + 50v 100-200R 250 Horizontal 200 Oscilloscope Vertical 300R 30-60 Hz 100 1R 0 6V VCE / V min VCEOsust Fig.1. Test circuit for VCEOsust. Fig.2. Oscilloscope display for VCEOsust. 1 Measured with half sine-wave voltage (curve tracer). June 1997 2 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor BUT12AI VCC ICon 90 % IC RL VIM 10 % RB 0 T.U.T. tf ts toff tp t IBon IB T t -IBoff Fig.6. Switching times waveforms with inductive load. Fig.3. Test circuit resistive load. VIM = -6 to +8 V VCC = 250 V; tp = 20 µs; δ = tp / T = 0.01. RB and RL calculated from ICon and IBon requirements. ICon 90 % VCC 90 % IC 10 % ts ton LC tf toff VCL IBend IBon IB LB 10 % tr 30ns CFB T.U.T. -VBB -IBoff Fig.7. Test circuit RBSOA. VCC = 150 V; -VBB = 5 V LC = 200 µH; VCL ≤ 850 V; LB = 1 µH Fig.4. Switching times waveforms with resistive load. VCC 120 Normalised Power Derating PD% 110 100 90 80 LC 70 60 50 IBon 40 LB 30 T.U.T. 20 10 -VBB 0 0 Fig.5. Test circuit inductive load. VCC = 300 V; -VBE = 5 V;LB = 1 uH June 1997 20 40 60 80 100 Tmb / C 120 140 Fig.8. Normalised power dissipation. PD% = 100⋅PD/PD 25˚C = f (Tmb) 3 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor BUT12AI VBEsat / V VBEsat / V 1.2 1.2 Tj = 25 C Tj = 125 C 1.1 Tj = 25 C Tj = 125 C 1.1 1 1 0.9 0.8 0.9 0.7 IC/IB= 8 10 12 0.6 0.5 IC = 6A 3A 2A 0.8 0.7 0.6 0.4 0 0.1 1 10 IC / A Fig.9. Typical base-emitter saturation voltage. VBEsat = f(IC); parameter IC/IB 0.4 0.8 1.2 1.6 2 2.4 IB / A Fig.11. Typical base-emitter saturation voltage. VBEsat = f(IB); parameter IC VCEsat / V 10 Tj = 25 C Tj = 125 C VCEsat / V 1 6A 0.9 IC/IB= 12 10 8 0.8 0.7 0.6 1 4A 5 0.5 0.4 IC=2A Tj = 25 C Tj = 125 C 0.3 0.2 0.1 0 0.1 0.1 1 IC / A 1 10 IB / A Fig.12. Typical collector-emitter saturation voltage. VCEsat = f(IB); parameter IC 10 Fig.10. Typical collector-emitter saturation voltage. VCEsat = f(IC); parameter IC/IB June 1997 4 0.1 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor BUT12AI h FE IC / A 100 100 ICMmax 5V 10 1V 10 ICmax II 1 Tj = 25 C Tj = 125 C 1 0.01 I 0.1 0.1 10 1 IC / A Fig.15. Typical DC current gain. hFE = f(IC) parameter VCE DC 0.01 1 10 100 1000 VCE / V Fig.13. Forward bias safe operating area. Tmb = 25˚C I II NB: Region of permissible DC operation. Extension for repetitive pulse operation. Mounted with heatsink compound and 30 ± 5 newton force on the centre of the envelope. 1E+01 Zth / (K/W) BUX100 IC / A 8 7 1E+00 6 0.5 5 0.2 0.1 4 2 0.05 0.02 1 D=0 0 PD 1E-01 3 tp D= T tp T t 1E-02 0 200 400 600 800 1E-05 1000 VCE / V Fig.14. Reverse bias safe operating area. Tj ≤ Tj max June 1997 1E-03 t/s 1E-01 1E+01 Fig.16. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T 5 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor BUT12AI MECHANICAL DATA Dimensions in mm 4,5 max Net Mass: 2 g 10,3 max 1,3 3,7 2,8 5,9 min 15,8 max 3,0 max not tinned 3,0 13,5 min 1,3 max 1 2 3 (2x) 0,9 max (3x) 2,54 2,54 0,6 2,4 Fig.17. TO220AB; pin 2 connected to mounting base. Notes 1. Refer to mounting instructions for TO220 envelopes. 2. Epoxy meets UL94 V0 at 1/8". June 1997 6 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor BUT12AI DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification.  Philips Electronics N.V. 1997 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. June 1997 7 Rev 1.000
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