CBT3306D-Q100J

Important notice Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/, use http://www.nexperia.com Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: - © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia CBT3306-Q100 Dual bus switch Rev. 1 — 4 April 2013 Product data sheet 1. General description The CBT3306-Q100 dual FET bus switch features independent line switches. Each switch is disabled when the associated output enable (nOE) input is HIGH. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 3) and is suitable for use in automotive applications. 2. Features and benefits  Automotive product qualification in accordance with AEC-Q100 (Grade 3)  Specified from 40 C to +85 C  5  switch connection between two ports  TTL-compatible input levels  Multiple package options  Latch-up protection exceeds 100 mA per JESD78B  ESD protection:  MIL-STD-883, method 3015 exceeds 2000 V  HBM JESD22-A114F exceeds 2000 V 3. Ordering information Table 1. Ordering information Type number Package Name Description Version CBT3306D-Q100 SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 CBT3306PW-Q100 TSSOP8 plastic thin shrink small outline package; 8 leads; body width 4.4 mm SOT530-1 CBT3306-Q100 NXP Semiconductors Dual bus switch 4. Functional diagram 1A 1OE 2A 2OE 3 2 1B 1 6 5 2B 7 002aab985 Fig 1. Logic diagram 5. Pinning information 5.1 Pinning &%74 2(   9&& $   2( %   % *1'   $ &%74 2(   9&& $   2( %   % *1'   $ DDD Fig 2. DDD Pin configuration for SO8 (SOT96-1) Fig 3. Pin configuration for TSSOP8 (SOT530-1) 5.2 Pin description Table 2. Pin description Symbol Pin Description 1OE, 2OE 1, 7 output enable input 1A, 2A 2, 5 data input/output (A port) 1B, 2B 3, 6 data input/output (B port) GND 4 ground (0 V) VCC 8 positive supply voltage 6. Functional description Table 3. Function selection[1] Input Input/output nOE nA, nB L nA = nB H Z [1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. CBT3306_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2013 © NXP B.V. 2013. All rights reserved. 2 of 12 CBT3306-Q100 NXP Semiconductors Dual bus switch 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).[1] Tamb = 40 C to +85 C, unless otherwise specified. Symbol Parameter VCC supply voltage VI input voltage IO output current IIK input clamping current Tstg storage temperature Conditions [2] VI/O = 0 V Min Max Unit 0.5 +7.0 V 0.5 +7.0 V - 128 mA 50 - mA 65 +150 C [1] Stresses beyond the listed limits may damage the device permanently. These ratings are stress ratings only and functional operation of the device at or beyond the conditions indicated under Section 8. is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. [2] The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 8. Recommended operating conditions Table 5. Operating conditions All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Symbol Parameter VCC VIH Min Typ Max Unit supply voltage 4.5 - 5.5 V HIGH-level input voltage 2.0 - - V VIL LOW-level input voltage - - 0.8 V Tamb ambient temperature 40 - +85 C CBT3306_Q100 Product data sheet Conditions operating in free air All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2013 © NXP B.V. 2013. All rights reserved. 3 of 12 CBT3306-Q100 NXP Semiconductors Dual bus switch 9. Static characteristics Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 40 C to +85 C Conditions Min Typ[1] Max Unit VIK input clamping voltage VCC = 4.5 V; II = 18 mA - - 1.2 V II input leakage current VCC = 5.5 V; VI = GND or 5.5 V - - 1 A ICC supply current VCC = 5.5 V; IO = 0 mA; VI = VCC or GND - - 3 A Vpass pass voltage output HIGH; VI = VCC = 5.0 V; IO = 100 A 3.6 3.9 4.2 V ICC additional supply current per input pin; VCC = 5.5 V; one input at 3.4 V, other inputs at VCC or GND - - 2.5 mA CI input capacitance control pin; VI = 3 V or 0 V - 3.15 - pF Cio(off) off-state input/output capacitance port off; VI = 3 V or 0 V; nOE = VCC - 6.45 - pF RON ON resistance VCC = 4.5 V; VI = 0 V; II = 64 mA [3] - 3.4 5  VCC = 4.5 V; VI = 0 V; II = 30 mA [3] - 3.4 5  VCC = 4.5 V; VI = 2.4 V; II = 15 mA [3] - 6.8 15  [1] [2] All typical values are at VCC = 5 V, Tamb = 25 C. [2] This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. [3] Measured by the voltage drop between the nA and the nB terminals at the indicated current through the switch. ON resistance is determined by the lowest voltage of the two (nA, nB) terminals. 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 6. Symbol Parameter Tamb = 40 C to +85 C Conditions tpd propagation delay nA, nB to nB, nA; see Figure 4 ten enable time nOE to nA, nB; see Figure 5 Unit Min Typ Max - - 0.25 ns [2] 1.0 - 5.0 ns [2] 1.0 - 5.0 ns [1][2] VCC = 5.0 V  0.5 V VCC = 5.0 V  0.5 V disable time tdis nOE to nA, nB; see Figure 5 VCC = 5.0 V  0.5 V [1] The propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). [2] tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. CBT3306_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2013 © NXP B.V. 2013. All rights reserved. 4 of 12 CBT3306-Q100 NXP Semiconductors Dual bus switch 11. Waveforms VI nA, nB input VM GND tPHL tPLH VOH nB, nA output VM VOL 001aak305 Measurement points are given in Table 8. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 4. The data input (nA, nB) to output (nB, nA) propagation delay times VI VM nOE input VM GND tPZL tPLZ 3.5 V output LOW to OFF OFF to LOW VM VX VOL tPZH tPHZ VOH VY output HIGH to OFF OFF to HIGH VM GND outputs enabled outputs disabled outputs enabled 001aak298 Measurement points are given in Table 8. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 5. Table 8. Enable and disable times Measurement points Supply voltage Input Output VCC VI VM VM VX VY VCC = 5.0 V  0.5 V GND to 3.0 V 1.5 V 1.5 V VOL + 0.3 V VOH  0.3 V CBT3306_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2013 © NXP B.V. 2013. All rights reserved. 5 of 12 CBT3306-Q100 NXP Semiconductors Dual bus switch 12. Test information VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VEXT VCC VI RL VO G DUT RT RL CL 001aae331 Test data is given in Table 9. All input pulses are supplied by generators having the following characteristics: PRR  10 MHz; Zo = 50 . The outputs are measured one at a time with one transition per measurement. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 6. Table 9. Test circuit for measuring switching times Test data Supply voltage Input VI VCC = 5.0 V  0.5 V CBT3306_Q100 Product data sheet Load tr, tf GND to 3.0 V  2.5 ns VEXT CL RL tPLH, tPHL tPLZ, tPZL tPHZ, tPZH 50 pF 500  open 7.0 V open All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2013 © NXP B.V. 2013. All rights reserved. 6 of 12 CBT3306-Q100 NXP Semiconductors Dual bus switch 13. Package outline SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 D E A X c y HE v M A Z 5 8 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 5.0 4.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 inches 0.069 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.014 0.0075 0.20 0.19 0.16 0.15 0.05 0.01 0.01 0.004 0.028 0.012 0.244 0.039 0.028 0.041 0.228 0.016 0.024 θ 8o o 0 Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. Fig 7. REFERENCES OUTLINE VERSION IEC JEDEC SOT96-1 076E03 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 Package outline SOT96-1 (SO8) CBT3306_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2013 © NXP B.V. 2013. All rights reserved. 7 of 12 CBT3306-Q100 NXP Semiconductors Dual bus switch TSSOP8: plastic thin shrink small outline package; 8 leads; body width 4.4 mm SOT530-1 E A D X c y HE v M A Z 8 5 A2 A (A3) A1 pin 1 index θ Lp L detail X 1 4 e w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(2) e HE L Lp v w y Z(1) θ mm 1.1 0.15 0.05 0.95 0.85 0.25 0.30 0.19 0.20 0.13 3.1 2.9 4.5 4.3 0.65 6.5 6.3 0.94 0.7 0.5 0.1 0.1 0.1 0.70 0.35 8° 0° Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT530-1 Fig 8. REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 00-02-24 03-02-18 MO-153 Package outline SOT530-1 (TSSOP8) CBT3306_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2013 © NXP B.V. 2013. All rights reserved. 8 of 12 CBT3306-Q100 NXP Semiconductors Dual bus switch 14. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model ESD ElectroStatic Discharge FET Field Effect Transistor HBM Human Body Model MIL Military PRR Pulse Rate Repetition TTL Transistor-Transistor Logic 15. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes CBT3306_Q100 v.1 20130404 Product data sheet - - CBT3306_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2013 © NXP B.V. 2013. All rights reserved. 9 of 12 CBT3306-Q100 NXP Semiconductors Dual bus switch 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 16.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. CBT3306_Q100 Product data sheet Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2013 © NXP B.V. 2013. All rights reserved. 10 of 12 CBT3306-Q100 NXP Semiconductors Dual bus switch No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com CBT3306_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2013 © NXP B.V. 2013. All rights reserved. 11 of 12 CBT3306-Q100 NXP Semiconductors Dual bus switch 18. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional description . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 3 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 9 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Contact information. . . . . . . . . . . . . . . . . . . . . 11 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2013. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 4 April 2013 Document identifier: CBT3306_Q100