CBT3384
10-bit bus switch with 5-bit output enables
Rev. 06 — 2 November 2009
Product data sheet
1. General description
The CBT3384 provides ten bits of high-speed TTL-compatible bus switching. The low
ON resistance of the switch allows connections to be made with minimal propagation
delay.
The CBT3384 device is organized as two 5-bit bus switches with two separate output
enable (1OE, 2OE) inputs. When nOE is LOW, the switch is on and port A is connected to
the B port. When nOE is HIGH, each switch is disabled.
The CBT3384 is characterized for operation from −40 °C to +85 °C.
2. Features
n
n
n
n
n
n
5 Ω switch connection between two ports
TTL-compatible control input levels
Multiple package options
See CBTD3384 for CBT3384 with level shifting diodes
Latch-up protection exceeds 100 mA per JESD78
ESD protection:
u HBM JESD22-A114E exceeds 2000 V
u CDM JESD22-C101C exceeds 1000 V
3. Ordering information
Table 1.
Ordering information
Type
number
Package
Temperature range Name
Description
Version
CBT3384D
−40 °C to +85 °C
SO24
plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
CBT3384DB −40 °C to +85 °C
SSOP24
plastic shrink small outline package; 24 leads;
body width 5.3 mm
SOT340-1
CBT3384DK −40 °C to +85 °C
SSOP24[1] plastic shrink small outline package; 24 leads; body
width 3.9 mm; lead pitch 0.635 mm
SOT556-1
CBT3384PW −40 °C to +85 °C
TSSOP24
SOT355-1
[1]
Also known as QSOP24 package
plastic thin shrink small outline package; 24 leads;
body width 4.4 mm
CBT3384
NXP Semiconductors
10-bit bus switch with 5-bit output enables
4. Functional diagram
1A1
1A5
1OE
2A1
2A5
2OE
Fig 1.
3
2
11
10
1B1
1B5
1
14
15
22
23
2B1
2B5
13
001aak877
Logic diagram
5. Pinning information
5.1 Pinning
CBT3384
CBT3384
1OE
1
24 VCC
1OE
1
24 VCC
1B1
2
23 2B5
1B1
2
23 2B5
1A1
3
22 2A5
1A1
3
22 2A5
1A2
4
21 2A4
1A2
4
21 2A4
1B2
5
20 2B4
1B2
5
20 2B4
1B3
6
19 2B3
1B3
6
19 2B3
1A3
7
18 2A3
1A3
7
18 2A3
1A4
8
17 2A2
1A4
8
17 2A2
1B4
9
16 2B2
1B4
9
16 2B2
1B5 10
15 2B1
1B5 10
15 2B1
1A5 11
14 2A1
1A5 11
14 2A1
GND 12
13 2OE
GND 12
13 2OE
001aak878
Fig 2.
001aak879
Pin configuration for SO24 (SOT137-1)
Fig 3.
Pin configuration for SSOP24 (SOT340-1) and
TSSOP24 (SOT355-1)
CBT3384_6
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 06 — 2 November 2009
2 of 14
CBT3384
NXP Semiconductors
10-bit bus switch with 5-bit output enables
CBT3384
1OE
1
24 VCC
1B1
2
23 2B5
1A1
3
22 2A5
1A2
4
21 2A4
1B2
5
20 2B4
1B3
6
19 2B3
1A3
7
18 2A3
1A4
8
17 2A2
1B4
9
16 2B2
1B5 10
15 2B1
1A5 11
14 2A1
GND 12
13 2OE
001aak880
Fig 4.
Pin configuration for SSOP24 (SOT556-1)
5.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
1OE, 2OE
1, 13
output enable input (active LOW)
1A1 to 1A5
3, 4, 7, 8, 11
data input/output (A port)
2A1 to 2A5
14, 17, 18, 21, 22
data input/output (A port)
1B1 to 1B5
2, 5, 6, 9, 10
data input/output (B port)
2B1 to 2B5
15, 16, 19, 20, 23
data input/output (B port)
GND
12
ground (0 V)
VCC
24
positive supply voltage
6. Functional description
Table 3.
Function selection[1]
Input
Input/output
1OE
2OE
1An, 1Bn
2An, 2Bn
L
L
1An = 1Bn
2An = 2Bn
L
H
1An = 1Bn
Z
H
L
Z
2An = 2Bn
H
H
Z
Z
[1]
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
CBT3384_6
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 06 — 2 November 2009
3 of 14
CBT3384
NXP Semiconductors
10-bit bus switch with 5-bit output enables
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Tamb = −40 °C to +85 °C, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Max
Unit
−0.5
+7.0
V
−0.5
+7.0
V
VCC
supply voltage
VI
input voltage
IO
output current
VO < 0 V
-
±128
mA
IIK
input clamping current
VI/O = 0 V
−50
-
mA
Tstg
storage temperature
−65
+150
°C
[2]
[1]
Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under Section 8. is not implied. Exposure to absolute-maximum-rated
conditions for extended periods may affect device reliability.
[2]
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
8. Recommended operating conditions
Table 5.
Operating conditions
All unused control inputs of the device must be held at VCC or GND to ensure proper device operation.
Symbol
Parameter
VCC
VIH
Conditions
Min
Typ
Max
Unit
supply voltage
4.5
-
5.5
V
HIGH-state input voltage
2.0
-
-
V
VIL
LOW-state input voltage
-
-
0.8
V
Tamb
ambient temperature
−40
-
+85
°C
operating in free air
9. Static characteristics
Table 6.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Tamb = −40 °C to +85 °C
Conditions
Min
Typ[1]
Max
Unit
VIK
input clamping voltage
VCC = 4.5 V; II = −18 mA
-
-
−1.2
V
II
input leakage current
VCC = 5.5 V; VI = GND or 5.5 V
-
-
±1
µA
ICC
supply current
VCC = 5.5 V; IO = 0 mA;
VI = VCC or GND
-
-
3
µA
∆ICC
additional supply current
per input pin; VCC = 5.5 V; one input at
3.4 V, other inputs at VCC or GND
-
-
2.5
mA
Vpass
pass voltage
output HIGH; VI = VCC = 5.0 V;
IO = −100 µA
3.6
3.9
4.2
V
CI
input capacitance
control pins; VI = 3 V or 0 V
-
4.0
-
pF
Cio(off)
off-state input/output
capacitance
port off; VI = 3 V or 0 V; nOE = VCC
-
10.0
-
pF
CBT3384_6
Product data sheet
[2]
© NXP B.V. 2009. All rights reserved.
Rev. 06 — 2 November 2009
4 of 14
CBT3384
NXP Semiconductors
10-bit bus switch with 5-bit output enables
Table 6.
Static characteristics …continued
Voltages are referenced to GND (ground = 0 V).
Symbol
RON
Parameter
Tamb = −40 °C to +85 °C
Conditions
ON resistance
Unit
Min
Typ[1]
VCC = 4.5 V; VI = 0 V; II = 64 mA
[3]
-
5
VCC = 4.5 V; VI = 0 V; II = 30 mA
[3]
-
5
7
Ω
VCC = 4.5 V; VI = 2.4 V; II = −15 mA
[3]
-
10
15
Ω
Max
7
Ω
All typical values are at VCC = 5 V, Tamb = 25 °C.
[1]
[2]
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
[3]
Measured by the voltage drop between the nAn and the nBn terminals at the indicated current through the switch. ON resistance is
determined by the lowest voltage of the two (nAn or nBn) terminals.
10. Dynamic characteristics
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.
Symbol Parameter
Tamb = 25 °C
Conditions
tpd
propagation delay
nAn, nBn to nBn, nAn;
see Figure 5
tPZH
OFF-state to HIGH
propagation delay
nOE to nAn or nBn;
see Figure 6
VCC = 5.0 V ± 0.5 V
VCC = 5.0 V ± 0.5 V
OFF-state to LOW
propagation delay
tPZL
HIGH to OFF-state
propagation delay
LOW to OFF-state
propagation delay
Max
Min
Max
-
-
0.25
-
0.25
ns
1.2
2.3
5.7
1.2
5.6
ns
1.2
2.3
5.7
1.2
6.0
ns
1.7
3.6
5.2
1.7
5.5
ns
1.7
2.7
5.2
1.7
6.6
ns
[1][2]
nOE to nAn or nBn;
see Figure 6
VCC = 5.0 V ± 0.5 V
tPLZ
Typ
nOE to nAn or nBn;
see Figure 6
VCC = 5.0 V ± 0.5 V
tPHZ
Tamb = −40 °C to +85 °C Unit
Min
nOE to nAn or nBn;
see Figure 6
VCC = 5.0 V ± 0.5 V
[1]
The propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified load capacitance,
when driven by an ideal voltage source (zero output impedance).
[2]
tpd is the same as tPLH and tPHL.
CBT3384_6
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 06 — 2 November 2009
5 of 14
CBT3384
NXP Semiconductors
10-bit bus switch with 5-bit output enables
11. Waveforms
VI
VM
nAn, nBn input
VM
GND
tPHL
tPLH
VOH
VM
nBn, nAn output
VM
VOL
001aak881
Measurement points are given in Table 8.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 5.
The data input (nAn, nBn) to output (nBn, nAn) propagation delay times
VI
VM
nOE input
VM
GND
tPZL
tPLZ
3.5 V
output
LOW to OFF
OFF to LOW
VM
VX
VOL
tPZH
tPHZ
VOH
VY
output
HIGH to OFF
OFF to HIGH
VM
GND
outputs
enabled
outputs
disabled
outputs
enabled
001aak298
Measurement points are given in Table 8.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 6.
Table 8.
Enable and disable times
Measurement points
Supply voltage
Input
Output
VCC
VI
VM
VM
VX
VY
VCC = 5.0 V ± 0.5 V
GND to 3.0 V
1.5 V
1.5 V
VOL + 0.3 V
VOH − 0.3 V
CBT3384_6
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 06 — 2 November 2009
6 of 14
CBT3384
NXP Semiconductors
10-bit bus switch with 5-bit output enables
12. Test information
VI
tW
90 %
negative
pulse
VM
0V
tf
tr
tr
tf
VI
90 %
positive
pulse
0V
VM
10 %
VM
VM
10 %
tW
VEXT
VCC
VI
RL
VO
G
DUT
RT
CL
RL
001aae331
Test data is given in Table 9.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz; Zo = 50 Ω.
The outputs are measured one at a time with one transition per measurement.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 7.
Table 9.
Test circuit for measuring switching times
Test data
Supply voltage
Input
VI
VCC = 5.0 V ± 0.5 V
Load
tr, tf
GND to 3.0 V ≤ 2.5 ns
VEXT
CL
RL
tPLH, tPHL
tPLZ, tPZL
tPHZ, tPZH
50 pF
500 Ω
open
7.0 V
open
CBT3384_6
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 06 — 2 November 2009
7 of 14
CBT3384
NXP Semiconductors
10-bit bus switch with 5-bit output enables
13. Package outline
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
D
E
A
X
c
HE
y
v M A
Z
24
13
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
1
12
e
detail X
w M
bp
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
mm
2.65
0.3
0.1
2.45
2.25
0.25
0.49
0.36
0.32
0.23
15.6
15.2
7.6
7.4
1.27
10.65
10.00
1.4
1.1
0.4
1.1
1.0
0.25
0.25
0.1
0.01
0.019 0.013
0.014 0.009
0.61
0.60
0.30
0.29
0.05
0.419
0.043
0.055
0.394
0.016
inches
0.1
0.012 0.096
0.004 0.089
0.043
0.039
0.01
0.01
Z
(1)
0.9
0.4
0.035
0.004
0.016
θ
o
8
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT137-1
075E05
MS-013
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 8. Package outline SOT137-1 (SO24)
CBT3384_6
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 06 — 2 November 2009
8 of 14
CBT3384
NXP Semiconductors
10-bit bus switch with 5-bit output enables
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm
D
SOT340-1
E
A
X
c
HE
y
v M A
Z
24
13
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
1
12
bp
e
detail X
w M
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
2
0.21
0.05
1.80
1.65
0.25
0.38
0.25
0.20
0.09
8.4
8.0
5.4
5.2
0.65
7.9
7.6
1.25
1.03
0.63
0.9
0.7
0.2
0.13
0.1
0.8
0.4
8
o
0
o
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
OUTLINE
VERSION
SOT340-1
REFERENCES
IEC
JEDEC
JEITA
MO-150
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 9. Package outline SOT340-1 (SSOP24)
CBT3384_6
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 06 — 2 November 2009
9 of 14
CBT3384
NXP Semiconductors
10-bit bus switch with 5-bit output enables
SSOP24: plastic shrink small outline package; 24 leads; body width 3.9 mm; lead pitch 0.635 mm
D
E
SOT556-1
A
X
c
y
HE
v M A
Z
13
24
A2
A
(A 3)
A1
θ
Lp
L
12
1
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D(1)
E(1)
e
HE
L
Lp
v
w
y
Z(1)
θ
mm
1.73
0.25
0.10
1.55
1.40
0.25
0.31
0.20
0.25
0.18
8.8
8.6
4.0
3.8
0.635
6.2
5.8
1
0.89
0.41
0.25
0.18
0.1
1.05
0.66
8o
o
0
inches
0.068
0.0098 0.061
0.0040 0.055
0.01
0.012 0.0098 0.344 0.157
0.244
0.035
0.025
0.041
0.008 0.0075 0.337 0.150
0.228
0.016
0.01
0.007 0.004
0.040
0.026
8o
o
0
Note
1. Plastic or metal protrusions of 0.2 mm (0.008 inch) maximum per side are not included.
OUTLINE
VERSION
SOT556-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
MO-137
Fig 10. Package outline SOT556-1 (SSOP24)
CBT3384_6
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 06 — 2 November 2009
10 of 14
CBT3384
NXP Semiconductors
10-bit bus switch with 5-bit output enables
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm
D
SOT355-1
E
A
X
c
HE
y
v M A
Z
13
24
Q
A2
(A 3)
A1
pin 1 index
A
θ
Lp
L
1
12
bp
e
detail X
w M
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
7.9
7.7
4.5
4.3
0.65
6.6
6.2
1
0.75
0.50
0.4
0.3
0.2
0.13
0.1
0.5
0.2
8o
0o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT355-1
REFERENCES
IEC
JEDEC
JEITA
MO-153
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 11. Package outline SOT355-1 (TSSOP24)
CBT3384_6
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 06 — 2 November 2009
11 of 14
CBT3384
NXP Semiconductors
10-bit bus switch with 5-bit output enables
14. Abbreviations
Table 10.
Abbreviations
Acronym
Description
CDM
Charged Device Model
DUT
Device Under Test
ESD
ElectroStatic Discharge
FET
Field Effect Transistor
HBM
Human Body Model
PRR
Pulse Rate Repetition
TTL
Transistor-Transistor Logic
15. Revision history
Table 11.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
CBT3384_6
20091102
Product data sheet
-
CBT3384_5
Modifications:
•
The format of this data sheet has been redesigned to comply with the new identity guidelines of
NXP Semiconductors.
•
•
Legal texts have been adapted to the new company name where appropriate.
Changed: Table 6 “Static characteristics”
a. Pass voltage values have changed.
b. Undershoot static current protection removed.
•
Changed: Table 7 “Dynamic characteristics”
a. Enable and disable times values have changed.
CBT3384_5
20011220
Product specification
-
CBT3384_4
CBT3384_4
20010319
Product specification
-
CBT3384_3
CBT3384_3
20001113
Product specification
-
CBT3384_2
CBT3384_2
20000128
Product specification
-
-
CBT3384_6
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 06 — 2 November 2009
12 of 14
CBT3384
NXP Semiconductors
10-bit bus switch with 5-bit output enables
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
16.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
CBT3384_6
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 06 — 2 November 2009
13 of 14
CBT3384
NXP Semiconductors
10-bit bus switch with 5-bit output enables
18. Contents
1
2
3
4
5
5.1
5.2
6
7
8
9
10
11
12
13
14
15
16
16.1
16.2
16.3
16.4
17
18
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test information . . . . . . . . . . . . . . . . . . . . . . . . . 7
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12
Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Contact information. . . . . . . . . . . . . . . . . . . . . 13
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 2 November 2009
Document identifier: CBT3384_6