HEF4020BP,652

HEF4020B 14-stage binary counter Rev. 11 — 7 December 2021 Product data sheet 1. General description The HEF4020B is a 14-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and 12 buffered parallel outputs (Q0, and Q3 to Q13). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter stages and forces all outputs LOW, independent of the state of CP. Each counter stage is a static toggle flip-flop. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VDD. 2. Features and benefits • • • • • • • • • • Wide supply voltage range from 3.0 V to 15.0 V CMOS low power dissipation High noise immunity High speed operation Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Complies with JEDEC standard JESD 13-B ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-B exceeds 200 V Specified from -40 °C to +85 °C 3. Ordering information Table 1. Ordering information Type number Package HEF4020BT Temperature range Name Description Version -40 °C to +85 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 HEF4020B Nexperia 14-stage binary counter 4. Functional diagram CP MR 10 11 T 14-STAGE COUNTER CD 9 7 5 4 6 13 12 14 15 1 2 3 Q0 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q13 001aad722 Fig. 1. Functional diagram CTR14 10 CP 11 MR Q0 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q13 9 7 5 4 6 13 12 14 15 1 2 3 10 11 0 + CT CT 13 001aad724 001aad723 Fig. 2. Logic symbol CP FF T 0 Fig. 3. Q FF T 1 Q Q FF T 2 Q RD 9 7 5 4 6 13 12 14 15 1 2 3 Q FF T 3 Q RD IEC Logic symbol Q FF T 4 Q RD Q FF T 5 Q RD Q FF T 6 Q RD Q Q RD RD MR Q0 FF T 7 Q Q3 FF T 8 Q Q FF T 9 Q RD FF T 10 Q RD Q7 Q FF T 11 Q RD Q8 Q Q4 FF T 12 Q RD Q9 Q Q5 Q FF T 13 Q RD Q10 Q6 Q RD Q11 Q RD Q12 Q13 001aad725 Fig. 4. Logic diagram HEF4020B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 7 December 2021 © Nexperia B.V. 2021. All rights reserved 2 / 11 HEF4020B Nexperia 14-stage binary counter 5. Pinning information 5.1. Pinning HEF4020B Q11 1 16 VDD Q12 2 15 Q10 Q13 3 14 Q9 Q5 4 13 Q7 Q4 5 12 Q8 Q6 6 11 MR Q3 7 10 CP VSS 8 9 Q0 001aaj101 Fig. 5. Pin configuration SOT109-1 (SO16) 5.2. Pin description Table 2. Pin description Symbol Pin Description Q3, Q4, Q5, Q6, Q7, Q8, Q9, Q10, Q11, Q12, Q13 7, 5, 4, 6, 13, 12, 14, 15, 1, 2, 3 parallel output (Q3 to Q13) VSS 8 ground supply voltage Q0 9 parallel output CP 10 clock input (HIGH-to-LOW edge triggered) MR 11 master reset input (active HIGH) VDD 16 supply voltage 6. Functional description Table 3. Functional table H = HIGH voltage level; L = LOW voltage level; X = don’t care; ↑ = positive-going transition; ↓ = negative-going transition. Output Input CP MR Q0, Q3 to Q13 ↑ L no change ↓ L count X H L HEF4020B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 7 December 2021 © Nexperia B.V. 2021. All rights reserved 3 / 11 HEF4020B Nexperia 14-stage binary counter CP input 1 2 4 8 16 32 64 128 256 512 1024 2048 4096 8192 16384 MR input Q0 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q13 001aad726 Fig. 6. Timing diagram 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit -0.5 +18 V - ±10 mA VDD supply voltage IIK input clamping current VI input voltage IOK output clamping current - ±10 mA II/O input/output current - ±10 mA IDD supply current - 50 mA Tstg storage temperature -65 +150 °C Tamb ambient temperature -40 +85 °C Ptot total power dissipation Tamb -40 °C to +85 °C - 500 mW P power dissipation per output - 100 mW Min Typ Max Unit VI < -0.5 V or VI > VDD + 0.5 V -0.5 VO < -0.5 V or VO > VDD + 0.5 V VDD + 0.5 V 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions VDD supply voltage 3 - 15 V VI input voltage 0 - VDD V Tamb ambient temperature in free air -40 - +85 °C Δt/ΔV input transition rise and fall rate VDD = 5 V - - 3.75 μs/V VDD = 10 V - - 0.5 μs/V VDD = 15 V - - 0.08 μs/V HEF4020B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 7 December 2021 © Nexperia B.V. 2021. All rights reserved 4 / 11 HEF4020B Nexperia 14-stage binary counter 9. Static characteristics Table 6. Static characteristics VSS = 0 V; VI = VSS or VDD; unless otherwise specified. Symbol Parameter VIH VIL VOH VOL IOH IOL HIGH-level input voltage LOW-level input voltage VDD |IO| < 1 μA LOW-level output voltage |IO| < 1 μA Tamb = -40 °C Tamb = +25 °C Tamb = +85 °C Unit Min Max Min Max Min Max 3.5 - 3.5 - 3.5 - V 10 V 7.0 - 7.0 - 7.0 - V 15 V 11.0 - 11.0 - 11.0 - V 5V - 1.5 - 1.5 - 1.5 V 10 V - 3.0 - 3.0 - 3.0 V 15 V - 4.0 - 4.0 - 4.0 V 5V 4.95 - 4.95 - 4.95 - V 10 V 9.95 - 9.95 - 9.95 - V 15 V 14.95 - 14.95 - 14.95 - V 5V - 0.05 - 0.05 - 0.05 V 10 V - 0.05 - 0.05 - 0.05 V 5V |IO| < 1 μA HIGH-level output voltage |IO| < 1 μA 15 V - 0.05 - 0.05 - 0.05 V HIGH-level output current VO = 2.5 V 5V - -1.7 - -1.4 - -1.1 mA VO = 4.6 V 5V - -0.52 - -0.44 - -0.36 mA VO = 9.5 V 10 V - -1.3 - -1.1 - -0.9 mA VO = 13.5 V 15 V - -3.6 - -3.0 - -2.4 mA LOW-level output current VO = 0.4 V II input leakage current IDD supply current CI Conditions input capacitance HEF4020B Product data sheet 5V 0.52 - 0.44 - 0.36 - mA VO = 0.5 V 10 V 1.3 - 1.1 - 0.9 - mA VO = 1.5 V 15 V 3.6 - 3.0 - 2.4 - mA 15 V - ±0.3 - ±0.3 - ±1.0 μA 5V - 20 - 20 - 150 μA 10 V - 40 - 40 - 300 μA 15 V - 80 - 80 - 600 μA - - - - 7.5 - - pF IO = 0 A All information provided in this document is subject to legal disclaimers. Rev. 11 — 7 December 2021 © Nexperia B.V. 2021. All rights reserved 5 / 11 HEF4020B Nexperia 14-stage binary counter 10. Dynamic characteristics Table 7. Dynamic characteristics VSS = 0 V; Tamb = 25 °C; for test circuit see Fig. 8. Symbol Parameter Conditions VDD Extrapolation formula [1] tPHL CP to Q0; see Fig. 7 5V HIGH to LOW propagation delay Qn to Qn + 1 MR to Qn; see Fig. 7 tPLH LOW to HIGH propagation delay CP to Q0; see Fig. 7 Qn to Qn + 1 tt transition time tW pulse width trec recovery time fmax [1] see Fig. 7 Min Typ Max Unit 78 ns + (0.55 ns/pF)CL - 105 210 ns 10 V 34 ns + (0.23 ns/pF)CL - 45 90 ns 15 V 22 ns + (0.16 ns/pF)CL - 30 65 ns 5V 53 ns + (0.55 ns/pF)CL - 80 160 ns 10 V 19 ns + (0.23 ns/pF)CL - 30 60 ns 15 V 12 ns + (0.16 ns/pF)CL - 20 40 ns 5V 153 ns + (0.55 ns/pF)CL - 180 360 ns 10 V 79 ns + (0.23 ns/pF)CL - 90 180 ns 15 V 62 ns + (0.16 ns/pF)CL - 70 140 ns 5V 78 ns + (0.55 ns/pF)CL - 105 210 ns 10 V 39 ns + (0.23 ns/pF)CL - 50 95 ns 15 V 27 ns + (0.16 ns/pF)CL - 35 70 ns 5V 43 ns + (0.55 ns/pF)CL - 70 140 ns 10 V 14 ns + (0.23 ns/pF)CL - 25 50 ns 15 V 12 ns + (0.16 ns/pF)CL - 20 40 ns 5V 10 ns + (1.00 ns/pF)CL - 60 120 ns 10 V 9 ns + (0.42 ns/pF)CL - 30 60 ns 15 V 6 ns + (0.28 ns/pF)CL - 20 40 ns CP = HIGH; minimum width; see Fig. 7 5V 50 25 - ns 10 V 25 15 - ns 15 V 20 10 - ns MR = HIGH; minimum width; see Fig. 7 5V 130 65 - ns 10 V 95 50 - ns 15 V 90 45 - ns MR input; see Fig. 7 5V 115 60 - ns 10 V 65 35 - ns 15 V 55 25 - ns 5V 5 10 - MHz 10 V 13 25 - MHz 15 V 18 35 - MHz maximum frequency see Fig. 7 The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF). Table 8. Dynamic power dissipation PD PD can be calculated from the formulas shown. VSS = 0 V; tr = tf ≤ 20 ns; Tamb = 25 °C. Symbol Parameter PD VDD dynamic power 5 V dissipation 10 V 15 V HEF4020B Product data sheet Typical formula for PD (μW) PD = 600 × fi + ∑(fo × CL) × VDD where: 2 PD = 2800 × fi + ∑(fo × CL) × VDD PD = 8200 × fi + ∑(fo × CL) × VDD 2 2 fi = input frequency in MHz, fo = output frequency in MHz, CL = output load capacitance in pF, VDD = supply voltage in V, ∑(fo × CL) = sum of the outputs. All information provided in this document is subject to legal disclaimers. Rev. 11 — 7 December 2021 © Nexperia B.V. 2021. All rights reserved 6 / 11 HEF4020B Nexperia 14-stage binary counter 10.1. Waveforms and test circuit VI MR INPUT VM VSS tW VI CP INPUT trec 1/fmax VM VSS VOH Q0 or Qn OUTPUT VOL tPHL tPLH tW tPHL VM tt tt 001aae591 Measurement points are given in Table 9. Fig. 7. Propagation delays, minimum pulse widths, transition and recovery times and maximum clock frequency Table 9. Measurement points Supply voltage Input Output VDD VM VM 5 V to 15 V 0.5VDD 0.5VDD VI negative pulse tW 90 % 90 % VM 10 % 0V VI positive pulse 0V VM 10 % tf tr tr tf 90 % VDD G 90 % VM VI VM 10 % CL RT 10 % tW VO DUT 001aaj781 001aag182 a. Input waveforms b. Test circuit Test data is given in Table 10. Definitions for test circuit: CL = load capacitance including jig and probe capacitance. RT = termination resistance should be equal to the output impedance Zo of the pulse generator. Fig. 8. Test circuit for measuring switching times Table 10. Test data Supply voltage Input VDD VI tr, tf CL 5 V to 15 V VSS or VDD ≤ 20 ns 50 pF HEF4020B Product data sheet Load All information provided in this document is subject to legal disclaimers. Rev. 11 — 7 December 2021 © Nexperia B.V. 2021. All rights reserved 7 / 11 HEF4020B Nexperia 14-stage binary counter 11. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e w M bp 0 2.5 detail X 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 inches 0.069 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.16 0.15 0.05 0.039 0.016 0.028 0.020 0.01 0.01 0.004 0.028 0.012 0.244 0.041 0.228 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. Fig. 9. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Package outline SOT109-1 (SO16) HEF4020B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 7 December 2021 © Nexperia B.V. 2021. All rights reserved 8 / 11 HEF4020B Nexperia 14-stage binary counter 12. Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 13. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes HEF4020B v.11 20211207 Product data sheet - HEF4020B v.10 Modifications: • HEF4020B v.10 20181018 - HEF4020B v.9 Modifications: • • Section 1 and Section 2 updated. Product data sheet The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. HEF4020B v.9 20160321 Modifications: • HEF4020B v.8 20111118 Modifications: • • • HEF4020B v.7 20111010 Product data sheet - HEF4020B v.6 HEF4020B v.6 20091127 Product data sheet - HEF4020B v.5 HEF4020B v.5 20090707 Product data sheet - HEF4020B v.4 HEF4020B v.4 20081204 Product data sheet - HEF4020B_CNV v.3 HEF4020B_CNV v.3 19950101 Product specification - HEF4020B_CNV v.2 HEF4020B_CNV v.2 19950101 Product specification - - HEF4020B Product data sheet Product data sheet - HEF4020B v.8 Type number HEF4020BP (SOT38-4) removed. Product data sheet - HEF4020B v.7 Legal pages updated. Changes in "General description" and "Features and benefits". Section "Applications" removed. All information provided in this document is subject to legal disclaimers. Rev. 11 — 7 December 2021 © Nexperia B.V. 2021. All rights reserved 9 / 11 HEF4020B Nexperia 14-stage binary counter 14. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. 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Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal HEF4020B Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. 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Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 11 — 7 December 2021 © Nexperia B.V. 2021. All rights reserved 10 / 11 HEF4020B Nexperia 14-stage binary counter Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................1 4. Functional diagram.......................................................2 5. Pinning information......................................................3 5.1. Pinning.........................................................................3 5.2. Pin description............................................................. 3 6. Functional description................................................. 3 7. Limiting values............................................................. 4 8. Recommended operating conditions..........................4 9. Static characteristics....................................................5 10. Dynamic characteristics............................................ 6 10.1. Waveforms and test circuit........................................ 7 11. Package outline.......................................................... 8 12. Abbreviations.............................................................. 9 13. Revision history..........................................................9 14. Legal information......................................................10 © Nexperia B.V. 2021. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 7 December 2021 HEF4020B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 7 December 2021 © Nexperia B.V. 2021. All rights reserved 11 / 11