HEF4051B
8-channel analog multiplexer/demultiplexer
Rev. 13 — 29 July 2021
Product data sheet
1. General description
The HEF4051B is a single-pole octal-throw analog switch (SP8T) suitable for use in analog or
digital 8:1 multiplexer/demultiplexer applications. The switch features three digital select inputs
(S1, S2 and S3), eight independent inputs/outputs (Yn), a common input/output (Z) and a digital
enable input (E). When E is HIGH, the switches are turned off. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
•
•
•
•
•
•
•
•
•
Wide supply voltage range from 3.0 V to 15.0 V
CMOS low power dissipation
High noise immunity
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Complies with JEDEC standard JESD 13-B
ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM EIA/JESD22-A115-A exceeds 200 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
3. Applications
•
•
•
Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating
4. Ordering information
Table 1. Ordering information
All types operate from -40 °C to +125 °C.
Type number
Package
Name
Description
Version
HEF4051BT
SO16
plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
HEF4051BTT
TSSOP16
plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
HEF4051B
Nexperia
8-channel analog multiplexer/demultiplexer
5. Functional diagram
VDD
16
13 Y0
S1 11
14 Y1
15 Y2
S2 10
12 Y3
LOGIC
LEVEL
CONVERSION
1 Y4
1 - OF - 8
DECODER
S3 9
5 Y5
2 Y6
E 6
4 Y7
3 Z
8
VSS
Fig. 1.
7
VEE
001aac277
Functional diagram
Yn
VDD
VDD
Z
VEE
001aac281
Fig. 2.
Schematic diagram (one switch)
HEF4051B
Product data sheet
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HEF4051B
Nexperia
8-channel analog multiplexer/demultiplexer
11
10
9
6
13
S1
S2
S3
11
14
10
15
9
12
1
5
2
E
6
4
3
1
3
EN
Y1
MUX/DMUX
0
Y2
1
Y3
2
Y4
3
Y5
HEF4051B
Product data sheet
3
4
Y6
5
Y7
6
7
13
14
15
12
1
5
2
4
001aac279
001aac278
Logic symbol
0
7
Y0
Z
Fig. 3.
X
Fig. 4.
IEC logic symbol
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HEF4051B
Nexperia
8-channel analog multiplexer/demultiplexer
Y0
Y1
S1
LEVEL
CONVERTER
S2
LEVEL
CONVERTER
S3
LEVEL
CONVERTER
E
LEVEL
CONVERTER
Y2
Y3
Y4
Y5
Y6
Y7
Z
001aac280
Fig. 5.
Logic diagram
HEF4051B
Product data sheet
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HEF4051B
Nexperia
8-channel analog multiplexer/demultiplexer
6. Pinning information
6.1. Pinning
HEF4051B
Y4
1
16 VDD
Y6
2
15 Y2
Z
3
14 Y1
Y7
4
13 Y0
Y5
5
12 Y3
E
6
11 S1
VEE
7
10 S2
VSS
8
9
S3
001aac282
Fig. 6.
Pin configuration SOT109-1 (SO16) and SOT403-1 (TSSOP16)
6.2. Pin description
Table 2. Pin description
Symbol
Pin
Description
E
6
enable input (active LOW)
VEE
7
supply voltage
VSS
8
ground supply voltage
S1, S2, S3
11, 10, 9
select input
Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7
13, 14, 15, 12, 1, 5, 2, 4
independent input or output
Z
3
common output or input
VDD
16
supply voltage
7. Functional description
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care.
Input
Channel ON
E
S3
S2
S1
L
L
L
L
Y0 to Z
L
L
L
H
Y1 to Z
L
L
H
L
Y2 to Z
L
L
H
H
Y3 to Z
L
H
L
L
Y4 to Z
L
H
L
H
Y5 to Z
L
H
H
L
Y6 to Z
L
H
H
H
Y7 to Z
H
X
X
X
switches off
HEF4051B
Product data sheet
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HEF4051B
Nexperia
8-channel analog multiplexer/demultiplexer
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol Parameter
Conditions
Min
Max
Unit
-0.5
+18
V
-18
+0.5
V
-
±10
mA
-0.5
VDD + 0.5
VDD
supply voltage
VEE
supply voltage
referenced to VDD
IIK
input clamping current
pins Sn and E;
VI < -0.5 V or VI > VDD + 0.5 V
VI
input voltage
II/O
input/output current
-
±10
mA
IDD
supply current
-
50
mA
Tstg
storage temperature
-65
+150
°C
Tamb
ambient temperature
-40
+125
°C
Ptot
total power dissipation
Tamb = -40 °C to +125 °C
-
500
mW
P
power dissipation
per output
-
100
mW
[1]
[2]
[1]
[2]
V
To avoid drawing VDD current out of terminal Z, when switch current flows into terminals Y, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VDD current will flow out of terminals Y, and in this case
there is no limit for the voltage drop across the switch, but the voltages at Y and Z may not exceed VDD or VEE.
For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C.
For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C.
9. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter
Conditions
Min
Typ
Max
Unit
see Fig. 7
3
-
15
V
VDD
supply voltage
VI
input voltage
0
-
VDD
V
Tamb
ambient temperature
in free air
-40
-
+125
°C
Δt/ΔV
input transition rise and fall rate
VDD = 5 V
-
-
3.75
μs/V
VDD = 10 V
-
-
0.5
μs/V
VDD = 15 V
-
-
0.08
μs/V
001aac285
15
VDD - VSS
(V)
10
operating area
5
0
Fig. 7.
0
5
10
VDD - VEE (V)
15
Operating area as a function of the supply voltages
HEF4051B
Product data sheet
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HEF4051B
Nexperia
8-channel analog multiplexer/demultiplexer
10. Static characteristics
Table 6. Static characteristics
VSS = VEE = 0 V; VI = VSS or VDD unless otherwise specified.
Symbol Parameter
VIH
HIGH-level
input voltage
VIL
LOW-level
input voltage
II
input leakage
current
IS(OFF)
OFF-state
leakage
current
IDD
supply current
CI
input
capacitance
Conditions
VDD
Tamb = -40 °C
Tamb = 25 °C
Tamb = 85 °C
Tamb = 125 °C Unit
Min
Max
Min
Max
Min
Max
Min
Max
3.5
-
3.5
-
3.5
-
3.5
-
V
10 V
7.0
-
7.0
-
7.0
-
7.0
-
V
15 V
11.0
-
11.0
-
11.0
-
11.0
-
V
5V
-
1.5
-
1.5
-
1.5
-
1.5
V
10 V
-
3.0
-
3.0
-
3.0
-
3.0
V
15 V
-
4.0
-
4.0
-
4.0
-
4.0
V
15 V
-
±0.1
-
±0.1
-
±1.0
-
±1.0
μA
Z port;
all channels OFF;
see Fig. 8
15 V
-
-
-
1000
-
-
-
-
nA
Y port;
per channel;
see Fig. 9
15 V
-
-
-
200
-
-
-
-
nA
IO = 0 A
5V
-
5
-
5
-
150
-
150
μA
10 V
-
10
-
10
-
300
-
300
μA
15 V
-
20
-
20
-
600
-
600
μA
-
-
-
-
7.5
-
-
-
-
pF
5V
|IO| < 1 μA
|IO| < 1 μA
Sn, E inputs
10.1. Test circuits
VDD
VDD
S1 to S3
VDD or VSS
Z
VDD or VSS
Yn
E
IS
VO
Y0
1
Z
Yn
2
switch
VSS = VEE
VSS
VI
VI
VO
001aak513
Fig. 8.
Test circuit for measuring OFF-state leakage
current Z port
HEF4051B
Product data sheet
IS
E
VSS = VEE
VDD
S1 to S3
001aak514
Fig. 9.
Test circuit for measuring OFF-state leakage
current Yn port
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HEF4051B
Nexperia
8-channel analog multiplexer/demultiplexer
10.2. ON resistance
Table 7. ON resistance
Tamb = 25 °C; ISW = 200 μA; VSS = VEE = 0 V.
Symbol
Parameter
RON(peak) ON resistance (peak)
RON(rail)
ON resistance (rail)
Conditions
VDD - VEE
Typ
Max
Unit
VI = 0 V to VDD - VEE;
see Fig. 10 and Fig. 11
5V
350
2500
Ω
10 V
80
245
Ω
15 V
60
175
Ω
5V
115
340
Ω
10 V
50
160
Ω
15 V
40
115
Ω
5V
120
365
Ω
10 V
65
200
Ω
15 V
50
155
Ω
5V
25
-
Ω
10 V
10
-
Ω
15 V
5
-
Ω
VI = 0 V;
see Fig. 10 and Fig. 11
VI = VDD - VEE;
see Fig. 10 and Fig. 11
ΔRON
ON resistance mismatch
between channels
VI = 0 V to VDD - VEE;
see Fig. 10
10.2.1. ON resistance waveform and test circuit
001aae648
400
RON
(Ω)
V
VDD
VDD or VSS
VSW
200
S1 to S3
Z
VDD = 5 V
300
Yn
E
VSS = VEE
VSS
ISW
Fig. 10. Test circuit for measuring RON
HEF4051B
Product data sheet
15 V
VI
001aak512
RON = VSW / ISW.
10 V
100
0
0
5
10
VI (V)
15
Fig. 11. Typical RON as a function of input voltage
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HEF4051B
Nexperia
8-channel analog multiplexer/demultiplexer
11. Dynamic characteristics
Table 8. Dynamic characteristics
Tamb = 25 °C; VSS = VEE = 0 V; for test circuit see Fig. 15.
Symbol Parameter
Conditions
VDD
Typ
Max
tPHL
Yn, Z to Z, Yn; see Fig. 12
5V
15
30
ns
10 V
5
10
ns
HIGH to LOW propagation delay
Sn to Yn, Z; see Fig. 13
tPLH
LOW to HIGH propagation delay
Yn, Z to Z, Yn; see Fig. 12
Sn to Yn, Z; see Fig. 13
tPHZ
tPZH
tPLZ
tPZL
HIGH to OFF-state propagation
delay
E to Yn, Z; see Fig. 14
OFF-state to HIGH propagation
delay
E to Yn, Z; see Fig. 14
LOW to OFF-state propagation
delay
E to Yn, Z; see Fig. 14
OFF-state to LOW propagation
delay
HEF4051B
Product data sheet
E to Yn, Z; see Fig. 14
15 V
5
10
ns
5V
150
300
ns
10 V
60
120
ns
15 V
45
90
ns
5V
15
30
ns
10 V
5
10
ns
15 V
5
10
ns
5V
150
300
ns
10 V
65
130
ns
15 V
45
90
ns
5V
120
240
ns
10 V
90
180
ns
15 V
85
170
ns
5V
140
280
ns
10 V
55
110
ns
15 V
40
80
ns
5V
145
290
ns
10 V
120
240
ns
15 V
115
230
ns
5V
140
280
ns
10 V
55
110
ns
15 V
40
80
ns
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Unit
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HEF4051B
Nexperia
8-channel analog multiplexer/demultiplexer
11.1. Waveforms and test circuit
VDD
Yn or Z
input
VM
VDD
Sn input
VEE
tPLH
tPHL
VO
Z or Yn
output
Yn or Z
output
VM
VEE
VM
VSS
tPLH
VO
90 %
10 %
VEE
switch OFF
001aak509
Measurement points are given in Table 9.
tPHL
switch ON
switch OFF
001aak510
Measurement points are given in Table 9.
Fig. 12. Yn, Z to Z, Yn propagation delays
Fig. 13. Sn to Yn, Z propagation delays
VDD
E input
VM
VSS
tPLZ
Yn or Z output
LOW-to-OFF
OFF-to-LOW
tPZL
VO
90 %
10 %
VEE
tPHZ
Yn or Z output
HIGH-to-OFF
OFF-to-HIGH
VO
tPZH
90 %
10 %
VEE
switch ON
switch OFF
switch ON
001aak511
Measurement points are given in Table 9.
Fig. 14. Enable and disable times
Table 9. Measurement points
Supply voltage
Input
Output
VDD
VM
VM
5 V to 15 V
0.5VDD
0.5VDD
HEF4051B
Product data sheet
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HEF4051B
Nexperia
8-channel analog multiplexer/demultiplexer
VI
negative
pulse
0V
tW
90 %
VI
positive
pulse
0V
10 %
VM
10 %
VM
tf
tr
tr
tf
90 %
VM
VM
tW
VDD
VDD VI
PULSE
GENERATOR
VI
DUT
VO
RT
RL
S1
open
CL
VSS
VEE
001aaj903
Test data is given in Table 10.
Definitions:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including test jig and probe.
RL = Load resistance.
Fig. 15. Test circuit for measuring switching times
Table 10. Test data
Input
Yn, Z
Sn and E
Load
tr, tf
VDD or VEE VDD or VSS ≤ 20 ns
[1]
S1 position
VM
CL
RL
tPHL [1]
tPLH
0.5VDD
50 pF
10 kΩ
VDD or VEE VEE
tPZH, tPHZ tPZL, tPLZ other
VEE
VDD
VEE
For Yn to Z or Z to Yn propagation delays use VEE. For Sn to Yn or Z propagation delays use VDD.
11.2. Additional dynamic parameters
Table 11. Additional dynamic characteristics
VSS = VEE = 0 V; Tamb = 25 °C.
Symbol Parameter
Conditions
VDD
Typ
Max
THD
see Fig. 16; RL = 10 kΩ; CL = 15 pF;
channel ON; VI = 0.5VDD (p-p); fi = 1 kHz
5V
[1]
0.25
-
%
10 V
[1]
0.04
-
%
15 V
[1]
0.04
-
%
see Fig. 17; RL = 1 kΩ; CL = 5 pF; channel ON; 5 V
VI = 0.5VDD (p-p)
10 V
[1]
13
-
MHz
[1]
40
-
MHz
15 V
[1]
70
-
MHz
[1]
-50
-
dB
50
-
mV
-50
-
dB
f(-3dB)
total harmonic
distortion
-3 dB frequency
response
αiso
isolation (OFF-state)
see Fig. 18; fi = 1 MHz; RL = 1 kΩ; CL = 5 pF;
channel OFF; VI = 0.5VDD (p-p)
10 V
Vct
crosstalk voltage
digital inputs to switch; see Fig. 19;
RL = 10 kΩ; CL = 15 pF;
E or Sn = VDD (square-wave)
10 V
Xtalk
crosstalk
between switches; see Fig. 20; fi = 1 MHz;
RL = 1 kΩ; VI = 0.5VDD (p-p)
10 V
[1]
[1]
Unit
fi is biased at 0.5 VDD; VI = 0.5VDD (p-p).
HEF4051B
Product data sheet
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HEF4051B
Nexperia
8-channel analog multiplexer/demultiplexer
Table 12. Dynamic power dissipationPD
PD can be calculated from the formulas shown; VEE = VSS = 0 V; tr = tf ≤ 20 ns; Tamb = 25 °C.
Symbol
PD
Parameter
dynamic power
dissipation
VDD
Typical formula for PD (μW)
where:
5V
PD = 1000 × fi + Σ(fo × CL) × VDD
10 V
PD = 5500 × fi + Σ(fo × CL) × VDD
15 V
PD = 15000 × fi + Σ(fo × CL) × VDD
2
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VDD = supply voltage in V;
Σ(CL × fo) = sum of the outputs.
2
2
11.2.1. Test circuits
VDD
VDD
S1 to S3
VDD or VSS
Z
S1 to S3
VDD or VSS
Yn
Z
E
VSS = VEE
VSS
Yn
E
RL
D
CL
VSS = VEE
VSS
fi
RL
CL
dB
fi
001aak516
001aak517
Fig. 16. Test circuit for measuring total harmonic
distortion
Fig. 17. Test circuit for measuring frequency response
VDD
VDD or VSS
S1 to S3
Y0
1
Z
Yn
2
switch
E
VSS = VEE
VSS
RL
CL
dB
fi
001aak518
Fig. 18. Test circuit for measuring isolation (OFF-state)
0.5VDD
RL
G
VDD
0.5VDD
S1 to S3
Y0
1
Z
Yn
2
RL
logic
input (Sn, E)
switch
off
on
off
E
VDD or VSS
VSS = VEE
CL
V
VO
VO
Vct
001aak519
a. Test circuit
001aaj908
b. Input and output pulse definitions
Fig. 19. Test circuit for measuring crosstalk voltage between digital inputs and switch
HEF4051B
Product data sheet
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HEF4051B
Nexperia
8-channel analog multiplexer/demultiplexer
VDD
VDD
VDD or VSS
S1 to S3
Y0
Z
Yn
VDD or VSS
S1 to S3
Y0
Z
Yn
E
E
VSS = VEE
VSS
RL
VO
VSS = VEE
VSS
RL
RL
VI
RL
VO
001aak521
001aak520
a. Switch closed condition
VI
b. Switch open condition
Fig. 20. Test circuit for measuring crosstalk between switches
HEF4051B
Product data sheet
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HEF4051B
Nexperia
8-channel analog multiplexer/demultiplexer
12. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
c
y
HE
v M A
Z
16
9
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
8
e
w M
bp
0
2.5
detail X
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
inches
0.069
0.010 0.057
0.004 0.049
0.01
0.019 0.0100 0.39
0.014 0.0075 0.38
0.16
0.15
0.05
0.039
0.016
0.028
0.020
0.01
0.01
0.004
0.028
0.012
0.244
0.041
0.228
θ
o
8
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT109-1
076E07
MS-012
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig. 21. Package outline SOT109-1 (SO16)
HEF4051B
Product data sheet
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HEF4051B
Nexperia
8-channel analog multiplexer/demultiplexer
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
D
SOT403-1
E
A
X
c
y
HE
v M A
Z
9
16
Q
A2
pin 1 index
(A 3 )
A1
A
θ
Lp
1
L
8
detail X
w M
bp
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
1
0.75
0.50
0.4
0.3
0.2
0.13
0.1
0.40
0.06
8o
0o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT403-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
MO-153
Fig. 22. Package outline SOT403-1 (TSSOP16)
HEF4051B
Product data sheet
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HEF4051B
Nexperia
8-channel analog multiplexer/demultiplexer
13. Abbreviations
Table 13. Abbreviations
Acronym
Description
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
14. Revision history
Table 14. Revision history
Document ID
Release date
Data sheet status
Change notice Supersedes
HEF4051B v.13
20210729
Product data sheet
-
Modifications:
•
•
•
•
•
HEF4051B v.12
The format of this data sheet has been redesigned to comply with the identity
guidelines of Nexperia.
Legal texts have been adapted to the new company name where appropriate.
Type number HEF4051BTS (SOT338-1/SSOP16) removed.
Section 1 and Section 2 updated.
Section 8: Derating values for Ptot total power dissipation updated.
HEF4051B v.12
20160325
Modifications:
•
HEF4051B v.11
20140911
Modifications:
•
HEF4051B v.10
20111117
Modifications:
•
•
HEF4051B v.9
20100325
Product data sheet
-
HEF4051B v.8
HEF4051B v.8
20100301
Product data sheet
-
HEF4051B v.7
HEF4051B v.7
20091127
Product data sheet
-
HEF4051B v.6
HEF4051B v.6
20090924
Product data sheet
-
HEF4051B v.5
HEF4051B v.5
20090826
Product data sheet
-
HEF4051B v.4
HEF4051B v.4
20050112
Product data sheet
-
HEF4051B_CNV v.3
HEF4051B_CNV v.3
19950101
Product specification
-
HEF4051B_CNV v.2
HEF4051B_CNV v.2
19950101
Product specification
-
-
HEF4051B
Product data sheet
Product data sheet
-
HEF4051B v.11
Type number HEF4051BP (SOT38-4) removed.
Product data sheet
-
HEF4051B v.10
-
HEF4051B v.9
Fig. 19: Test circuit modified
Product data sheet
Legal pages updated.
Changes in "General description", "Features and benefits" and "Applications".
All information provided in this document is subject to legal disclaimers.
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HEF4051B
Nexperia
8-channel analog multiplexer/demultiplexer
15. Legal information
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
Data sheet status
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Document status
[1][2]
Product
status [3]
Definition
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification
This document contains data from
the preliminary specification.
Product [short]
data sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Please consult the most recently issued document before initiating or
completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
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Definitions
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of an Nexperia product can reasonably be expected to result in personal
HEF4051B
Product data sheet
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
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Customers are responsible for the design and operation of their applications
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liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
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In the event that customer uses the product for design-in and use in
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Translations — A non-English (translated) version of a document is for
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Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
All information provided in this document is subject to legal disclaimers.
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HEF4051B
Nexperia
8-channel analog multiplexer/demultiplexer
Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Ordering information....................................................1
5. Functional diagram.......................................................2
6. Pinning information......................................................5
6.1. Pinning.........................................................................5
6.2. Pin description............................................................. 5
7. Functional description................................................. 5
8. Limiting values............................................................. 6
9. Recommended operating conditions..........................6
10. Static characteristics..................................................7
10.1. Test circuits................................................................7
10.2. ON resistance............................................................8
10.2.1. ON resistance waveform and test circuit................ 8
11. Dynamic characteristics.............................................9
11.1. Waveforms and test circuit.......................................10
11.2. Additional dynamic parameters................................11
11.2.1. Test circuits........................................................... 12
12. Package outline........................................................ 14
13. Abbreviations............................................................ 16
14. Revision history........................................................16
15. Legal information......................................................17
©
Nexperia B.V. 2021. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 29 July 2021
HEF4051B
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All information provided in this document is subject to legal disclaimers.
Rev. 13 — 29 July 2021
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