KITFS6522LAEEVM

FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG Rev. 4.0 — 12 June 2017 1 User guide FRDMFS4503CAEVM, FRDMFS6523CAEVM and FRDMFS6522LAEVM evaluation boards aaa-025541 Figure 1. FRDMFS6523CAEVM NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG 2 Important notice NXP provides the enclosed product(s) under the following conditions: This evaluation kit is intended for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY. It is provided as a sample IC pre-soldered to a printed circuit board to make it easier to access inputs, outputs, and supply terminals. This evaluation board may be used with any development system or other source of I/O signals by simply connecting it to the host MCU or computer board via off-theshelf cables. This evaluation board is not a Reference Design and is not intended to represent a final design recommendation for any particular application. Final device in an application will be heavily dependent on proper printed circuit board layout and heat sinking design as well as attention to supply filtering, transient suppression, and I/O signal quality. The goods provided may not be complete in terms of required design, marketing, and or manufacturing related protective considerations, including product safety measures typically found in the end product incorporating the goods. Due to the open construction of the product, it is the user's responsibility to take any and all appropriate precautions with regard to electrostatic discharge. In order to minimize risks associated with the customers applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. For any safety concerns, contact NXP sales and technical support services. Should this evaluation kit not meet the specifications indicated in the kit, it may be returned within 30 days from the date of delivery and will be replaced by a new kit. NXP reserves the right to make changes without further notice to any products herein. NXP makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does NXP assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typical”, must be validated for each customer application by customer’s technical experts. NXP does not convey any license under its patent rights nor the rights of others. NXP products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the NXP product could create a situation where personal injury or death may occur. Should the Buyer purchase or use NXP products for any such unintended or unauthorized application, the Buyer shall indemnify and hold NXP and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges NXP was negligent regarding the design or manufacture of the part. NXP and the NXP logo are trademarks of NXP B.V. All other product or service names are the property of their respective owners. © 2017 NXP B.V. FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 2 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG 3 Getting started 3.1 Jump start NXP’s analog product development boards provide an easy-to-use platform for evaluating NXP products. The boards support a range of analog, mixed-signal and power solutions. They incorporate monolithic ICs and system-in-package devices that use proven high-volume SMARTMOS technology. NXP products offer longer battery life, a smaller form factor, reduced component counts, lower cost and improved performance in powering state of the art systems. 1. Go to the relevant Tool Summary Page: http://www.nxp.com/FRDMFS6522LAEVM http://www.nxp.com/FRDMFS6523CAEVM http://www.nxp.com/FRDMFS4503CAEVM 2. Review your Tools Summary Page. 3. Locate and click: 4. Download the documents, software and other information. Once the files are downloaded, review the user guide in the bundle. The user guide includes setup instructions, BOM and schematics. Jump start bundles are available on each tool summary page with the most relevant and current information. The information includes everything needed for design. 3.2 Kit contents/packing list The FRDMFS6522LAEVM, FRDMFS6523CAEVM and FRDMFS4503CAEVM contents include: • • • • • Assembled and tested FRDMFS65xx board Assembled and test FRDM-KL25Z board 3.0 ft. USB-STD A to USB-B-mini cable Connector, terminal block plug, 2 pos., str. 3.81 mm Connector, terminal block plug, 8 pos., str. 3.81 mm 3.3 Required equipment The EVM requires the following items: • Power supply with a range of 8.0 V to 40 V and a current limit set initially to 1.0 A Standard A plug to Mini-B plug USB cable M/M FlexGUI graphical user interface FlexGUI register definition XML file FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 3 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG 3.4 EVM overview The EVM contains two boards: • FRDMFS4503CAEVB or FRDMFS6523CAEVB or FRDMFS6522LAEVB: These are the evaluation boards available for the FS6500 / FS4500 SBC. The hardware is described in Section 4.5 "Getting to know the hardware". This document refers to these boards as EVBs. • FRDM-KL25Z: This board contains the KL25Z MCU. It is plugged into the EVB by means of the Arduino™ connectors on both boards. The FRDM-KL25Z manages communication between the EVB and a host PC, allowing users to access the EVB's on-board device features and registers. For more information on the FRDM-KL25Z see Section 11 "References" FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 4 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG 4 Board description 4.1 Board overview The FRDMFS4503CAEVB, FRDMFS6523CAEVB and FRDMFS6522LAEVB are hardware evaluation tools supporting system designs based on NXP’s FS4500 and FS6500 product families. The EVM allow testing the devices as an integral part of the overall system being developed. They provide access to all FS45xx and FS65xx functions (SPI, IOs) and support functional modes such as debug, normal, buck and boost. Table 1. EVMs supporting the FS45xx/FS65xx family [1] EVM name Supported silicon Options FRDMFS6522LAEVM MC33FS6522LAE CAN, LIN, No FS1b, VCORE DC/DC 2.2 A [1] FRDMFS6523CAEVM MC33FS6523CAE CAN, FS1b, No LIN, VCORE DC/DC 2.2 A [1] FRDMFS4503CAEVM MC33FS4503CAE CAN, FS1b, No LIN, VCORE LDO 500 mA The FRDM board is limited to 1.5 A 4.2 Board features The main features of the FRDMFS6522LAEVB, FRDMFS6523CAEVB and FRDMFS4503CAEVB evaluation boards are: • • • • • • • • • • • • • VBAT power supply connector VCORE configuration:1.3 V VCCA configuration: 3.3 V, using internal PMOS VAUX configuration: 5.0 V Buck or boost setting DFS configuration Ignition key switch CAN bus LIN bus (FRDMFS6522LAEVM only) FS0B FS1B (FRDMFS6523CAEVM or FRDMFS4503CAEVM only) IO connector (IO_0 to IO_5) Connectivity to KL25Z Freedom board (Access to SPI bus, IOs, LIN digital, RSTB, FS0B, INTB, Debug, MUX_OUT, Regulators) • LEDs that indicate signal or regulator status FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 5 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG 4.3 Block diagram J2 Vpre (switching) Vbat J1 PI Filter SW1 KEY Vpre Vsup Vcore IO0 Vcore Power Supply Connector (switching) J1_FRDM Vcca IO2_to_5 I/O J10_FRDM MUX_OUT RXL TXC To KL25 ADC Vaux Vaux PNP J7 FS54XX FS65XX VPRE VKAM Vcore Vcca Vaux CAN_5V VDDIO Debug Debug FS1b RST FS0b J2_FRDM VDDIO SPI Interface TP7 TXL TP6 RXL LIN Transceiver CAN Transceiver J9_FRDM VCCA J6 P3V3_KL25Z TXC TP5 RXC TP3 CANH LIN/Vpu_fs CANL CAN & LIN J3 aaa-025542 Figure 2. FRDMFS65/FRDMFS45 block diagram FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 6 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG 4.4 Device features TheFS65xx/FS45xx are multi-output power-regulating SMARTMOS devices aimed at the automotive market. They include CAN flexible data (FD) and/or LIN transceivers. Multiple switching and linear voltage regulators—including low-power mode (32 μA) — provide a variety of wake-up capabilities. An advanced power management scheme maintains high efficiency over a wide range of input voltages (down to 2.7 V) and output current ranges (up to 2.2 A). The FS45xx/FS65xx family includes enhanced safety features with multiple fail-safe outputs. The devices are capable of fully supporting safety-oriented system partitioning with a high integrity safety level (up to ASIL D). The built-in CAN FD (flexible data-rate) interface meets all ISO11898-2 and -5 standards. The LIN interface is compliant with LIN protocol specifications 2.0, 2.1, 2.2, and SAEJ2602-2. Table 2. FS45xx/FS65xxfeatures Device FS4500/ FS6500 Description Features Automotive control devices • Battery voltage sensing and MUX output pin • Highly flexible SMPS pre-regulator, allowing two topologies: non-inverting buck-boost and standard buck • Switching mode power supply (SMPS) dedicated to MCU core supply, from 1.0 V to 5.0 V, delivering up to 2.2 A • Switching mode power supply (SMPS) dedicated to MCU core supply, from 1.0 V to 5.0 V, delivering up to 2.2 A • Linear voltage regulator dedicated to auxiliary functions, or to sensor supply (VCCA tracker or independent), 5.0 V or 3.3 V • Linear voltage regulator dedicated to MCU A/D reference voltage or I/Os supply (VCCA), 5.0 V or 3.3 V • 3.3 V keep alive memory supply available in low-power mode • Long duration timer available in low-power mode (1.0 s resolution) • Multiple wake-up sources in low-power mode: CAN, LIN, IOs, LDT • Five configurable I/Os 4.5 Getting to know the hardware The primary component of the evaluation boards is the SBC. The boards include an FS45xx or FS65xx and provide full access to all the device’s features. This EVB can either be used alone, or connected to the FRDM-KL25Z board included with this EVM. This provides access to all the features and I/Os of FS45xx/FS65xx through a USB connection. FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 7 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG aaa-025543 Figure 3. Evaluation board description Table 3. Board description Number 1 VBAT connector - Use Phoenix connector to supply board 2 FS45xx / FS65xx 3 Ignition key - Ignition key from car 4 Power supplies - Connector for power supplies (VPRE/VCORE/VCCA/VAUX) 5 Power supplies LED - Visualizes regulator state (on or off). 6 VDDIO selection - Selects either VCCA or P3V3_KL25Z (3.3V supply from FRDM-KL25Z board) 7 Enable DBG mode 8 Can & LIN connector - Could be used for debug purpose (CANH, CANL, LIN) 9 I/Os - Input and Output from FS45XX/FS65XX (SPI, VPRE, FS0b, TX LIN) 10 I/Os - Input and Output from FS45XX/FS65XX (IO2, IO3, IO4, IO5, Ignition) 11 I/Os - Input and Output from FS45XX/FS65XX (RSTb, FS1b, DBG, GND, P3V3_KL25Z) 12 I/Os - Input and Output from FS45XX/FS65XX (TX CAN, RX LIN, CAN_5V, VCORE, VCCA, VAUX, VKAM, VDDIO) FS4500/FS6500 evaluation boards User guide Description All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 8 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG 4.5.1 LED display The board contains the following LEDs: . aaa-025544 Figure 4. LEDs Table 4. LEDs Schematic label Name Color Description D8 VCORE Green VCORE on D9 Vkam_IO5 Green Vkam_IO5 on D10 VPRE Green VPRE on D11 VCCA Green VCCA on D12 VAUX Green VAUX on D13 RSTb Red Enabled when RSTB asserted (logic level = 0) D14 FS0b Red Enabled when FS0b asserted (logic level = 0) D15 FS1b Red Enabled when FS1b asserted (logic level = 0) FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 9 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG 4.5.2 Jumper definitions Figure 5 shows the location of jumpers on the evaluation board. Table 5 describes the function and settings for each jumper. Default jumper settings are shown in bold text. . aaa-025545 Figure 5. Jumpers Table 5. Jumper definitions Jumper Description Setting J6 VDDIO selection [1–2] VDDIO referenced to VCORE or P3V3_KL25Z [2–3] VDDIO referenced to VCCA [1–2] ON:Debug mode OFF: normal mode J7 Debug mode Connection/Result 4.5.3 Test point definitions The following test points provide access to various signals to and from the board. FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 10 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG . aaa-025546 Figure 6. Test points Table 6. Test point definitions Test point name Signal name Description TP1 GND Ground TP3 RXC CAN receiver data. Logic level TP4 INTB INTB asserted (logic level = 0) TP5 TXC CAN transmit data. Logic Level TP6 RXL LIN receiver data. Logic level. TP7 TXL LIN transmit data. Logic Level 4.5.4 Connectors Figure 7 shows the location of connectors on the board. The tables below list the pin-outs for each connector. FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 11 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG . aaa-025547 Figure 7. Connectors 4.5.4.1 VBAT connector (J1) VBAT connects to the board through Phoenix connector (J1). Table 7. VBAT Phoenix connector (J1) Pin number Connection 1 VBAT 2 Ground Description Connects to VBAT Connects to ground 4.5.4.2 SPI connector (J2_FRDM) The Debug connector(J2_FRDM) gives access to the FS65xx main signal for debug or experimentation purposes. Table 8. SPI connector (J2_FRDM) Pin number Connection 1 Not Connected 2 Not Connected 3 Not Connected 4 Not Connected 5 Not Connected 6 CSB FS4500/FS6500 evaluation boards User guide Description SPI chip select, active low All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 12 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG Pin number Connection Description 7 FS0B Fail-safe 0. 8 MOSI SPI Master Output Slave Input 9 Not Connected 10 MISO 11 Not Connected 12 SCLK 13 Not Connected 14 GND 15 Not Connected 16 Not Connected 17 Not Connected 18 Not Connected 19 TXL 20 Not Connected SPI Master Input Slave Output SPI serial clock Ground LIN transmit data. Logic level. 4.5.4.3 CAN and LIN connector (J3) The CAN and LIN connector is mounted on all three boards, but LIN is supported only on the FRDMFS6522LAEVB. Table 9. CAN & LINconnector (J3) Pin number Connection Description 1 CANH Connects to the CANH bus line 2 CANL Connects to CANL bus line 3 LIN 4 GND Connects to the LIN bus Connects to ground 4.5.4.4 Debug connector (J9_FRDM) The debug connector provides access to DBG as well as FS1b and reset. Table 10. USB connector (J33) Pin number Connection 1 Not Connected 2 Not Connected 3 FS1b 4 P3V3_KL25Z 5 Not Connected 6 Not Connected 7 Not Connected 8 P3V3_KL25Z FS4500/FS6500 evaluation boards User guide Description Fail-safe 1 3.3V KL25Z supply 3.3V KL25Z supply All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 13 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG Pin number Connection Description 9 Not Connected 10 Not Connected 11 Not Connected 12 GND Connects to ground 13 DBG Debug pin selection 14 GND Connects to ground 15 RSTB Reset, active low 16 Not Connected 4.5.4.5 I/O connector (J1_FRDM) The I/O connector accesses the device under test (DUT) IO and VKAM signals. Table 11. I/O connector (J1_FRDM) Pin number Connection 1 Vkam_IO5 2 Not Connected 3 Not Connected 4 Not Connected 5 Key 6 Not Connected 7 IO_2 8 Not Connected 9 IO_3 10 Not Connected 11 IO_4 12 Not Connected 13 Not Connected 14 Not Connected 15 Not Connected 16 Not Connected Description Keep alive memory voltage Ignition signal Input/Output 2 Input/Output 3 Input/Output 4 4.5.4.6 Power supply connector (J2) The power supply connector (J2) connects any of the SBC regulators to an external load or board for evaluation purposes. Table 12. Power supply connector (J2) Pin number Connection 1 VCCA VCCA output voltage 2 GND Ground FS4500/FS6500 evaluation boards User guide Description All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 14 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG Pin number Connection Description 3 VAUX VAUX auxiliary voltage regulator 4 GND Ground 5 VCORE 6 GND Ground 7 VPRE VPRE regulator output regulator 8 GND Ground VCORE voltage output 4.5.4.7 KL25Z ADC inputs (J10_FRDM) The KL25Z ADCconnector (J10_FRDM) connects the FS6500 regulator outputs to the ADCs on the KL25Z. The regulator values can then be measured and displayed in FlexGUI. Table 13. KL25Z Analog regulator inputs (J10_FRDM) Pin number FRDM Signal 1 Vkam_IO5 2 VCORE 3 RXL LIN receiver data. Logic level. 4 VAUX VAUX auxiliary voltage regulator, connected to KL25 ADC0_SE9 5 VDDIO 6 VCCA 7 Not connected 8 CAN_5V 9 Not connected 10 MUX_OUT 11 TXC 12 Not connected FS4500/FS6500 evaluation boards User guide Description Keep alive memory voltage, connected to KL25 ADC0_SE0 VCORE voltage output, connected to KL25 ADC0_SE8 Reference voltage for IOs, connected to KL25 ADC0_SE3 VCCA output voltage, connected to KL25 ADC0_SE12 CAN voltage regulator, connected to KL25 ADC0_SE13 Multiplexer output CAN transmit data. Logic level. All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 15 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG 4.5.5 Switches . aaa-025548 Figure 8. Switches Table 14. SW1 Position Function A GND Connection between Key input and ground B Vsup3 Connection between Key input and Vsup3 FS4500/FS6500 evaluation boards User guide Description All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 16 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG 5 Board default settings 5.1 VCCA and VAUX setting VCCA and VAUX are set by default, respectively to 3.3 V and 5.0 V. It’s possible to change that by modifying R26 or R27 (whichever is populated) according to Figure 9. . aaa-025549 Figure 9. VCCA and VAUX voltage settings The VAUX regulator is always tied to the external PNP transistor aaa-025589 Figure 10. VAUX regulator 5.2 VCORE settings and related configurations 5.2.1 VCORE and F45xx versus FS65xx The FS45xx family of devices only support VCORE LDO (low dropout) voltage regulators. The FS65xx family only supports VCORE DC/DC voltage regulators. The evaluation board circuitry accommodates this discrepancy by implementing a variation of the BOM for each of the two device families. Populating or not populating resistors with some components depends on which device family is in use and determines which network is enabled. For the FS45xx family, the following assembly options must be implemented: • R42: DNP • C8/C9/R4/D3/L2/C5/C7/R2/C11/R5/C17: populated For the FS65xx family, it is the opposite: FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 17 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG • R42: populated • C8/C9/R4/D3/L2/C5/C7/R2/C11/R5/C17: DNP . aaa-025550 Figure 11. VCORE configuration 5.2.2 Compensation network Both LDO and DC/DC voltage regulators use VCORE voltage feedback to control the output voltage (see Figure 12). For FS45xx devices using static (steady-state) LDO regulators, a simple resistor bridge (resistors R3 and R6) determines the feedback voltage. By default, the feedback voltage is 1.3 V. For FS65xx devices using DC/DC voltage regulators, a pair of RC voltage dividers controls the dynamic behavior of the regulator. 5.2.3 FCRBM Resistor Bridge The feedback core bridge monitoring (FCRBM) Resistor Bridge is an evaluation board safety feature. The bridge generates the same voltage as the bridge connected to the FB_core pin. If the difference between the two voltages is greater than the VCORE_FB_DRIFT value, the FS state machine is impacted (refer to data sheet). The drift value is set to 1.3V by default. FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 18 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG . aaa-025552 Figure 12. FCRBM Resistor Bridge 5.2.4 MCU analog input To assure the complete isolation of analog signals connected from an external component to the MCU, remove input resistance as applicable for the following: • • • • • • • FS4500/FS6500 evaluation boards User guide VPRE tied to MCU through R83 VCORE tied to MCU through R98 VAUX tied to MCU through R90 VCCA tied to MCU through R94 CAN_5V tied to MCU through R80 MUX_OUT tied to MCU through R18 VKAM tied to MCU through R96 All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 19 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG 6 Configuring the EVM 6.1 Connecting the hardware The EVB can be connected to a PC through the FRDM-KL25Z board included with this EVM or any board with an MCU that supports SPI. A power supply with a typical value of 13.5 V must be connected to J1. Regulators can be loaded using J2 connector. In order to use the board with an FRDM-KL25Z, these steps must be followed for the hardware setup: Caution: To avoid damaging the board, the VBAT voltage must not exceed 40 V. 1. With the power switched off, attach the DC power supply to the Phoenix connector (J1) on the evaluation board. 2. A load or an external board can be attached to J2 (not mandatory). 3. Plug the board to an FRDM-KL25Z board. aaa-025553 4. Connect a USB cable from the USB port labeled USBKL25Z on the FRDM-KL25Z board to a USB port on a PC that has the FlexGUI installed. 5. Turn on the DC power supply. Figure 13 illustrates the hardware configuration. FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 20 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG aaa-025554 Figure 13. Evaluation board hardware configuration The software is normally pre-loaded on the KL25Z. For future updates, the procedure for programming the KL25 is described in Section 8 "Appendix A: FRDM-KL25Z software loading". FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 21 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG 7 Software The FRDMFS4503CAEVB/FRDMFS6523CAEVB/FRDMFS6522LAEVB boards must be plugged into a FRDM-KL25Z. Firmware controlling the communication with the FS45xx/FS65xx must be loaded onto the MCU. The procedure for loading the firmware is described in Section 8 "Appendix A: FRDM-KL25Z software loading". The FlexGUI graphical user interface that is installed on a PC serves as the user interface to the evaluation board (Section 9 "Appendix B: Installing the FlexGUI"). When connecting the FRDM-KL25Z board to a PC through a USB cable, the following data exchanges are available: • SPI access (read and write) to FS45xx/FS65xx • ADC readout, connected to regulators – VPRE – VCORE – VAUX – VCCA – CAN_5V – MUX_OUT – VDDIO – VKAM • I/O readout, connected to IO_2 to IO_5 • FS0B/FS1B readout • RSTB readout • CAN generated TX signal • LIN generated TX signal with loopback checking The software bundle also includes an XML file containing register descriptions for the FS45xx or FS65XX (depending on the evaluation board).This file must be installed in order for the GUI to work properly. In addition, an optional Excel file can be created to facilitate setting several registers at a click. FS45xx/FS65xx pre-loaded firmware USB FlexGUI MyRegs.xls FRDM-KL25Z FSxxxx.xml Windows Laptop aaa-025555 Figure 14. Software overview FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 22 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG 7.1 Creating and using a register configuration file Creating an Excel register configuration file allows the user to initialize the evaluation board MCU with a predefined set of register values. To create a register configuration file, do the following: 1. Open a new Excel spreadsheet file and label the first three columns in row 1 hex, registers and comment. Notice that the first two columns —hex and registers— are mandatory. The comment column is optional. 2. In the hex column (column A), enter the data or address to be assigned to each register. The address and data must be contained in two bytes and must be expressed as a hexadecimal value. Enter one row per register. 3. In the registers column (column B), enter the register name associated with the value in the hex column. 4. In the comments column (column C), enter any comments desired. Data in this column is not processed by the FlexGUI. The image below illustrates a typical register configuration file. Mandatory Optional aaa-025557 5. Launch FlexGUI. When FlexGUI opens, click the Load Sequence button to load the register configuration file. FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 23 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG aaa-025556 6. Send the register configuration file to the FS45xx/FS65xx by clicking the Send Sequence button. aaa-025645 7.2 Using the FlexGUI To start the FlexGUI, do the following: 1. Configure the hardware as described in Section 6.1 "Connecting the hardware". 2. To launch the FlexGUI, execute the .bat file created in Section 9 "Appendix B: Installing the FlexGUI" . 7.3 Use case example This example assumes the user has configured the hardware as shown in Figure 13 and put the evaluation board into debug mode by placing a connector on jumper J15 (see Section 6.1). After launching the FlexGUI, the example configures registers to disable IO_23_FS safety mode, disable the watchdog and release the FSx pins. FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 24 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG • Create an Excel file configured as shown in Table 15. For details on creating an Excel register configuration file, see Section 7.1 "Creating and using a register configuration file" Table 15. Use case register configuration Excel file example HEX Registers Comment C465 BIST D60C SF_OUTPUT_REQUEST CB0C INIT_FSSM 8900 INIT_INT D34D WD_refresh_0 1st Watchdog refresh answer D29B WD_refresh_1 2nd Watchdog refresh answer D237 WD_refresh_2 3rd Watchdog refresh answer D26E WD_refresh_3 4th Watchdog refresh answer D2DC WD_refresh_4 5th Watchdog refresh answer D2B9 WD_refresh_5 6th Watchdog refresh answer D372 WD_refresh_6 7th Watchdog refresh answer D4A7 RELEASE_FSxB Execute ABIST2_VAUX and ABIST2_FS1B Close S1 switch between VPRE and VPU_FS to enable FS1B pull up IO_23_FS Disabled Close main machine initialization sequence Release FS0B & FS1B pins • To use the register configuration file, open FlexGUI, then load the register configuration file and send it to the evaluation board . • FlexGUI can now be used to read or write any authorized registers. Below is an example of registers contents: aaa-025558 Get regulators and IO values from IOs tab: FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 25 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG aaa-025559 8 Appendix A: FRDM-KL25Z software loading The quick start package containing the latest firmware can be downloaded from the Downloads tab of the following webpage: http://www.nxp.com/FRDM-KL25Z Software loading for the FRDM-KL25Z consists of the following: • Updating the OpenSDA. • Programming the FRDM-KL25Z 8.1 Updating OpenSDA 1. Press the RST button and connect the USB (the one marked SDA) to the PC. aaa-025593 2. LED D4 will start blinking. 3. Release the RST button. 4. Drag the file FRDM-KL25Z Quick Start Package\OpenSDA Applications/MSDDEBUG-FRDM-KL25Z_Pemicro_v105.SDA and drop it on the KL25Z board icon which appears as a mass storage device on the host PC. FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 26 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG aaa-025594 5. Disconnect the board. 8.2 Programming the FRDM-KL25Z The software bundle for FRDM_FS6500 includes a USBtest3.hex file that programs FRDM-KL25Z with the needed firmware. The procedure is as follows: 1. Connect USB (the one marked SDA). 2. Drag the file FRDM_FS6500_Test_Package\FRDM_KL25Z_Flash\USBtest3.hex and drop it onto the KL25Z board icon that appears as a mass storage device on the host PC. aaa-025595 3. Unplug the mini USB. FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 27 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG 9 Appendix B: Installing the FlexGUI The FlexGUI graphical user interface provides a PC-based interface for accessing the evaluation board and exercising FS45xx/FS65xx functions. The GUI runs on any Windows 8, Windows 7 or Vista operating system. To install the FlexGUI software: 1. Go to the evaluation board tool summary page 2. Under Jump Start Your Design, click on the Get Started with the FRDMFS65xx link. 3. From the list of files that appear, click on the FlexGUI link. The software downloads to the PC and initiates the installation. An installation wizard guides the user through the process. Upon completion, the GUI executable (FlexGUI.exe), and the relevant register description XML file (in this case, FS65xx.xml) are installed on the system. 4. To simplify launching the FlexGUI, create a .bat file with the following commands: C:\Program Files (x86)\FlexGUI\bin\FlexGUI.exe C:\Program Files (x86)\FlexGUI\Sequences&Config\FS65xx.xml FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 28 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG 10 Schematics, board layout and bill of materials Board schematics, board layout and bill of materials are available in the download tab of the Tool summary page for the associated board. See Section 11 "References" for links to the relevant Tool summary pages. FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 29 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG 11 References The following URLs reference related NXP products and application solutions: NXP.com support pages Description URL FS6500-FS4500 Datasheet https://www.nxp.com/webapp/Download? colCode=FS6500-FS4500 AN5238 - Hardware design and Application note product guidelines https://www.nxp.com/webapp/Download? colCode=AN5238 AN4661 - Designing the VCORE Compensation Network Application note http://www.nxp.com/files/analog/doc/ app_note/AN4661.pdf AN4388 - QuadFlat Package (QFP) Application note http://www.nxp.com/files/AN4388.pdf Power dissipation tool (Excel file) Excel file http://www.nxp.com/assets/downloads/ data/en/calculators/FS6500-FS4500-powerdissipation-calculator.xlsx VCORE compensation network simulation board (CNC) Available on demand FMEDA FS6500/FS4500FMEDA Available on demand FS6500-FS4500SMUG FS6500-FS4500SMUG safety manual – User Guide https://www.nxp.com/webapp/Download? colCode=FS6500-%20FS4500SMUG FRDMFS6522LAEVM Tool Summary Page http://www.nxp.com/FRDMFS6522LAEVM FRDMFS6523CAEVM Tool Summary Page http://www.nxp.com/FRDMFS6523CAEVM FRDMFS4503CAEVM Tool Summary Page http://www.nxp.com/FRDMFS4503CAEVM FRDM-KL25Z Tool Summary Page http://www.nxp.com/FRDM-KL25Z FS6500 Product Summary Page http://www.nxp.com/FS6500 FS4500 Product Summary Page http://www.nxp.com/FS4500 Analog home page NXP website http://www.nxp.com/analog 12 Contact information Visit http://www.nxp.com/support for a list of phone numbers within your region. Visit http://www.nxp.com/warranty to submit a request for tool warranty. FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 30 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG 13 Revision history Revision Date 1.0 11/2016 • Initial release 2.0 11/2016 • Removed content, supporting data and external references for FRDMFS6522LAEVM and FRDMFS6522LAEVB in Section 3.1, Section 3.2, Section 3.4, Section 4.1, Table 1, Section 4.2, Section 4.5.4.3, Section 7 and Section 11 • Updated Section 5.1 to reference Figure 9 • Updated Section 7.1, item 4 to reference the image • Updated Section 7.3 referring user to Figure 13 , Section 6.1 and Table 15 • Updated external link found in Section 8 • Updated URL destinations in Section 11 3.0 6/2017 • Updated content to include FRDMFS6522LAEVM 4.0 6/2017 • Minor correction (replaced FRDM-KL43Z by FRDM-KL25Z) in Section 8 FS4500/FS6500 evaluation boards User guide Description of changes All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 31 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG 14 Legal information 14.1 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 14.2 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any FS4500/FS6500 evaluation boards User guide liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Evaluation products — This product is provided on an “as is” and “with all faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates and their suppliers expressly disclaim all warranties, whether express, implied or statutory, including but not limited to the implied warranties of non-infringement, merchantability and fitness for a particular purpose. The entire risk as to the quality, or arising out of the use or performance, of this product remains with customer. In no event shall NXP Semiconductors, its affiliates or their suppliers be liable to customer for any special, indirect, consequential, punitive or incidental damages (including without limitation damages for loss of business, business interruption, loss of use, loss of data or information, and the like) arising out the use of or inability to use the product, whether or not based on tort (including negligence), strict liability, breach of contract, breach of warranty or any other theory, even if advised of the possibility of such damages. Notwithstanding any damages that customer might incur for any reason whatsoever (including without limitation, all damages referenced above and all direct or general damages), the entire liability of NXP Semiconductors, its affiliates and their suppliers and customer’s exclusive remedy for all of the foregoing shall be limited to actual damages incurred by customer based on reasonable reliance up to the greater of the amount actually paid by customer for the product or five dollars (US$5.00). The foregoing limitations, exclusions and disclaimers shall apply to the maximum extent permitted by applicable law, even if any remedy fails of its essential purpose. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 14.3 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. NXP — is a trademark of NXP B.V. All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 32 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG Tables Tab. 1. Tab. 2. Tab. 3. Tab. 4. Tab. 5. Tab. 6. Tab. 7. Tab. 8. EVMs supporting the FS45xx/FS65xx family .....5 FS45xx/FS65xxfeatures .................................... 7 Board description .............................................. 8 LEDs ..................................................................9 Jumper definitions ........................................... 10 Test point definitions ....................................... 11 VBAT Phoenix connector (J1) .........................12 SPI connector (J2_FRDM) .............................. 12 Tab. 9. Tab. 10. Tab. 11. Tab. 12. Tab. 13. Tab. 14. Tab. 15. CAN & LINconnector (J3) ............................... 13 USB connector (J33) .......................................13 I/O connector (J1_FRDM) ............................... 14 Power supply connector (J2) ...........................14 KL25Z Analog regulator inputs (J10_FRDM) ... 15 SW1 .................................................................16 Use case register configuration Excel file example ........................................................... 25 Fig. 8. Fig. 9. Fig. 10. Fig. 11. Fig. 12. Fig. 13. Fig. 14. Switches .......................................................... 16 VCCA and VAUX voltage settings ...................17 VAUX regulator ............................................... 17 VCORE configuration ...................................... 18 FCRBM Resistor Bridge ..................................19 Evaluation board hardware configuration ........ 21 Software overview ........................................... 22 Figures Fig. 1. Fig. 2. Fig. 3. Fig. 4. Fig. 5. Fig. 6. Fig. 7. FRDMFS6523CAEVM .......................................1 FRDMFS65/FRDMFS45 block diagram ............ 6 Evaluation board description ............................. 8 LEDs ..................................................................9 Jumpers ...........................................................10 Test points .......................................................11 Connectors ...................................................... 12 FS4500/FS6500 evaluation boards User guide All information provided in this document is subject to legal disclaimers. Rev. 4.0 — 12 June 2017 © NXP B.V. 2017. All rights reserved. 33 / 34 NXP Semiconductors FS4500/FS6500 evaluation boards KTFRDMFS4500-FS6500EVMUG Contents 1 2 3 3.1 3.2 3.3 3.4 4 4.1 4.2 4.3 4.4 4.5 4.5.1 4.5.2 4.5.3 4.5.4 4.5.4.1 4.5.4.2 4.5.4.3 4.5.4.4 4.5.4.5 4.5.4.6 4.5.4.7 4.5.5 5 5.1 5.2 5.2.1 5.2.2 5.2.3 5.2.4 6 6.1 7 7.1 7.2 7.3 8 8.1 8.2 9 10 11 12 13 14 FRDMFS4503CAEVM, FRDMFS6523CAEVM and FRDMFS6522LAEVM evaluation boards ........... 1 Important notice .................................................. 2 Getting started .................................................... 3 Jump start ..........................................................3 Kit contents/packing list ..................................... 3 Required equipment .......................................... 3 EVM overview ....................................................4 Board description ............................................... 5 Board overview ..................................................5 Board features ................................................... 5 Block diagram ....................................................6 Device features ..................................................7 Getting to know the hardware ........................... 7 LED display ....................................................... 9 Jumper definitions ............................................10 Test point definitions ........................................10 Connectors .......................................................11 VBAT connector (J1) ....................................... 12 SPI connector (J2_FRDM) .............................. 12 CAN and LIN connector (J3) ........................... 13 Debug connector (J9_FRDM) ..........................13 I/O connector (J1_FRDM) ............................... 14 Power supply connector (J2) ........................... 14 KL25Z ADC inputs (J10_FRDM) ..................... 15 Switches ...........................................................16 Board default settings ...................................... 17 VCCA and VAUX setting ................................. 17 VCORE settings and related configurations .....17 VCORE and F45xx versus FS65xx ................. 17 Compensation network .................................... 18 FCRBM Resistor Bridge .................................. 18 MCU analog input ............................................19 Configuring the EVM ........................................ 20 Connecting the hardware ................................ 20 Software ............................................................. 22 Creating and using a register configuration file .................................................................... 23 Using the FlexGUI ........................................... 24 Use case example ...........................................24 Appendix A: FRDM-KL25Z software loading ...26 Updating OpenSDA ......................................... 26 Programming the FRDM-KL25Z ...................... 27 Appendix B: Installing the FlexGUI ................. 28 Schematics, board layout and bill of materials .............................................................29 References ......................................................... 30 Contact information .......................................... 30 Revision history ................................................ 31 Legal information .............................................. 32 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section 'Legal information'. © NXP B.V. 2017. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 12 June 2017