T11
941
LD6805 series
SO
Low-dropout regulators, high PSRR, 150 mA
Rev. 2 — 25 June 2012
Product data sheet
1. Product profile
1.1 General description
The LD6805 series is a small-size Low DropOut regulator (LDO) family with ultra high
Power Supply Rejection Ratio (PSRR) of 75 dB. The voltage drop is 250 mV at 150 mA
current rating.
Operating voltages can range from 2.3 V to 5.5 V. The devices are available with fixed
output voltages between 1.2 V to 3.6 V.
The LD6805K/xxH devices show a high-ohmic state at the output pin when set to disabled
mode. The LD6805K/xxP devices contain a pull-down switching transistor to provide a
low-ohmic output state (auto discharge function) in disabled mode.
The LD6805 series devices are available in a 1 1 mm DFN plastic package making them
ideal for use in portable applications requiring component miniaturization. All devices are
manufactured in monolithic silicon technology.
1.2 Features and benefits
150 mA output current rating
75 dB PSRR at 1 kHz
Input voltage range 2.3 V to 5.5 V
Fixed output voltage between 1.2 V to 3.6 V
Dropout voltage 250 mV at 150 mA output rating
Low quiescent current in shutdown mode (typical 0.1 A)
40 V RMS output noise voltage (typical value) at 10 Hz to 100 kHz
Turn-on time 150 s
LD6805K/xxH: high-ohmic (3-state) output state when disabled
LD6805K/xxP: low-ohmic output state when disabled (auto discharge function)
Integrated ESD protection up to 6 kV Human Body Model (HBM)
DFN1010C-4 (SOT1194-1) plastic package with a size of 1 1 0.55 mm
Pb-free, RoHS compliant and free of halogen and antimony (dark green compliant)
1.3 Applications
Analog and digital interfaces requiring lower than standard supply voltages in mobile
appliances such as smart phones, mobile phone handsets and cordless telephones.
Other typical applications are digital still cameras, mobile internet devices, personal
navigation devices and portable media players.
LD6805 series
NXP Semiconductors
Low-dropout regulators, high PSRR, 150 mA
2. Pinning information
2.1 Pinning
LD6805
IN
4
3
EN
OUT
1
2
GND
001aan948
Transparent top view
Fig 1.
Pin configuration for DFN1010C-4 (SOT1194-1)
2.2 Pin description
Table 1.
Pin description for DFN1010C-4 (SOT1194-1)
Symbol
Pin
Description
OUT
1
regulator output voltage
GND
2
supply ground
EN
3
device enable input; active HIGH
IN
4
regulator input voltage
i.c.
TAB
internal connected[1]
[1]
The TAB is GND level (it is placed on the reverse side of the IC).
It is recommended to connect the TAB to GND. Leaving it unconnected is also allowed but it may result in
lower thermal performance.
3. Ordering information
Table 2.
Ordering information
Type number
LD6805 series
LD6805_SER
Product data sheet
Package
Name
Description
Version
DFN1010C-4
plastic thermal enhanced ultra thin small outline package;
no leads; 4 terminals; body 1 1 0.55 mm
SOT1194-1
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LD6805 series
NXP Semiconductors
Low-dropout regulators, high PSRR, 150 mA
3.1 Ordering options
Further information on output voltage is available on request; see Section 20 “Contact
information”.
Table 3.
Type number
Nominal output
voltage
Type number
Nominal output
voltage
LD6805K/12H
1.2 V
LD6805K/22H
2.2 V
LD6805K/13H
1.3 V
LD6805K/23H
2.3 V
LD6805K/14H
1.4 V
LD6805K/25H
2.5 V
LD6805K/15H
1.5 V
LD6805K/28H
2.8 V
LD6805K/16H
1.6 V
LD6805K/29H
2.9 V
LD6805K/18H
1.8 V
LD6805K/30H
3.0 V
LD6805K/185H
1.85 V
LD6805K/31H
3.1 V
LD6805K/20H
2.0 V
LD6805K/33H
3.3 V
LD6805K/21H
2.1 V
LD6805K/36H
3.6 V
Table 4.
LD6805_SER
Product data sheet
Type number extension of high-ohmic output
Type number extension of pull-down output
Type number
Nominal output
voltage
Type number
Nominal output
voltage
LD6805K/12P
1.2 V
LD6805K/23P
2.3 V
LD6805K/13P
1.3 V
LD6805K/25P
2.5 V
LD6805K/14P
1.4 V
LD6805K/28P
2.8 V
LD6805K/15P
1.5 V
LD6805K/29P
2.9 V
LD6805K/16P
1.6 V
LD6805K/30P
3.0 V
LD6805K/18P
1.8 V
LD6805K/31P
3.1 V
LD6805K/20P
2.0 V
LD6805K/33P
3.3 V
LD6805K/21P
2.1 V
LD6805K/36P
3.6 V
LD6805K/22P
2.2 V
-
-
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LD6805 series
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Low-dropout regulators, high PSRR, 150 mA
4. Block diagram
VIN
VOUT
R1
Vreference
GENERATOR
VEN
OVER CURRENT
PROTECTION
R2
ENABLE SHUT
DOWN CIRCUIT
GND
Fig 2.
001aan755
Block diagram of LD6805K/xxP (auto discharge function)
VIN
VOUT
R1
VEN
Vreference
GENERATOR
OVER CURRENT
PROTECTION
ENABLE SHUT
DOWN CIRCUIT
R2
GND
001aan873
Fig 3.
LD6805_SER
Product data sheet
Block diagram of LD6805K/xxH
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LD6805 series
NXP Semiconductors
Low-dropout regulators, high PSRR, 150 mA
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
VIN
voltage on pin IN
4 ms transient
[1]
Min
Max
Unit
0.5
+6.0
V
Ptot
total power dissipation
-
400
mW
Tstg
storage temperature
55
+150
C
Tj
junction temperature
40
+125
C
Tamb
ambient temperature
C
VESD
electrostatic discharge voltage
40
+85
human body model level 6
[2]
-
6
kV
machine model class 3
[3]
-
400
V
[1]
The (absolute) maximum power dissipation depends on the junction temperature Tj. Higher power dissipation is allowed with lower
ambient temperatures. The conditions to determine the specified values are Tamb = 25 C and the use of a two layer PCB.
[2]
According to IEC 61340-3-1.
[3]
According to JESD22-A115C.
6. Recommended operating conditions
Table 6.
Operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Min
Typ
Max
Unit
Tamb
ambient temperature
Conditions
40
-
+85
C
Tj
junction temperature
-
-
+125
C
voltage on pin IN
2.3
-
5.5
V
voltage on pin EN
0
-
VIN
V
0.7
1.0
-
F
Pin IN
VIN
Pin EN
VEN
Pin OUT
CL(ext)
[1]
[1]
external load capacitance
See Section 10.1 “Output capacitor values”.
7. Thermal characteristics
Table 7.
Thermal characteristics
Symbol
Parameter
Rth(j-a)
thermal resistance from junction to ambient
Conditions
[1][2]
Typ
Unit
250
K/W
[1]
The overall Rth(j-a) can vary depending on the board layout. To minimize the effective Rth(j-a), all pins must have a solid connection to
larger Cu layer areas for example to the power and ground layer. In multi-layer PCB applications, the second layer is used to create a
large heat spreader area directly below the LDO. If this layer is either ground or power, it is connected with several vias to the top layer
connecting to the device ground or supply. Avoid the use of solder-stop varnish under the chip.
[2]
Use the measurement data given for a rough estimation of the Rth(j-a) in your application. The actual Rth(j-a) value can vary in applications
using different layer stacks and layouts.
LD6805_SER
Product data sheet
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LD6805 series
NXP Semiconductors
Low-dropout regulators, high PSRR, 150 mA
8. Characteristics
Table 8.
Electrical characteristics
At recommended input voltages and Tamb = 40 C to +85 C; voltages are referenced to GND (ground = 0 V);
unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Vdo
dropout voltage
IOUT = 150 mA; VIN < VO(nom)
-
250
-
mV
VO
output voltage variation
VOUT < 1.8 V; IOUT = 1 mA
Tamb = +25 C
3
0.5
+3
%
30 C Tamb +85 C
4
-
+4
%
Tamb = +25 C
2
0.5
+2
%
30 C Tamb +85 C
3
-
+3
%
0.1
-
+0.1
%/V
-
0.0025 0.01
%/mA
-
-
150
mA
200
-
-
mA
200
-
-
mA
pin OUT
-
300
-
mA
VEN = 1.1 V; IOUT = 0 mA
-
35
-
A
VEN = 1.1 V; 1 mA IOUT 150 mA
-
150
-
A
VEN 0.4 V
-
0.1
1
A
-
75
-
dB
Output voltage
[1]
VOUT 1.8 V; IOUT = 1 mA
Line regulation error
VO/(VOxVI)
relative output voltage
variation with input voltage
VIN = (VO(nom) + 0.5 V) to 5.5 V
[1]
Load regulation error
VO/(VOxIO)
relative output voltage
variation with output current
1 mA IOUT 150 mA
Output current
IOUT
IOM
current on pin OUT
peak output current
VIN = (VO(nom) + 0.5 V) to 5.5 V
[1]
VO(nom) > 1.8 V;
VOUT = 0.95 VO(nom)
VO(nom) < 1.8 V;
VOUT = 0.9 VO(nom)
Isc
short-circuit current
Regulator quiescent current
Iq
quiescent current
Ripple rejection and output noise
[1]
PSRR
power supply rejection ratio
VIN = VO(nom) + 1.0 V; IOUT = 50 mA;
fripple = 1 kHz
Vn(o)(RMS)
RMS output noise voltage
fripple = 10 Hz to 100 kHz;
CL(ext) = 1 F
-
40
-
V
0
-
0.4
V
1.1
-
5.5
V
-
150
-
s
Enable input and timing
VIL
LOW-level input voltage
pin EN
VIH
HIGH-level input voltage
pin EN
regulator start-up time
VIN = 5.5 V; VOUT = 0.95 VO(nom);
IOUT = 150 mA; CL(ext) = 1 F
tstartup(reg)
LD6805_SER
Product data sheet
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Rev. 2 — 25 June 2012
[1]
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LD6805 series
NXP Semiconductors
Low-dropout regulators, high PSRR, 150 mA
Table 8.
Electrical characteristics …continued
At recommended input voltages and Tamb = 40 C to +85 C; voltages are referenced to GND (ground = 0 V);
unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIN = 5.5 V; VOUT = 0.05 VO(nom);
CL(ext) = 1 F
-
300
-
s
-
100
-
LD6805K/xxP; auto discharge function
tsd(reg)
regulator shutdown time
Rpd
pull-down resistance
[1]
VO(nom) = nominal output voltage (device specific).
9. Dynamic behavior
9.1 Power Supply Rejection Ratio (PSRR)
PSRR stands for the capability of the regulator to suppress unwanted signals on the input
voltage like noise or ripples.
V out ripple
for all frequencies
PSRR dB = 20 log -------------------------V in ripple
018aaa171
0
PSRR
(dB)
-20
-40
(1)
(3)
(4)
-60
-80
102
(2)
103
104
f (Hz)
105
(1) IOUT = 1 mA
(2) IOUT = 50 mA
(3) IOUT = 100 mA
(4) IOUT = 200 mA
Fig 4.
LD6805_SER
Product data sheet
PSRR for LD6805K/18x
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LD6805 series
NXP Semiconductors
Low-dropout regulators, high PSRR, 150 mA
9.2 Dropout
The dropout voltage is defined as the smallest input to output voltage difference at a
specified load current when the regulator operates within its linear region. This means that
the input voltage is below the nominal output voltage value and the pass transistor works
as a plain resistor.
A small dropout voltage guarantees lower power consumption and efficiency
maximization.
018aaa172
400
Vdo
(mV)
300
(1)
(2)
200
(3)
100
0
0
40
80
120
160
200
IOUT (mA)
(1) Tamb = +85 C
(2) Tamb = +25 C
(3) Tamb = 40 C
Fig 5.
LD6805_SER
Product data sheet
Dropout voltage as a function of output current for LD6805K/25x
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LD6805 series
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Low-dropout regulators, high PSRR, 150 mA
9.3 Accuracy
The LD6805 series guarantees high accuracy of the nominal output voltage.
018aaa173
2.52
VOUT
(V)
2.51
(1)
(2)
2.50
(3)
(4)
2.49
2.48
-60
-20
20
60
100
140
Tamb (°C)
(1) IOUT = 1 mA
(2) IOUT = 100 mA
(3) IOUT = 150 mA
(4) IOUT = 200 mA
Fig 6.
Accuracy for LD6805K/25x
10. Application information
10.1 Output capacitor values
The LD6805 series requires external capacitors at the output to guarantee a stable
regulator behavior. Also an input capacitor is recommended to keep the input voltage
stable. It is not allowed to under-run the specified minimum Equivalent Series
Resistance (ESR).
The absolute value of the total capacitance attached to the output pin OUT influences the
shutdown time (tsd(reg)) of the LD6805 series.
Table 9.
External load capacitor
Symbol
Parameter
CL(ext)
external load capacitance
ESR
equivalent series resistance
[1]
LD6805_SER
Product data sheet
Conditions
[1]
Min
Typ
Max
Unit
-
1.0
-
F
5
-
500
m
The minimum value of capacitance for stability and correct operation is 0.7 F. The specified capacitor
tolerance is 30 % or better over the temperature and operating conditions range. The recommended
capacitor type is X7R to meet the full device temperature specification of 40 C to +125 C.
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LD6805 series
NXP Semiconductors
Low-dropout regulators, high PSRR, 150 mA
IN
IN
OUT
EN
GND
1μF
OUT
1μF
001aan647
Fig 7.
Application diagram
11. Test information
11.1 Quality information
This product has been qualified in accordance with NX2-00001 NXP Semiconductors
Quality and Reliability Specification and is suitable for use in consumer applications.
12. Marking
Table 10.
Type number
Voltage
Version
code
Type number
Voltage
Version
code
LD6805K/12H
1.2 V
AH
LD6805K/22H
2.2 V
KH
LD6805K/13H
1.3 V
BH
LD6805K/23H
2.3 V
LH
LD6805K/14H
1.4 V
CH
LD6805K/25H
2.5 V
NH
LD6805K/15H
1.5 V
DH
LD6805K/28H
2.8 V
QH
LD6805K/16H
1.6 V
EH
LD6805K/29H
2.9 V
RH
LD6805K/18H
1.8 V
GH
LD6805K/30H
3.0 V
SH
LD6805K/185H
1.85 V
5H
LD6805K/31H
3.1 V
TH
LD6805K/20H
2.0 V
IH
LD6805K/33H
3.3 V
VH
LD6805K/21H
2.1 V
JH
LD6805K/36H
3.6 V
YH
Table 11.
LD6805_SER
Product data sheet
Marking of high-ohmic output
Marking of pull-down output
Type number
Voltage
Version
code
Type number
Voltage
Version
code
LD6805K/12P
1.2 V
AP
LD6805K/23P
2.3 V
LP
LD6805K/13P
1.3 V
BP
LD6805K/25P
2.5 V
NP
LD6805K/14P
1.4 V
CP
LD6805K/28P
2.8 V
QP
LD6805K/15P
1.5 V
DP
LD6805K/29P
2.9 V
RP
LD6805K/16P
1.6 V
EP
LD6805K/30P
3.0 V
SP
LD6805K/18P
1.8 V
GP
LD6805K/31P
3.1 V
TP
LD6805K/20P
2.0 V
IP
LD6805K/33P
3.3 V
VP
LD6805K/21P
2.1 V
JP
LD6805K/36P
3.6 V
YP
LD6805K/22P
2.2 V
KP
-
-
-
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LD6805 series
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Low-dropout regulators, high PSRR, 150 mA
13. Package outline
Plastic thermal enhanced ultra thin small outline package; no leads;
4 terminals; body 1 x 1 x 0.55 mm
SOT1194-1
X
A
B
D
A
E
A1
A3
terminal 1
index area
detail X
e
1
2
C
C A B
C
v
w
b
y1 C
y
E
D
h
h
k
terminal 1
index area
L
4
3
0
1 mm
scale
Dimensions
Unit(1)
mm
A
A1
A3
b
D
Dh
E
Eh
e
max 0.55 0.05 0.152 0.30 1.05 0.53 1.05 0.53
nom
0.25 1.00 0.48 1.00 0.48 0.65
min
0.00 0.05 0.20 0.95 0.43 0.95 0.43
k
L
v
0.1
0.2
0.30
0.25
0.20
w
y
y1
0.05 0.05 0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
References
Outline
version
IEC
JEDEC
JEITA
SOT1194-1
---
---
---
Fig 8.
sot1194-1_po
European
projection
Issue date
11-05-30
12-05-22
Package outline DFN1010C-4 (SOT1194-1)
LD6805_SER
Product data sheet
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Low-dropout regulators, high PSRR, 150 mA
14. Soldering
Footprint information for reflow soldering of HXSON4 package
SOT1194-1
1.2
1.15
0.65
0.25
0.48
45°
1.55
0.5
1.2
1.3
0.025
0.48
Fig 9.
r=
0.05
solder land
solder land plus solder paste
solder paste deposit
solder resist
occupied area
Dimensions in mm
0.2
r=
0.05
Remark:
Stencil of 75 μm is recommended.
sot1194-1_fr
Soldering footprint DFN1010C-4 (SOT1194-1)
LD6805_SER
Product data sheet
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Low-dropout regulators, high PSRR, 150 mA
15. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
15.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
15.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
•
•
•
•
•
•
Board specifications, including the board finish, solder masks and vias
Package footprints, including solder thieves and orientation
The moisture sensitivity level of the packages
Package placement
Inspection and repair
Lead-free soldering versus SnPb soldering
15.3 Wave soldering
Key characteristics in wave soldering are:
• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities
LD6805_SER
Product data sheet
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LD6805 series
NXP Semiconductors
Low-dropout regulators, high PSRR, 150 mA
15.4 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 10) than a SnPb process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 12 and 13
Table 12.
SnPb eutectic process (from J-STD-020C)
Package thickness (mm)
Package reflow temperature (C)
Volume (mm3)
< 350
350
< 2.5
235
220
2.5
220
220
Table 13.
Lead-free process (from J-STD-020C)
Package thickness (mm)
Package reflow temperature (C)
Volume (mm3)
< 350
350 to 2000
> 2000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 10.
LD6805_SER
Product data sheet
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LD6805 series
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Low-dropout regulators, high PSRR, 150 mA
temperature
maximum peak temperature
= MSL limit, damage level
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 10. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
LD6805_SER
Product data sheet
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LD6805 series
NXP Semiconductors
Low-dropout regulators, high PSRR, 150 mA
16. Abbreviations
Table 14.
Abbreviations
Acronym
Description
ESD
ElectroStatic Discharge
HBM
Human Body Model
LDO
Low DropOut
MM
Machine Model
OSP
Organic Solderability Preservation
PCB
Printed-Circuit Board
PSRR
Power Supply Rejection Ratio
RMS
Root Mean Square
RoHS
Restriction of Hazardous Substances
17. References
LD6805_SER
Product data sheet
[1]
IEC 60134 — Rating systems for electronic tubes and valves and analogous
semiconductor devices
[2]
IEC 61340-3-1 — Methods for simulation of electrostatic effects - Human body
model (HBM) electrostatic discharge test waveforms
[3]
JESD22-A115C — Electrostatic discharge (ESD) Sensitivity Testing Machine
Model (MM)
[4]
NX2-00001 — NXP Semiconductors Quality and Reliability Specification
[5]
AN10365 — Surface mount reflow soldering description
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 25 June 2012
© NXP B.V. 2012. All rights reserved.
16 of 20
LD6805 series
NXP Semiconductors
Low-dropout regulators, high PSRR, 150 mA
18. Revision history
Table 15.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
LD6805_SER v.2
20120625
Product data sheet
-
LD6805_SER v.1
-
-
Modifications:
LD6805_SER v.1
LD6805_SER
Product data sheet
•
•
Block diagrams updated
Minor text changes
20110922
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 25 June 2012
© NXP B.V. 2012. All rights reserved.
17 of 20
LD6805 series
NXP Semiconductors
Low-dropout regulators, high PSRR, 150 mA
19. Legal information
19.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
19.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
19.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
LD6805_SER
Product data sheet
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 25 June 2012
© NXP B.V. 2012. All rights reserved.
18 of 20
LD6805 series
NXP Semiconductors
Low-dropout regulators, high PSRR, 150 mA
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
19.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
20. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
LD6805_SER
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 25 June 2012
© NXP B.V. 2012. All rights reserved.
19 of 20
LD6805 series
NXP Semiconductors
Low-dropout regulators, high PSRR, 150 mA
21. Contents
1
1.1
1.2
1.3
2
2.1
2.2
3
3.1
4
5
6
7
8
9
9.1
9.2
9.3
10
10.1
11
11.1
12
13
14
15
15.1
15.2
15.3
15.4
16
17
18
19
19.1
19.2
19.3
19.4
20
21
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended operating conditions. . . . . . . . 5
Thermal characteristics . . . . . . . . . . . . . . . . . . 5
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Dynamic behavior . . . . . . . . . . . . . . . . . . . . . . . 7
Power Supply Rejection Ratio (PSRR). . . . . . . 7
Dropout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Application information. . . . . . . . . . . . . . . . . . . 9
Output capacitor values . . . . . . . . . . . . . . . . . . 9
Test information . . . . . . . . . . . . . . . . . . . . . . . . 10
Quality information . . . . . . . . . . . . . . . . . . . . . 10
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Soldering of SMD packages . . . . . . . . . . . . . . 13
Introduction to soldering . . . . . . . . . . . . . . . . . 13
Wave and reflow soldering . . . . . . . . . . . . . . . 13
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 13
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 14
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17
Legal information. . . . . . . . . . . . . . . . . . . . . . . 18
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Contact information. . . . . . . . . . . . . . . . . . . . . 19
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 25 June 2012
Document identifier: LD6805_SER
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