T11
941
LD6835 series
SO
Low-dropout regulator, high PSRR, 300 mA
Rev. 2 — 20 September 2013
Product data sheet
1. Product profile
1.1 General description
The LD6835 series is a small-size Low-DropOut (LDO) regulator family with a high-Power
Supply Rejection Ratio (PSRR) of 75 dB and a voltage drop of 240 mV at 300 mA current
rating. Operating voltages range from 1.75 V to 5.5 V. The products are available with
fixed nominal output voltages VO(nom) between 1.2 V and 3.6 V.
The LD6835 series products are available in a DFN1010C-4 (SOT1194-1) plastic package
with a size of 1 mm 1 mm 0.55 mm. The devices are ideal for use in portable
applications requiring component miniaturization.
1.2 Features and benefits
High PSRR
Low quiescent current
Soft start with optimized start-up time
Temperature watchdog
Current limiter with foldback circuit
Low standby current in shutdown mode (typical 0.1 A)
Auto discharge or high-ohmic mode for the output state when disabled
DFN1010C-4 (SOT1194-1) plastic package with a size of 1 mm 1 mm 0.55 mm
Pb-free, Restriction of Hazardous Substances (RoHS) compliant, free of halogen and
antimony (Dark Green compliant)
1.3 Applications
Smartphones
Mobile handsets
Digital still cameras
Tablet PCs
Mobile internet devices
Portable media players
1.4 Quick reference data
IO = 300 mA
PSRR = 75 dB at 1 kHz
RMS noise Vn(o)(RMS) = 60 V
at 10 Hz to 100 kHz
tstartup(reg) = 150 s
VI = 1.75 V to 5.5 V
VO = 1.2 V to 3.6 V
Dropout voltage Vdo = 240 mV
at IO = 300 mA
Quiescent current Iq = 35 A
at IO = 0 mA
LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
2. Pinning information
2.1 Pinning
7UDQVSDUHQWWRSYLHZ
Fig 1.
Pin configuration for DFN1010C-4 (SOT1194-1)
2.2 Pin description
Table 1.
Pin description for LD6835 series in DFN1010C-4 (SOT1194-1)
Symbol
Pin
Description
OUT
1
regulator output voltage
GND
2
supply ground
EN
3
device enable input; active HIGH
IN
4
regulator input voltage
i.c.
TAB
internally connected[1]
[1]
The TAB is GND level (It is placed on the reverse side of the IC). It is recommended to connect the TAB to
GND for a good thermal performance. Leaving it unconnected is also allowed.
3. Ordering information
Table 2.
Ordering information
Type
number
Package
LD6835K
DFN1010C-4 plastic thermal enhanced ultra thin small outline
SOT1194-1
(HXSON4)
package; no leads; 4 terminals; body 1 1 0.55 mm
Name
Description
Version
3.1 Ordering options
Further information on output voltage is available on request; see Section 19 “Contact
information”
Table 3.
LD6835_SER
Product data sheet
Type number extension of high-ohmic output
Type number
Nominal output
voltage VO(nom)
Type number
Nominal output
voltage VO(nom)
LD6835K/12H
1.2 V
LD6835K/28H
2.8 V
LD6835K/15H
1.5 V
LD6835K/29H
2.9 V
LD6835K/18H
1.8 V
LD6835K/30H
3.0 V
LD6835K/22H
2.2 V
LD6835K/31H
3.1 V
LD6835K/25H
2.5 V
LD6835K/33H
3.3 V
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Rev. 2 — 20 September 2013
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2 of 23
LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
Table 4.
Type number extension of pull-down output
Type number
Nominal output
voltage VO(nom)
Type number
Nominal output
voltage VO(nom)
LD6835K/12P
1.2 V
LD6835K/285P
2.85 V
LD6835K/15P
1.5 V
LD6835K/29P
2.9 V
LD6835K/18P
1.8 V
LD6835K/30P
3.0 V
LD6835K/22P
2.2 V
LD6835K/31P
3.1 V
LD6835K/25P
2.5 V
LD6835K/33P
3.3 V
LD6835K/28P
2.8 V
-
-
4. Block diagram
9,
9(1
92
9UHIHUHQFH
*(1(5$725
&855(17
3527(&7,21
7(03(5$785(
:$7&+'2*
62)767$57
(1$%/(6+87
'2:1&,5&8,7
DDD
*1'
Fig 2.
LD6835_SER
Product data sheet
Block diagram of LD6835K/xxP (auto discharge function)
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Rev. 2 — 20 September 2013
© NXP B.V. 2013. All rights reserved.
3 of 23
LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
92
9,
9UHIHUHQFH
*(1(5$725
9(1
&855(17
3527(&7,21
7(03(5$785(
:$7&+'2*
62)767$57
(1$%/(6+87
'2:1&,5&8,7
*1'
Fig 3.
DDD
Block diagram of LD6835K/xxH (high-ohmic function)
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol
Parameter
Max
Unit
VI
input voltage
4 ms transient
0.5
+6.0
V
output voltage
4 ms transient
0.5
+6.0
V
VEN
voltage on pin EN
4 ms transient
0.5
+6.0
V
-
400
mW
[1]
Ptot
total power dissipation
Tstg
storage temperature
55
+150
C
Tj
junction temperature
40
+125
C
Tamb
ambient temperature
[1]
Product data sheet
Min
VO
VESD
LD6835_SER
Conditions
electrostatic discharge
voltage
40
+85
C
human body mode
[2]
-
2
kV
machine model
[3]
-
200
V
The (absolute) maximum power dissipation depends on the junction temperature Tj. Higher power
dissipation is allowed with lower ambient temperatures. The conditions to determine the specified values
are Tamb = 25 C and the use of a two-layer Printed-Circuit Board (PCB).
[2]
According to JESD22-A114F.
[3]
According to JESD22-A115C.
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Rev. 2 — 20 September 2013
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LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
6. Recommended operating conditions
Table 6.
Operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Tamb
Tj
Conditions
Min
Max
Unit
ambient temperature
40
+85
C
junction temperature
-
125
C
VI
input voltage
1.75
5.5
V
Cext(IN)
external capacitance on pin IN
1
-
F
voltage on pin EN
0.5
+5.5
V
0.5
VI + 0.3
V
1
-
F
Pin IN
Pin EN
VEN
Pin OUT
output voltage
VO
CL(ext)
[1]
[1]
external load capacitance
See Section 10.1 “Capacitor values”.
7. Thermal characteristics
Table 7.
Thermal characteristics
Symbol Parameter
Rth(j-a)
LD6835_SER
Product data sheet
Conditions
thermal resistance from junction to ambient
[1][2]
Typ
Unit
250
K/W
[1]
The overall Rth(j-a) can vary depending on the board layout. To minimize the effective Rth(j-a), all pins must
have a solid connection to large Cu layer areas for example to the power and ground layer. In multilayer
PCB applications, the second layer should be used to create a large heat spreader area directly below the
LDO. If this layer is either ground or power, it should be connected with several vias to the top layer
connecting to the device ground or supply. Avoid the use of solder-stop varnish under the chip.
[2]
Use the measurement data given for a rough estimation of the Rth(j-a) in your application. The actual Rth(j-a)
value can vary in applications using different layer stacks and layouts.
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Rev. 2 — 20 September 2013
© NXP B.V. 2013. All rights reserved.
5 of 23
LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
8. Characteristics
Table 8.
Electrical characteristics
At recommended input voltages and Tamb = 40 C to +85 C; voltages are referenced to GND (ground = 0 V);
VI = VO(nom) + 1.0 V; output capacitor CL(ext) = 1 F; input capacitor Cext(IN) = 1 F; unless otherwise specified.
Symbol
Parameter
Conditions
Vdo
dropout voltage
IO = 300 mA; VI = VO(nom) 0.1 V
VO
output voltage variation
VO 1.8 V; IO = 1 mA
Min
Typ
Max
Unit
-
240
-
mV
2
0.5
+2
%
3
-
+3
%
Output voltage
[1]
Tamb = +25 C
40 °C Tamb +85 C
[1]
VO < 1.8 V; IO = 1 mA
Tamb = +25 C
3
0.5
+3
%
[1]
4
-
+4
%
VI = (VO(nom) + 0.5 V) to 5.0 V;
IO = 1 mA
[1]
0.1
-
+0.1
%/V
1 mA IO 300 mA
[1]
0.01
0.0025 +0.01
%/mA
300
-
-
mA
-
500
-
mA
-
60
-
mA
-
35
75
A
-
450
-
A
-
0.1
1
A
40 C Tamb +85 C
Line regulation error
VO/(VOVI)
relative output voltage
variation with input voltage
Load regulation error
VO/(VOIO)
relative output voltage
variation with output current
Output current
IO
output current
Iact(fold)
foldback activation current
VO = 0.9 VO(nom)
[1]
Isc
short-circuit current
VO = 0 V
[1]
Regulator quiescent current
quiescent current
Iq
VEN = 1.1 V; IO = 0 mA
VEN = 1.1 V; IO = 300 mA
[1]
VEN 0.4 V
Ripple rejection and output noise
PSRR
Vn(o)(RMS)
power supply rejection ratio
RMS output noise voltage
fripple = 1 kHz; IO = 30 mA
[1]
-
75
-
dB
fripple = 10 Hz to 100 kHz; IO = 10 mA
[1]
-
60
-
V
Enable input and timing
VIL
LOW-level input voltage
pin EN
0
-
0.4
V
VIH
HIGH-level input voltage
pin EN
1.1
-
5.5
V
Ien
enable current
pin EN
-
400
-
nA
tstartup(reg)
regulator start-up time
VO = 0.95 VO(nom); IO = 300 mA
-
150
-
s
-
300
-
s
-
100
-
[2]
LD6835K/xxP auto discharge function
tsd(reg)
regulator shutdown time
Rpd
pull-down resistance
VO = 0.05 VO(nom)
Thermal protection
Tsd
Tsd(hys)
[1]
shutdown temperature
[3]
-
160
-
C
shutdown temperature
hysteresis
[3]
-
20
-
K
Parameter is checked, verified and guaranteed by design.
LD6835_SER
Product data sheet
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Rev. 2 — 20 September 2013
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6 of 23
LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
[2]
VO(nom) = nominal output voltage (devices specific).
[3]
If the device reaches the shutdown temperature, the LDO is disabled. The LDO will restart after the device temperature is decreased to
the shutdown temperature minus the shutdown temperature hysteresis.
9. Dynamic behavior
All results described in this section are based on measurements of types LD6835K/xxx
from the LD6835 product series.
9.1 Dropout
The dropout voltage is defined as the smallest input-to-output voltage difference at a
specified load current when the regulator operates within its linear region with the pass
transistor functioning simply as a resistor. This means that the input voltage is below the
nominal output voltage value.
A small dropout voltage guarantees lower power consumption and maximizes efficiency.
DDD
9GR
P9
7DPE &
7DPE &
7DPE &
,2 P$
VI = 2.9 V; VO(nom) = 3.0 V; CL(ext) = 1 F; Cext(IN) = 1 F
Fig 4.
Dropout voltage as a function of output
current for LD6835K/30x
LD6835_SER
Product data sheet
DDD
9GR
P9
7DPE &
7DPE &
7DPE &
,2 P$
VI = 3.2 V; VO(nom) = 3.3 V; CL(ext) = 1 F; Cext(IN) = 1 F
Fig 5.
Dropout voltage as a function of output
current for LD6835K/33x
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Rev. 2 — 20 September 2013
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LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
9.2 Temperature dependency
DDD
92
9
DDD
92
9
,2
,2
,2
,2
P$
P$
P$
P$
7DPE &
VI = 2.3 V; VO(nom) = 1.2 V; CL(ext) = 1 F; Cext(IN) = 1 F
Fig 6.
,2
,2
,2
,2
Temperature dependency of LD6835K/12x
P$
P$
P$
P$
7DPE &
VI = 4.5 V; VO(nom) = 3.3 V; CL(ext) = 1 F; Cext(IN) = 1 F
Fig 7.
Temperature dependency of LD6835K/33x
9.3 Noise
Output noise voltage of an LDO circuit is given as noise density or RMS output noise
voltage over a defined range of frequencies (10 Hz to 100 kHz). Permanent conditions are
a constant output current and a ripple-free input voltage. The output noise voltage is
generated by the LDO regulator.
DDD
QRLVH
ȝ9¥+]
,2 P$
,2 P$
,2 P$
DDD
QRLVH
ȝ9¥+]
,2
,2
,2
,2
,2
,2
,2
,2 P$
,2 P$
P$
P$
P$
P$
P$
P$
P$
,2 P$
,2 P$
IUHTXHQF\ +]
VI = 4.5 V; VO(nom) = 1.2 V; CL(ext) = 1 F; Cext(IN) = 1 F
Fig 8.
Noise density for LD6835K/12x
LD6835_SER
Product data sheet
I +]
VI = 4.5 V; VO(nom) = 3.3 V; CL(ext) = 1 F; Cext(IN) = 1 F
Fig 9.
Noise density for LD6835K/33x
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LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
9.4 Quiescent current
Quiescent or ground current is the difference between the input and the output current of
the regulator.
DDD
,*1'
ȝ$
7DPE &
7DPE &
7DPE &
,2 P$
VI = 2.3 V; VO(nom) = 1.2 V; CL(ext) = 1 F; Cext(IN) = 1 F
Fig 10. Quiescent current for LD6835K/12x
LD6835_SER
Product data sheet
DDD
,*1'
ȝ$
7DPE &
7DPE &
7DPE &
,2 P$
VI = 4.5 V; VO(nom) = 3.3 V; CL(ext) = 1 F; Cext(IN) = 1 F
Fig 11. Quiescent current for LD6835K/33x
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Rev. 2 — 20 September 2013
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LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
9.5 Line regulation
Line regulation response is the capability of the circuit to maintain the nominal output
voltage while varying the input voltage.
V O 100
Line regulation % V = ---------- --------V I V O
DDD
9,
9
DDD
92
9
(1)
9,
9
92
9
9,
92
W PV
VO(nom) = 1.2 V; IO = 300 mA; tr = tf = 2 s;
CL(ext) = 1 F; Cext(IN) = 1 F
Fig 12. Line regulation for LD6835K/12x
LD6835_SER
Product data sheet
9,
92
W PV
VO(nom) = 3.3 V; IO = 300 mA; tr = tf = 2 s;
CL(ext) = 1 F; Cext(IN) = 1 F
Fig 13. Line regulation for LD6835K/33x
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Rev. 2 — 20 September 2013
© NXP B.V. 2013. All rights reserved.
10 of 23
LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
9.6 Load regulation
Load regulation is the capability of the circuit to maintain the nominal output voltage while
varying the output load current.
V O
------------------ 100
V O nom
Load regulation % mA = ----------------------------------I O
DDD
92
9
(2)
DDD
,2
$
92
9
,2
$
92
,2
W PV
VO(nom) = 1.2 V; IO = 1 mA to 300 mA; tr = tf = 2 s;
CL(ext) = 1 F; Cext(IN) = 1 F
Fig 14. Load regulation for LD6835K/12x
LD6835_SER
Product data sheet
92
,2
W PV
VO(nom) = 3.3 V; IO = 1 mA to 300 mA; tr = tf = 2 s;
CL(ext) = 1 F; Cext(IN) = 1 F
Fig 15. Load regulation for LD6835K/33x
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LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
9.7 Start-up, inrush current
Start-up time defines the time needed for the LDO to achieve 95 % of its typical output
voltage level after activation via the enable pin.
DDD
9,
92
9(1
,2
9
9
,2
$
W PV
VO(nom) = 3.3 V; IO = 300 mA; CL(ext) = 1 F; Cext(IN) = 1 F
Fig 16. Start-up and inrush current for LD6835K/12P
9.8 Power Supply Rejection Ratio (PSRR)
PSRR stands for the capability of the regulator to suppress unwanted signals on the input
voltage like noise or ripples.
V O ripple
PSRR dB = – 20 log ---------------------- for all frequencies.
V I ripple
DDD
3655
G%
,2
,2
,2
,2
,2
P$
P$
P$
P$
P$
,2
,2
,2
,2
,2
,2
I +]
VO(nom) = 1.8 V; CL(ext) = 1 F; Cext(IN) = 1 F
Fig 17.
DDD
3655
G%
PSRR for LD6835K/18x
LD6835_SER
Product data sheet
P$
P$
P$
P$
P$
P$
I +]
VO(nom) = 3.3 V; CL(ext) = 1 F; Cext(IN) = 1 F
Fig 18.
PSRR for LD6835K/33x
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Rev. 2 — 20 September 2013
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LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
10. Application information
10.1 Capacitor values
The LD6835 series requires external capacitors at the output to guarantee a stable
regulator behavior. Also an input capacitor is recommended to keep the input voltage
stable. These capacitors should not violate the specified minimum Equivalent Series
Resistance (ESR).
The absolute value of the total capacitance attached to the output pin OUT influences the
regulator shutdown time (tsd(reg)) of the LD6835 series.
Table 9.
External load capacitor
Symbol
Parameter
Min
Typ
Max
Unit
external capacitance on pin IN
[1]
0.7
1.0
-
F
CL(ext)
external load capacitance
[1]
0.7
1.0
-
F
ESR
equivalent series resistance
5
-
500
m
Cext(IN)
[1]
Conditions
The minimum value of capacitance for stability and correct operation is 0.7 F. The capacitor tolerance
should be 30 % (over the temperature range). The full range of operating conditions for the capacitor in
the application should be considered during device selection to ensure that this minimum capacitance
specification is met. The recommended capacitor type is X7R to meet the full temperature specification of
40 C to +125 C.
IN
IN
OUT
EN
GND
1μF
OUT
1μF
001aan647
Fig 19. Application diagram
11. Test information
11.1 Quality information
This product has been qualified in accordance with NX1-00023 NXP Semiconductors
Quality and Reliability Specification and is suitable for use in consumer applications.
LD6835_SER
Product data sheet
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Rev. 2 — 20 September 2013
© NXP B.V. 2013. All rights reserved.
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LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
12. Marking
7(50,1$/
,1'(;0$5.(5
0$5.,1*&2'(
9(1'25&2'(
DDD
Fig 20. Marking DFN1010C-4 (SOT1194-1)
Table 10.
Type number
Nominal output
voltage VO(nom)
Marking
code
Type number
Nominal output
voltage VO(nom)
Marking
code
LD6835K/12H
1.2 V
AA
LD6835K/28H
2.8 V
QA
LD6835K/15H
1.5 V
DA
LD6835K/29H
2.9 V
RA
LD6835K/18H
1.8 V
GA
LD6835K/30H
3.0 V
SA
LD6835K/22H
2.2 V
KA
LD6835K/31H
3.1 V
TA
LD6835K/25H
2.5 V
NA
LD6835K/33H
3.3 V
VA
Nominal output
voltage VO(nom)
Marking
code
Table 11.
LD6835_SER
Product data sheet
Marking of high-ohmic output
Marking of pull-down output
Type number
Nominal output
voltage VO(nom)
Marking
code
Type number
LD6835K/12P
1.2 V
AB
LD6835K/285P 2.85 V
ZB
LD6835K/15P
1.5 V
DB
LD6835K/29P
2.9 V
RB
LD6835K/18P
1.8 V
GB
LD6835K/30P
3.0 V
SB
LD6835K/22P
2.2 V
KB
LD6835K/31P
3.1 V
TB
LD6835K/25P
2.5 V
NB
LD6835K/33P
3.3 V
VB
LD6835K/28P
2.8 V
QB
-
-
-
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Rev. 2 — 20 September 2013
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LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
13. Package outline
Plastic thermal enhanced ultra thin small outline package; no leads;
4 terminals; body 1 x 1 x 0.55 mm
SOT1194-1
X
A
B
D
A
E
A1
A3
terminal 1
index area
detail X
e
1
2
C
C A B
C
v
w
b
y1 C
y
E
D
h
h
k
terminal 1
index area
L
4
3
0
1 mm
scale
Dimensions
Unit(1)
mm
A
A1
A3
b
D
Dh
E
Eh
e
max 0.55 0.05 0.152 0.30 1.05 0.53 1.05 0.53
nom
0.25 1.00 0.48 1.00 0.48 0.65
min
0.00 0.05 0.20 0.95 0.43 0.95 0.43
k
L
v
0.1
0.2
0.30
0.25
0.20
w
y
y1
0.05 0.05 0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
References
Outline
version
IEC
JEDEC
JEITA
SOT1194-1
---
---
---
sot1194-1_po
European
projection
Issue date
11-05-30
12-05-22
Fig 21. Package outline DFN1010C-4 (SOT1194-1)
LD6835_SER
Product data sheet
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LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
14. Packing information
14.1 Packing methods
Table 12.
Packing methods
Type
number
Package
Description
Orientation 12NC
[1]
ending
Packing
quantity
LD6835K
DFN1010C-4
(SOT1194-1)
2 mm pitch,
8 mm tape and reel
Q1
10000
[1]
115
For further information about orientation, see Section 14.2.
14.2 Carrier tape information
4
4
4
4
GLUHFWLRQRIIHHG
DDD
Fig 22. Carrier tape
Table 13.
LD6835_SER
Product data sheet
Orientations
Orientation
Meaning
Pin 1 location
Q1
quadrant 1
upper left
Q2
quadrant 2
upper right
Q3
quadrant 3
lower left
Q4
quadrant 4
lower right
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 20 September 2013
© NXP B.V. 2013. All rights reserved.
16 of 23
LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
15. Soldering
Footprint information for reflow soldering of HXSON4 package
SOT1194-1
1.2
1.15
0.65
0.25
0.48
45°
1.55
0.5
1.2
1.3
0.025
0.48
r=
0.05
solder land
solder land plus solder paste
solder paste deposit
solder resist
occupied area
Dimensions in mm
0.2
r=
0.05
Remark:
Stencil of 75 μm is recommended.
sot1194-1_fr
Fig 23. Soldering footprint DFN1010C-4 (SOT1194-1)
LD6835_SER
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 20 September 2013
© NXP B.V. 2013. All rights reserved.
17 of 23
LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
16. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
16.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
16.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
•
•
•
•
•
•
Board specifications, including the board finish, solder masks and vias
Package footprints, including solder thieves and orientation
The moisture sensitivity level of the packages
Package placement
Inspection and repair
Lead-free soldering versus SnPb soldering
16.3 Wave soldering
Key characteristics in wave soldering are:
• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities
LD6835_SER
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 20 September 2013
© NXP B.V. 2013. All rights reserved.
18 of 23
LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
16.4 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 24) than a SnPb process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 14 and 15
Table 14.
SnPb eutectic process (from J-STD-020D)
Package thickness (mm)
Package reflow temperature (C)
Volume (mm3)
< 350
350
< 2.5
235
220
2.5
220
220
Table 15.
Lead-free process (from J-STD-020D)
Package thickness (mm)
Package reflow temperature (C)
Volume (mm3)
< 350
350 to 2000
> 2000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 24.
LD6835_SER
Product data sheet
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Rev. 2 — 20 September 2013
© NXP B.V. 2013. All rights reserved.
19 of 23
LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
temperature
maximum peak temperature
= MSL limit, damage level
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 24. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
17. Revision history
Table 16.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
LD6835_SER v.2
20130920
Product data sheet
-
LD6835_SER v.1
-
-
Modifications:
LD6835_SER v.1
LD6835_SER
Product data sheet
•
Data sheet status changed
20130704
Preliminary data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 20 September 2013
© NXP B.V. 2013. All rights reserved.
20 of 23
LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
18. Legal information
18.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
18.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
18.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
LD6835_SER
Product data sheet
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 20 September 2013
© NXP B.V. 2013. All rights reserved.
21 of 23
LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
18.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
19. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
LD6835_SER
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 20 September 2013
© NXP B.V. 2013. All rights reserved.
22 of 23
LD6835 series
NXP Semiconductors
Low-dropout regulator, high PSRR, 300 mA
20. Contents
1
1.1
1.2
1.3
1.4
2
2.1
2.2
3
3.1
4
5
6
7
8
9
9.1
9.2
9.3
9.4
9.5
9.6
9.7
9.8
10
10.1
11
11.1
12
13
14
14.1
14.2
15
16
16.1
16.2
16.3
16.4
17
18
18.1
18.2
18.3
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 5
Thermal characteristics . . . . . . . . . . . . . . . . . . 5
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Dynamic behavior . . . . . . . . . . . . . . . . . . . . . . . 7
Dropout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Temperature dependency . . . . . . . . . . . . . . . . . 8
Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Quiescent current . . . . . . . . . . . . . . . . . . . . . . . 9
Line regulation . . . . . . . . . . . . . . . . . . . . . . . . 10
Load regulation . . . . . . . . . . . . . . . . . . . . . . . . 11
Start-up, inrush current . . . . . . . . . . . . . . . . . . 12
Power Supply Rejection Ratio (PSRR). . . . . . 12
Application information. . . . . . . . . . . . . . . . . . 13
Capacitor values . . . . . . . . . . . . . . . . . . . . . . . 13
Test information . . . . . . . . . . . . . . . . . . . . . . . . 13
Quality information . . . . . . . . . . . . . . . . . . . . . 13
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15
Packing information . . . . . . . . . . . . . . . . . . . . 16
Packing methods . . . . . . . . . . . . . . . . . . . . . . 16
Carrier tape information . . . . . . . . . . . . . . . . . 16
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Soldering of SMD packages . . . . . . . . . . . . . . 18
Introduction to soldering . . . . . . . . . . . . . . . . . 18
Wave and reflow soldering . . . . . . . . . . . . . . . 18
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 18
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 19
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 20
Legal information. . . . . . . . . . . . . . . . . . . . . . . 21
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 21
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
18.4
19
20
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Contact information . . . . . . . . . . . . . . . . . . . . 22
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2013.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 20 September 2013
Document identifier: LD6835_SER
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