MC100ES6535DT

Freescale Semiconductor, Inc. MOTOROLA Order number: MC100ES6535 Rev 2, 05/2004 SEMICONDUCTOR TECHNICAL DATA 3.3V LVCMOS to LVPECL 1:4 Fanout Buffer MC100ES6535 The MC100ES6535 is a low skew, high performance 3.3 V 1-to-4 LVCMOS to LVPECL fanout buffer. The ES6535 has two selectable inputs that allow LVCMOS or LVTTL input levels which translate to LVPECL outputs. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/ deassertion of the clock enable pin. The ES6535 is ideal for high performance clock distribution applications. Freescale Semiconductor, Inc... Features • • • • • • • • • 4 differential LVPECL outputs 2 selectable LVCMOS/LVTTL inputs 1 GHz maximum output frequency Translates LVCMOS/LVTTL levels to LVPECL levels 30 ps maximum output skew 190 ps part-to-part skew 3.3 V operating range 20-lead TSSOP package Ambient temperature range -40°C to +85°C DT SUFFIX 20-LEAD TSSOP PACKAGE CASE 948E ORDERING INFORMATION Device D CLK_EN Q LE CLK0 0 Q0 Q0 CLK1 Q2 Q2 CLK_SEL Q3 Q3 Figure 1. Logic Diagram © Motorola, Inc. 2004 MC100ES6535DT TSSOP-20 MC100ES6535DTR2 TSSOP-20 VEE 1 20 Q0 CLK_EN 2 19 Q0 CLK_SEL 3 18 VCC CLK0 4 17 Q1 nc 5 16 Q1 CLK1 6 15 Q2 nc 7 14 Q2 nc 8 13 VCC nc 9 12 Q3 VCC 10 11 Q3 1 Q1 Q1 Package MC100ES6535 Figure 2. 20-Lead Pinout (Top View) For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. MC100ES6535 Freescale Semiconductor, Inc... Table 1. PIN DESCRIPTION a Number Name 1 VEE Power Type Description 2 CLK_EN Input Pullupa 3 CLK_SEL Input Pulldowna Clock select input. When HIGH, selects CLK1 input. When LOW, selects CLK0 input. LVCMOS/LVTTL interface levels 4 CLK0 Input Pulldowna LVCMOS/LVTTL clock input 6 CLK1 Input Pulldowna LVCMOS/LVTTL clock input 5, 7, 8, 9 nc Unused Negative supply pin Synchronizing clock enable. When HIGH, clock outputs follow clock input. When LOW, Q outputs are forced low, Q outputs are forced high. LVCMOS/LVTTL interface levels No connect 10, 13, 18 VCC Power Positive supply pin 11, 12 Q3, Q3 Output LVPECL differential output pair 14, 15 Q2, Q2 Output LVPECL differential output pair 16, 17 Q1, Q1 Output LVPECL differential output pair 19, 20 Q0, Q0 Output LVPECL differential output pair Pullup and Pulldown refer to internal input resistors. Table 2. CONTROL INPUT FUNCTION TABLEa Inputs a Outputs CLK_EN CLK_SEL Selected Source Q0:Q3 Q0:Q3 0 0 CLK0 Disabled; LOW Disabled; HIGH 0 1 CLK1 Disabled; LOW Disabled; HIGH 1 0 CLK0 Enabled Enabled 1 1 CLK1 Enabled Enabled After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge. In the active mode, the state of the outputs are a function of the CLK0 and CLK1 inputs as described in Table 3. Table 3. CLOCK INPUT FUNCTION TABLE Inputs Outputs CLK0 or CLK1 Q0:Q3 Q0:Q3 0 LOW HIGH 1 HIGH LOW MOTOROLA 2 For More Information On This Product, Go to: www.freescale.com TIMING SOLUTIONS Freescale Semiconductor, Inc. MC100ES6535 Table 4. GENERAL SPECIFICATIONS Characteristics Value Internal Input Pulldown Resistor 75 kΩ Internal Input Pullup Resistor 75 kΩ Human Body Model ESD Protection θJA Thermal Resistance (Junction-to-Ambient) Machine Model 4000 V 200 V 0 LFPM, 20 TSSOP 140°C/W 500 LFPM, 20 TSSOP 100°C/W Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Table 5. ABSOLUTE MAXIMUM RATINGSa Freescale Semiconductor, Inc... Symbol Rating Conditions Rating Units Difference between VCC & VEE 3.9 V VCC - VEE ≤ 3.6 V VCC + 0.3 V VEE - 0.3 V Continuous 50 mA Surge 100 mA Operating Temperature Range -40 to +85 °C Storage Temperature Range -65 to +150 °C VSUPPLY Power Supply Voltage VIN Input Voltage Output Current Iout TA Tstore a Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated conditions is not implied. Table 6. DC CHARACTERISTICS (VCC = 3.135 V to 3.8 V; VEE = 0 V) –40°C Symbol a Characteristic Min Typ 0°C to 85°C Max Min Typ 35 Max Unit 45 mA IEE Power Supply Current VOHa Output HIGH Voltage VCC –1150 VCC –1020 VCC –750 mV VOL Output LOW Voltage VCC –1950 VCC –1620 VCC –1250 VCC –2000 VCC –1680 VCC –1300 mV VCC –800 VCC –1200 VCC –970 Outputs are terminated through a 50Ω resistor to VCC-2 volts. Table 7. LVTTL / LVCMOS INPUT DC CHARACTERISTICS (VCC = 3.135 V to 3.8 V) -40°C Symbol IIN Characteristic Input Current VIK Input Clamp Voltage VIH Input HIGH Voltage VIL Input LOW Voltage TIMING SOLUTIONS Condition Min Typ 0°C to 85°C Max Min Typ Max Unit VIN = VCC ±150 ±150 µA IIN = -18 mA -1.2 -1.2 V VCC+0.3 V 0.8 V VCC+0.3 2.0 2.0 0.8 3 For More Information On This Product, Go to: www.freescale.com MOTOROLA Freescale Semiconductor, Inc. MC100ES6535 Table 8. AC CHARACTERISTICS (VCC = 3.135 V to 3.8 V, VEE = 0 V) –40°C Symbol Characteristic Min fmax Maximum Toggle Frequency tPD Propagation Delay to Output Differential tSKEW tJITTER VoutPP Freescale Semiconductor, Inc... tr/tf Skew Typ Min Typ 85°C Max 1 150 350 Typ 1 500 20 Min 175 200 600 ps 30 ps ps RMS (1σ) 1 1 1 ps 50 750 350 400 Q 750 50 20 GHz 190 350 30 380 1 190 Output Peak-to-Peak Voltage 20 550 Unit 190 Output Rise/Fall Time (20%–80% @ 50 MHz) 30 360 Max Part-to-Part Output-to-Output Cycle-to-Cycle Jitter 25°C Max 350 400 50 750 mV 400 ps D Receiver Device Driver Device Qb Db 50 Ω 50 Ω V TT Figure 3. Typical Termination for Output Driver and Device Evaluation MOTOROLA 4 For More Information On This Product, Go to: www.freescale.com TIMING SOLUTIONS Freescale Semiconductor, Inc. MC100ES6535 OUTLINE DIMENSIONS TSSOP-20 DT SUFFIX 20-LEAD TSSOP PACKAGE CASE 948E-02 ISSUE A 20X 0.15 (0.006) T U K REF 0.10 (0.004) S M T U S V S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND BE ARE TO BE DETERMINED AT DATUM PLANE -W-. K K1 2X L/2 20 11 B -U- L Freescale Semiconductor, Inc... PIN 1 IDENT J J1 SECTION N-N 10 0.25 (0.010) N 0.15 (0.006) T U S M A -VN F DETAIL E -W- C D 0.100 (0.004) –T– TIMING SOLUTIONS G H DETAIL E SEATING PLANE 5 For More Information On This Product, Go to: www.freescale.com DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 --1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0˚ 8˚ INCHES MIN MAX 0.252 0.260 0.169 0.177 0.047 --0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 8˚ 0˚ MOTOROLA Freescale Semiconductor, Inc. MC100ES6535 Freescale Semiconductor, Inc... NOTES MOTOROLA 6 For More Information On This Product, Go to: www.freescale.com TIMING SOLUTIONS Freescale Semiconductor, Inc. MC100ES6535 Freescale Semiconductor, Inc... NOTES TIMING SOLUTIONS 7 For More Information On This Product, Go to: www.freescale.com MOTOROLA Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... 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