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MC13224V

MC13224V

  • 厂商:

    NXP(恩智浦)

  • 封装:

    TFLGA145

  • 描述:

    IC RF TxRx + MCU 802.15.4 Zigbee® 2.4GHz 145-TFLGA

  • 数据手册
  • 价格&库存
MC13224V 数据手册
Freescale Semiconductor Technical Data Document Number: MC1322x Rev. 1.3 10/2010 MC1322x Package Information Case 1901-01 99-Pin [9.5X9.5X1.2mm] MC1322x Advanced ZigBee™- Compliant Platform-in-Package (PiP) for the 2.4 GHz IEEE® 802.15.4 Standard Ordering Information Device MC13224V1 MC13224VR2 MC13226V 1 MC13226VR2 1 1 Introduction 1 1 Device Marking Package MC13224V LGA MC13224V LGA MC13226V LGA MC13226V LGA See Table 1 for more details. Contents The MC1322x family is Freescale’s third-generation ZigBee platform which incorporates a complete, low power, 2.4 GHz radio frequency transceiver, 32-bit ARM7 core based MCU, hardware acceleration for both the IEEE 802.15.4 MAC and AES security, and a full set of MCU peripherals into a 99-pin LGA Platform-in-Package (PiP). The MC1322x solution can be used for wireless applications ranging from simple proprietary point-to-point connectivity to complete ZigBee mesh networking. The MC1322x is designed to provide a highly integrated, total solution, with premier processing capabilities and very low power consumption. 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 High Density, Low Component Count, Integrated IEEE 802.15.4 Solution 10 4 Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5 MCU Peripherals . . . . . . . . . . . . . . . . . . . . . . 19 6 Pin Assignments and Connections . . . . . . 28 7 System Electrical Specification . . . . . . . . . 36 8 Developer Environment . . . . . . . . . . . . . . . . 48 9 Mechanical Diagrams (Case 1901-01, non-JEDEC) 51 The MC1322x MCU resources offer superior processing power for ZigBee applications. A full 32-bit ARM7TDMI-S core operates up to 26 MHz. A 128 Kbyte FLASH memory is mirrored into a 96 Kbyte RAM for upper stack and applications software. In addition, an 80 Kbyte ROM is available for boot software, standardized IEEE 802.15.4 MAC and Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. © Freescale Semiconductor, Inc., 2005, 2006, 2007, 2008, 2009, 2010. All rights reserved. communications stack software. A full set of peripherals and Direct Memory Access (DMA) capability for transceiver packet data complement the processor core. The RF radio interface provides for low cost and the high density as shown in Figure 1. An onboard balun along with a TX/RX switch allows direct connection to a single-ended 50-Ω antenna. The integrated PA provides programmable output power typically from -30 dBm to +4 dBm, and the RX LNA provides -96 dBm sensitivity. In addition, separate complementary PA outputs allow use of an external PA and/or an external LNA for extended range applications. The device also has onboard bypass capacitors and crystal load capacitors for the smallest footprint in the industry. All components are integrated into the package except the crystal and antenna. PA BALUN ANALOG TRANSMITTER RF TX/RX SWITCH LNA ANALOG RECEIVER Figure 1. MC1322x RF Radio Interface In addition to the best-in-class MCU performance and power, the MC1322x also provides best-in-class power savings. Typical transmit current is 29 mA and typical receive current is 22 mA with the CPU at 2 MHz operation and even lower with the bus stealing enabled. Onboard power supply regulation is provided for source voltages from 2.0 Vdc to 3.6 Vdc. Numerous low current modes are available to maximize battery life including sleep or restricted performance operation. Applications include, but are not limited to, the following: • Residential and commercial automation — Lighting control — Security — Access control — Heating, ventilation, air-conditioning (HVAC) — Automated meter reading (AMR) • Industrial Control MC1322x Technical Data, Rev. 1.3 2 Freescale Semiconductor • • 1.1 — Asset tracking and monitoring — Homeland security — Process management — Environmental monitoring and control — HVAC — Automated meter reading Health Care — Patient monitoring — Fitness monitoring Consumer — Remote control — Entertainment systems — Cellular phone attach Available Devices The MC1322x family is available as two part numbers. These device types differ only in their ROM contents, all other device hardware, performance, and specifications are identical: • MC13224V - this is the original version and is the generic part type. — The MC13224V is intended for most IEEE 802.15.4 applications including MAC-based, ZigBee-2007 Profile 1, and ZigBee RF4CE targets. — It has a more complete set of peripheral drivers in ROM. • MC13226V - this is a more recent version and is provided specifically for ZigBee-2007 Profile 2 (Pro) applications. Only the onboard ROM image has been changed to optimize ROM usage for the ZigBee Pro profile and maximize the amount of available RAM for application use. — The IEEE MAC/PHY functionality has been streamlined to include only that functionality required by the ZigBee specification. The MAC functionality is 802.15.4 compatible. — For a typical application, up to 20 kbytes more of RAM is available versus the M13224V — Some drivers present in the MC13224 ROM have been removed and these include the ADC, LCDfont, and SSI drivers. These drivers are still available as library functions, but now compile into the RAM space. — The Low Level Component (LLC) functionality has also been streamlined for the ZigBee specification • • NOTE When running the Freescale IEEE 802.15.4 MAC (or a related stack) on the MC1322x platform, neither beaconing or GTS are supported. See the MC1322x Reference Manual (Document No MC1322xRM), for information on using applications on these devices. MC1322x Technical Data, Rev. 1.3 Freescale Semiconductor 3 1.2 Ordering Information Table 1 provides additional details about the MC1322x Table 1. Orderable Parts Details Device Operating Temp Range (TA.) Memory Options Package MC13224V -40° to 105° C LGA MC13224VR2 -40° to 105° C LGA Tape and Reel MC13226V -40° to 105° C LGA MC13226VR2 -40° to 105° C LGA Tape and Reel 2 Description 96KB RAM, Intended for 802.15.4 Standard compliant applications, 128KB Flash Freescale 802.15.4 MAC, and Freescale BeeStack™. 96KB RAM, Intended specifically for Freescale BeeStack™ Pro 128KB Flash applications. Features This section provides a simplified block diagram and highlights MC1322x features. 2.1 Block Diagram Figure 2 shows a simplified block diagram of the MC1322x. 24 MHz (typ) 32.768 KHz (optional) BATTERY DETECT CLOCK & RESET MODULE (CRM) DUAL 12-BIT ADC MODULE RADIO INTERFACE MODULE (RIF) ANALOG TRANSMITTER BALUN RF TX/RX SWITCH ANALOG RECEIVER JTAG/ Nexus DEBUG DIGITAL MODEM TX MODEM RX MODEM 802.15.4 MAC ACCELERATOR (MACA) IEEE 802.15.4 TRANSCEIVER ADVANCED SECURITY MODULE (ASM) MC1322x SPI FLASH MODULE (SPIF) Buck Regulator ANALOG POWER MANAGEMENT & VOLTAGE REGULATION 128KBYTE NON-VOLATILE MEMORY (SERIAL FLASH) ARM7 TDMI-S 32-BIT CPU BUS INTERFACE & MEMORY ARBITRATOR ARM INTERRUPT CONTROLLER (AITC) 96KBYTE SRAM (24K WORDS x 32 BITS) 80KBYTE ROM (20KWORDS x 32 BITS) TIMER MODULE (TMR) (4 Tmr Blocks) UART MODULE (UART0) UART MODULE (UART1) SYNC SERIAL INTERFACE (SSI/i2S) KEYBOARD INTERFACE (KBI) UP TO 64 IO PINS RF OSCILLATOR & CLOCK GENERATION INTER-IC BUS MODULE (I2C) SERIAL PERIPHERAL INTERFACE (SPI) GPIO and IO CONTROL Figure 2. MC1322x Simplified Block Diagram MC1322x Technical Data, Rev. 1.3 4 Freescale Semiconductor 2.2 • • • • • • • • Features Summary IEEE 802.15.4 standard compliant on-chip transceiver/modem — 2.4 GHz ISM Band operation — 16 selectable channels — Programmable transmitter output power (-30 dBm to +4 dBm typical) — World-class receiver sensitivity – < -96 dBm typical receiver sensitivity using DCD mode (3 — tcyc SPI Timing tCYC SPI_SCK tSS_H tSS_SU SPI_SS (slave in) tXX_SU tXX_H SPI_MOSI (slave in) SPI_MISO (master in) tMO,tSO SPI_MOSI (master out) SPI_MISO (slave out) Figure 12. SPI Timing Diagram Table 18 describes the timing requirements for the SPI system. Table 18. SPI Timing Parameter Symbol Min Master SPI_SCK Period tCYC peripheral_ Clk*2 Slave SPI_SCK Period tCYC tSS_SU tSS_H tSI_SU tSI_H tMI_SU tMI_H tMO tSO 10 ns 10 ns 10 ns 10 ns 10 ns 20 ns 0 ns Slave SPI_SS Setup Time Slave SPI_SS Hold Time Slave SPI_MOSI Setup Time Slave SPI_MOSI Hold Time Master SPI_MISO Setup Time Master SPI_MISO Hold Time Master SPI_MOSI Output Time Slave SPI_MISO Output Time (with 15 pf load) Typical 38 Max Unit peripheral_ Clk *256 ns 5 ns 20 ns MC1322x Technical Data, Rev. 1.3 44 Freescale Semiconductor 7.11 I2C Specifications Table 19 describes the timing requirements for the I2C system. The I2C module is driven by the peripheral bus clock (typically max 24 MHz) and the SCL bit clock is generated from a prescaler. The prescaler divide ratio can be programmed from 61,440 to 160 (decimal) which gives a maximum bit clock of 150 kbps. Table 19. I2C Signal DC Specifications (I2C_SDA and I2C_SCL) Parameter Symbol Min Typical Max Unit Input Low Voltage VIL -0.3 - 0.3 VDDINT V Input High Voltage VIH 0.7 VBATT - VBATT + 0.3 V Input hysteresis Vhys 0.06 × VBATT — V Output Low Voltage1 (IOL = 5 mA) VOL 0 - 0.2 VBATT V Input Current (VIN = 0 V or VDDINT) IIN - - ±1 µA Pin capacitance Cin = 250 ns must then be met. This will automatically be the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line tr max + tSU;DAT = 1000 + 250 = 1250 ns (according to the Standard-mode I2C-bus specification) before the SCL line is released. 5 C = total capacitance of one bus line in pF. If mixed with Hs-mode devices, the faster fall-times are allowed. b 2 MC1322x Technical Data, Rev. 1.3 46 Freescale Semiconductor 7.12 FLASH Specifications Table 21. FLASH Characteristics (TA = 25 °C, fref = 24 MHz, unless otherwise noted.) Characteristic Symbol Min Supply voltage for program/erase/read (with directly regulated supply) Vprog/erase 1.70 SPI clock frequency Typical fFCLK Max Unit 1.90 V 13 MHz Read current (13 MHz) 9 15 mA Program and erase current 10 15 mA Standby current 2 10 μA Sector erase duration 75 ms Block erase duration 75 ms Chip erase duration 150 ms Byte program duration 60 μs Program/erase endurance 100,000 Data retention 7.13 tD_ret cycles 100 — years ADC Characteristics Table 22. ADC Electrical Characteristics (Operating) (VBATT, LREG_BK_FB = 3.3 V, TA = 25 °C, fref = 24 MHz, unless otherwise noted.) Characteristic ADC supply current (per ADC) Condition Symbol Min Typical Max Unit Enabled — 2.9 6 mA Disabled — 5 - μA Reference potential, low VREFL VSS — VREFH V Reference potential, high VREFH VREFL — VBATT V Analog input voltage1 VINDC VSS – 0.2 — VDD +0.2 V “Battery” input channel reference voltage 1 1.2 V Maximum electrical operating range, not valid conversion range. MC1322x Technical Data, Rev. 1.3 Freescale Semiconductor 47 Table 23. ADC Timing/Performance Characteristics Characteristic Symbol Condition Min Typ Max Unit Resolution - 12 Bits Effective Resolution 8 Bits Number of input channels ADC conversion clock frequency 8 - fADCCLK Conversion cycles (continuous convert) CCP Conversion time Tconv Analog Input 1 VAIN 300 6 Input Leakage Current Voltage1 - VDD KHz ADCCLK cycles 20 — - μs — — - nA VREFH V VREFL Analog input must be between VREFL + 0.2 and VREFH - 0.2 for valid conversion. 8 Developer Environment The MC1322x family is supported by a full set of hardware/software evaluation and development tools. 8.1 Hardware Development Interfaces The ARM debug environment supports both a JTAG debug interface and an extended capability Nexus interface. 8.1.1 JTAG Hardware Debug Port The JTAG port is the simpler and more common debug port for the ARM core. A standard 20-pin connector as described in Section 6.2.1, “ARM JTAG Interface Connector””, is connected to the TDI, TMS, TCK, TDO, and RTCK signals of the MC1322x. Through the JTAG serial interface, standard debug and development activities such as accessing memory and registers, control of the CPU, download of FLASH memory, and software debug can be accomplished. 8.1.2 A7S Nexus3 (NEX) ARM7 Core Development Interface The development and debug environment of the ARM7TDMI-S core is based on the A7S Nexus3 interface (compliant with a Class 3 device of the IEEE-ISTO 5001 standard for real-time embedded system design). This interface allows expansion of the development features of the JTAG port (through the addition of auxiliary signals, see Section 6.2.2, “Nexus Mictor Interface Connector”). Development features include: • Program Trace via Branch Trace Messaging (BTM). Branch trace messaging displays program flow discontinuities (direct and indirect branches, exceptions, etc.), allowing the development tool to interpolate what transpires between the discontinuities. Thus static code may be traced. MC1322x Technical Data, Rev. 1.3 48 Freescale Semiconductor • • • • • • • • • 8.2 Data Trace via Data Write Messaging (DWM) and Data Read Messaging (DRM). This provides the capability for the development tool to trace reads and/or writes to (selected) internal memory resources. Ownership Trace via Ownership Trace Messaging (OTM). OTM facilitates ownership trace by providing visibility of which process ID or operating system task is activated. An Ownership Trace Message is transmitted when a new process/task is activated, allowing the development tool to trace ownership flow. Run-time access to the memory map via the JTAG port. This allows for enhanced download/upload capabilities Watchpoint Messaging (WPM) via the auxiliary pins Watchpoint Trigger enable of Program and/or Data Trace Messaging Auxiliary interface for higher data input/output Registers for Program Trace, Ownership Trace, Watchpoint Trigger, and Read/Write Access Programmable processor stall function to mitigate message queue overrun risk All features controllable and configurable via the JTAG port Software Development Tools An Integrated Development Environment (IDE) is available to facilitate the development of embedded applications targeting the MC1322x platform. Features of the IDE include: • Project management tools and code editor • Highly optimizing ARM compiler supporting C and C++ • Extensive JTAG and RDI debugger support • Run-time libraries including source code • Relocating ARM assembler • Linker and librarian tools • Debugger with ARM simulator, JTAG support and support for RTOS-aware debugging on hardware • RTOS plug-ins available • Code templates for commonly used code constructs • Sample projects for evaluation boards • User and reference guides, both printed and in PDF format • Context-sensitive online help The IDE is complemented by the BeeKit™ Wireless Connectivity Toolkit. BeeKit is a stand alone software application targeting Windows® operating systems. BeeKit provides a graphical user interface (GUI) in which users can create, modify, save, and update wireless networking solutions. With the solution explorer property list windows, users can set configuration parameters to control the setup and execution behavior of the wireless link within their application. The configuration parameters can be validated inside BeeKit to ensure all values provided are within acceptable ranges prior to generation of a workspace. All this functionality provides a mechanism for developers to configure and validate their network parameters MC1322x Technical Data, Rev. 1.3 Freescale Semiconductor 49 without having to navigate through multiple source files to configure the same parameters. BeeKit supports Freescale’s Simple MAC (SMAC), IEEE 802.15.4-compliant MAC, and the Freescale BeeStack™. 8.3 Development Hardware Several different development modules and kits will be available to allow evaluation of ZigBee and IEEE 802.15.4 applications. The modules will provide capabilities for Coordinator, Router, and End Device nodes. Reference designs will be available for RF design and low power applications including 2-layer and 4-layer PCBs. MC1322x Technical Data, Rev. 1.3 50 Freescale Semiconductor 9 Mechanical Diagrams (Case 1901-01, non-JEDEC) Figure 14. Mechanical Diagram (1 of 2) MC1322x Technical Data, Rev. 1.3 Freescale Semiconductor 51 Figure 15. Mechanical Diagram Bottom View (2 of 2) MC1322x Technical Data, Rev. 1.3 52 Freescale Semiconductor NOTES MC1322x Technical Data, Rev. 1.3 Freescale Semiconductor 53 How to Reach Us: Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen, Germany +44 1296 380 456 (English) +46 8 52200080 (English) +49 89 92103 559 (German) +33 1 69 35 48 48 (French) support@freescale.com Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 15F 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo 153-0064, Japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com Asia/Pacific: Freescale Semiconductor Hong Kong Ltd. Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po, N.T., Hong Kong +800 2666 8080 support.asia@freescale.com For Literature Requests Only: Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1-800-521-6274 or 303-675-2140 Fax: 303-675-2150 LDCForFreescaleSemiconductor@hibbertgroup.com Document Number: MC1322x Rev. 1.3 10/2010 Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”, must be validated for each customer application by customer’s technical experts. Freescale Semiconductor does not convey any license under its patent rights nor the rights of others. Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescale and the Freescale logo are trademarks or registered trademarks of Freescale Semiconductor, Inc. in the U.S. and other countries. All other product or service names are the property of their respective owners. ARM is the registered trademark of ARM Limited. ARM7TDMI-S is the trademark of ARM Limited.© Freescale Semiconductor, Inc. 2006, 2007, 2008, 2009, 2010
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