MC13770FCR2

Freescale Semiconductor Technical Data MC13770/D Rev. 2, 11/2003 MC13770 (Scale 2:1) MC13770 Package Information Plastic Package Case 1345 (QFN-12) Single Band LNA and Mixer FEIC Ordering Information 1 Introduction The MC13770 is a single band front-end IC designed for wireless receiver applications. It contains a low noise LNA and a high linearity mixer. The LNA is integrated with a bypass switch to preserve input intercept performance. The device is fabricated using Freescale's Advanced RF BiCMOS process using the SiGe:C option and is packaged in a 12 pin Quad Flat Non-leaded package. 1.1 • • • • • • • • Device Device Marking Package MC13770FC 770 QFN-12 Contents 1 2 3 4 5 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Specifications . . . . . . . . . . . . . . . . Contact Description . . . . . . . . . . . . . . . . . . . . Applications Information . . . . . . . . . . . . . . . . Packaging Information. . . . . . . . . . . . . . . . . . 1 2 4 4 7 Features RF Input Frequency: 2100 to 2400 MHz LNA Gain = 15 dB (Typ) LNA Input 3rd Order Intercept Point (IIP3) = 0 dBm (Typ) LNA Noise Figure (NF) = 1.5 dB (Typ) Bypass Mode Included for Improved Intercept Point Performance Double Balanced Mixer Mixer Conversion Gain = 10 dB (Typ) Mixer Noise Figure (NF) = 8.0 dB (Typ) Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. © Freescale Semiconductor, Inc., 2003, 2005. All rights reserved. Electrical Specifications • • Mixer Input 3rd Order Intercept Point (IIP3) = -3.0 dBm (Typ) Total Supply Current = 8.0 mA LNA = 3.0 mA Mixer = 5.0 mA LNA Out Mix In LO In+ LO In- IF+ IF- LNA In Bypass Enable Mix Bias Figure 1. Simplified Block Diagram 2 Electrical Specifications Table 1. Maximum Ratings Rating Symbol Value Unit Supply Voltage VCC 3.6 V Storage Temperature Range Tstg -65 to 150 °C TA -40 to 85 °C Operating Temperature Range Note: Maximum Ratings and ESD 1. Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the limits in the Electrical Characteristics tables or Pin Descriptions section. 2. ESD (electrostatic discharge) immunity meets Human Body Model (HBM) ≤100 V and Machine Model (MM) ≤30 V. Additional ESD data available upon request. Table 2. Recommended Operating Conditions Characteristic Symbol Supply Voltage Min Typ Max Unit 2.7 2.75 3.0 Vdc Logic Voltage (Enable and Bypass Pins) V Input High Voltage 0.85 VCC - VCC Input Low Voltage 0 - 0.15 VCC MC13770 Technical Data, Rev. 2 2 Freescale Semiconductor Electrical Specifications Table 3. Electrical Characteristics Characteristic Symbol Turn-on Time Min Typ Max Unit - 100 - ns LNA High Gain Mode (Frequency = 2140 MHz, VCC = 2.75 V, Bypass = 2.75 V, Enable = 2.75 V) LNA Gain - 15 - dB LNA Noise Figure - 1.5 - dB LNA Input IP3 - 0 - dBm - 3.0 - mA LNA Supply Current IDD LNA Low Gain Mode (RF = 2140 MHz, VCC = 2.75 V, Bypass = 0 V, Enable = 2.75 V) LNA Gain - -5.0 - dB LNA Noise Figure - 5.0 - dB LNA Input IP3 - 20 - dBm - 10 - µA LNA Supply Current IDD Mixer Mode (RF = 2140 MHz, LO = 2520 MHz, VCC = 2.75 Vdc, Enable = 2.75 V) Conversion Gain - 10 - dB SSB Noise Figure - 8.0 - dB Input IP3 - -3.0 - dBm Supply Current - 5.0 - mA LO Drive Level - -10 - dBm Note: Tone spacing for IIP3 measurement is 5.0 MHz. Table 4. Truth Table (1 = 2.75 V, 0 = 0 V) Enable Bypass Mode 0 0 Sleep 0 1 Undefined - do not use 1 0 Low Gain 1 1 High Gain MC13770 Technical Data, Rev. 2 Freescale Semiconductor 3 Contact Description 3 Contact Description Table 5. Contact Function Description Pin 4 Symbol Description 1 LNA Out LNA Output 2 Bypass LNA Bypass Control 3 Mix In Mixer Input 4 Enable Chip Enable 5 LO+ Local Oscillator Input + 6 LO- Local Oscillator Input - 7 IF+ Differential IF Output + 8 IF- Differential IF Output - 9 VCC Supply 10 LNA In LNA Input 11 Gnd Ground 12 Mix Bias Mixer Bias Adjustment Applications Information Figure 2 shows the typical application circuit for 2110 to 2140 MHz band. The Mixer input is internally broadband matched. Two typical IF output match circuits are provided in Table 6 on page 5. MC13770 Technical Data, Rev. 2 4 Freescale Semiconductor Applications Information VCC1 C1 33 pF C12 0.5 pF L2 2.7 nH C9 0.01 µF LNA In R1 4.3 k C7 33 pF 12 L1 2.7 nH R2 470 Ω 11 10 C2 33 pF 1 LNA Out 9 C11 1.0 pF VCC2 L3 * 2 Mix In L4 * 8 R3 * Bypass C8 0.01 µF 3 C10 * Mini-Circuits TC8-1 Transformer 8:1 C3 * 7 IF C4 * 4 5 6 C6 33 pF Enable * See Table 6 for values. C5 33 pF LO+ Figure 2. Application Schematic Table 6. Bill of Material for Application Schematic Component 190 MHz IF 380 MHz IF C3 1.2 pF 2.2 pF C4 1.2 pF 2.2 pF C10 1.2 pF 1.2 pF L3 150 nH 39 nH L4 150 nH 39 nH R3 5.0 kΩ 20 kΩ Note: All other components are the same for both configurations. MC13770 Technical Data, Rev. 2 Freescale Semiconductor 5 Applications Information L N A GND Serial No# VCC1 GAIN I N 1 LNA out IF VCC2 MIX in ENABLE MC13770EVK GND V2 LO- LO+ Figure 3. Application PCB (Not to Scale) MC13770 Technical Data, Rev. 2 6 Freescale Semiconductor Packaging Information 5 Packaging Information LASER MARK FOR PIN 1 IDENTIFICATION IN THIS AREA 3 A M 2X 0.1 C G 0.1 C 1.0 1.00 0.8 0.75 3 (0.5) C SEATING PLANE DETAIL G M 0.1 C B 5 (0.24) 0.05 0.00 2X 0.05 C VIEW ROTATED 90° CLOCKWISE 0.1 C A B 1.25 0.95 0.1 M C A B 0.05 M C 12X 0.3 0.18 10 DETAIL M PIN 1 IDENTIFIER 12 EXPOSED DIE ATTACH PAD (1.177) 4X 9 1 1.25 0.95 0.1 C A B 12X 3 7 12X 8X 6 0.75 0.5 (45°) 3X (R0.09) 4X (0.18) DETAIL N N 4 8X 0.065 0.015 CORNER CONFIGURATION 4 0.5 VIEW M-M DETAIL S NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. THE COMPLETE JEDEC DESIGNATOR FOR THIS PACKAGE IS: HF-PQFP-N. 4. CORNER CHAMFER MAY NOT BE PRESENT. DIMENSIONS OF OPTIONAL FEATURES ARE FOR REFERENCE ONLY. 5. COPLANARITY APPLIES TO LEADS, CORNER LEADS, AND DIE ATTACH PAD. (90°) 4X 8X (0.25) 2X 0.39 0.31 (0.777) 2X DETAIL M DETAIL S PIN 1 BACKSIDE IDENTIFIER PIN 1 BACKSIDE IDENTIFIER 0.1 0.0 Figure 4. Outline Dimensions for QFN-12 (Case 1345-01, Issue A) MC13770 Technical Data, Rev. 2 Freescale Semiconductor 7 How to Reach Us: Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen, Germany +44 1296 380 456 (English) +46 8 52200080 (English) +49 89 92103 559 (German) +33 1 69 35 48 48 (French) support@freescale.com Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 15F 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo 153-0064 Japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com Asia/Pacific: Freescale Semiconductor Hong Kong Ltd. Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po, N.T., Hong Kong +800 2666 8080 support.asia@freescale.com For Literature Requests Only: Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1-800-441-2447 or 303-675-2140 Fax: 303-675-2150 LDCForFreescaleSemiconductor@hibbertgroup.com MC13770/D Rev. 2 11/2003 RoHS-compliant and/or Pb- free versions of Freescale products have the functionality and electrical characteristics of their non-RoHS-compliant and/or non-Pb- free counterparts. For further information, see http://www.freescale.com or contact your Freescale sales representative. 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