MC144110DW

Freescale Semiconductor Technical Data MC144110/D Rev. 2, 1/2005 MC144110 MC144110 and MC144111 Package Information P Suffix Plastic DIP Case 707 Package Information DW Suffix SOG Package Case 751D MC144111 Digital-to-Analog Converters with Serial Interface CMOS LSI 1 Package Information P Suffix Plastic DIP Case 646 Introduction The MC144110 and MC144111 are low-cost 6-bit D/A converters with serial interface ports to provide communication with CMOS microprocessors and microcomputers. The MC144110 contains six static D/A converters; the MC144111 contains four converters. Due to a unique feature of these DACs, the user is permitted easy scaling of the analog outputs of a system. Over a 5 to 15 V supply range, these DACs may be directly interfaced to CMOS MPUs operating at 5 V. • • • • • • • • Direct R-2R Network Outputs Buffered Emitter-Follower Outputs Serial Data Input Digital Data Output Facilitates Cascading Direct Interface to CMOS µP Wide Operating Voltage Range: 4.5 to 15 V Wide Operating Temperature Range: 0 to 85°C Software Information is Contained in Document M68HC11RM/AD Package Information DW Suffix SOG Package Case 751G Ordering Information Device Package MC144110P Plastic DIP MC144110DW SOG MC144111P Plastic DIP MC144111DW SOG Contents 1 2 3 4 5 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Electrical Specifications . . . . . . . . . . . . . . . . 4 Switching Characteristics . . . . . . . . . . . . . . . 5 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . 8 Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. © Freescale Semiconductor, Inc., 2005. All rights reserved. Introduction VDD Rn Qn R1 OUT OUT OUT Q1 OUT 2R 2R R R R R R 2R 2R 2R 2R 2R HEX BUFFER (INVERTING) ENB CLK C C * DQ Din HEX LATCH C 6-BIT SHIFT REGISTER D Dout *Transparent Latch Figure 1. Block Diagram MC144110 Technical Data, Rev. 2 2 Freescale Semiconductor Introduction MC144110P Din 1 18 Q1 Out 2 17 R1 Out 3 16 Q2 Out 4 R2 Out MC144110DW Din 1 20 VDD Dout Q1 Out 2 19 Dout R6 Out R1 Out 3 18 R6 Out 15 Q6 Out Q2 Out 4 17 Q6 Out 5 14 R5 Out R2 Out 5 16 R5 Out Q3 Out 6 13 Q5 Out Q3 Out 6 15 Q5 Out R3 Out 7 12 R4 Out R3 Out 7 14 R4 Out ENB 8 11 Q4 Out ENB 8 13 Q4 Out VSS 9 10 CLK VSS 9 12 CLK 10 11 NC VDD NC MC144111P Din 1 14 MC144111DW VDD Din 1 16 VDD 2 15 Dout Q1 Out 2 13 Dout Q1 Out R1 Out 3 12 R4 Out R1 Out 3 14 R4 Out Q2 Out 4 11 Q4 Out Q2 Out 4 13 Q4 Out R2 Out 5 10 R3 Out R2 Out 5 12 R3 Out ENB 6 9 Q3 Out ENB 6 11 Q3 Out 8 CLK VSS 7 10 CLK 8 9 NC VSS 7 NC = No Connection Figure 2. Pin Assignments MC144110 Technical Data, Rev. 2 Freescale Semiconductor 3 Electrical Specifications 2 Electrical Specifications Table 1. Maximum Ratings (Voltages referenced to VSS) Ratings Symbol Value Unit DC Supply Voltage VDD - 0.5 to + 18 V Input Voltage, All Inputs Vin - 0.5 to VDD + 0.5 V I ± 10 mA DC Input Current, per Pin Power Dissipation (Per Output) TA = 70°C MC144110 MC144111 TA = 85°C MC144110 MC144111 POH mW 30 50 10 20 Power Dissipation (Per Package) TA = 70°C MC144110 MC144111 TA = 85°C MC144110 MC144111 PD Storage Temperature Range Tstg mW 100 150 25 50 °C - 65 to + 150 This device contains protection circuitry to guard against damage due to high static voltages or electric fields; however, it is advised that precautions be taken to avoid application of voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation it is recommended that Vin and Vout be constrained to the range VSS ≤ (Vin or Vout) ≤VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Table 2. Electrical Characteristics (Voltages referenced to VSS, TA = 0 to 85°C unless otherwise indicated) Symbol Parameter Test Conditions VDD Min Max Unit VIH High-Level Input Voltage (Din, ENB, CLK) 5 10 15 3.0 3.5 4 - V VIL Low-Level Input Voltage (Din, ENB, CLK) 5 10 15 - 0.8 0.8 0.8 V IOH High-Level Output Current (Dout) Vout = VDD - 0.5 V 5 - 200 - µA IOL Low-Level Output Current (Dout) Vout = 0.5 V 5 200 - µA IDD Quiescent Supply Current Iout = 0 µA 15 15 - 12 8 mA Iin Input Leakage Current (Din, ENB, CLK) Vin = VDD or 0 V 15 - ±1 µA Nonlinearity Voltage (Rn Out) See Figure 3 5 10 15 - 100 200 300 mV Vnonl MC144110 MC144111 MC144110 Technical Data, Rev. 2 4 Freescale Semiconductor Switching Characteristics Table 2. Electrical Characteristics (continued) (Voltages referenced to VSS, TA = 0 to 85°C unless otherwise indicated) Symbol Parameter Test Conditions VDD Min Max Unit 5 10 15 19 39 58 137 274 411 mV - - 1 LSB 15 - 10 µA Vstep Step Size (Rn Out) See Figure 4 Voffset Offset Voltage from VSS Din = $00, See Figure 3 IE Emitter Leakage Current VRn Out = 0 V hFE DC Current Gain IE = 0.1 to 10.0 mA TA = 25°C - 40 - - VBE Base-to-Emitter Voltage Drop IE = 1.0 mA - 0.4 0.7 V 3 Switching Characteristics Table 3. Switching Characteristics (Voltages referenced to VSS, TA = 0 to 85°C, CL = 50 pF, Input tr = tf = 20 ns unless otherwise indicated) Symbol Parameter VDD Min Max Unit twH Positive Pulse Width, CLK (Figures 5 and 6) 5 10 15 2 1.5 1 - µs twL Negative Pulse Width, CLK (Figure 5 and 6) 5 10 15 5 3.5 2 - µs tsu Setup Time, ENB to CLK (Figures 5 and 6) 5 10 15 5 3.5 2 - µs tsu Setup Time, Din to CLK (Figures 5 and 6) 5 10 15 1000 750 500 - ns th Hold Time, CLK to ENB (Figures 5 and 6) 5 10 15 5 3.5 2 - µs th Hold Time, CLK to Din (Figures 5 and 6) 5 10 15 5 3.5 2 - µs tr, tf Input Rise and Fall Times 5 - 15 - 2 µs Cin Input Capacitance 5 - 15 - 7.5 pF MC144110 Technical Data, Rev. 2 Freescale Semiconductor 5 Switching Characteristics OUTPUT VOLTAGE @ Rn Out, % (VDD - VSS) 100 75 Vnonl 50 IDEAL ACTUAL 25 Voffset 0 0 $00 15 $0F 31 $1F 47 $2F 63 $3F PROGRAM STEP LINEARITY ERROR (integral linearity). A measure of how straight a device's transfer function is, it indicates the worst-case deviation of linearity of the actual transfer function from the best-fit straight line. It is normally specified in parts of an LSB. Figure 3. D/A Transfer Function VRn OUT STEP SIZE V DD V DD Step Size = ----------- ± 0.75 ----------64 64 (For any adjacent pair of digital numbers) DIGITAL NUMBER Figure 4. Definition of Step Size MC144110 Technical Data, Rev. 2 6 Freescale Semiconductor Switching Characteristics 50% ENB tsu CLK th 50% C1 C2 twH CN twL Din D1 tsu D2 DN th Figure 5. Serial Input, Positive Clock ENB th tsu C1 CLK C2 twL Din CN twH D1 D2 tsu DN th Figure 6. Serial Input, Negative Clock Table 4. Number of Channels vs Clocks Required Number of Channels Required Number of Clock Cycles 1 6 Q1/R1 Q1/R1 2 12 Q1/R1, Q2/R2 Q1/R1, Q2/R2 3 18 Q1/R1, Q2/R2, Q3/R3 Q1/R1, Q2/R2, Q3/R3 4 24 Q1/R1, Q2/R2, Q3/R3, Q4/R4 Q1/R1, Q2/R2, Q3/R3, Q4/R4 5 30 Q1/R1, Q2/R2, Q3/R3, Q4/R4, Q5/R5 Not Applicable 6 36 Q1/R1, Q2/R2, Q3/R3, Q4/R4, Q5/R5, Q6/R6 Not Applicable Outputs Used on MC144110 Outputs Used on MC144111 MC144110 Technical Data, Rev. 2 Freescale Semiconductor 7 Pin Descriptions 4 4.1 Pin Descriptions INPUTS Din Data Input Six-bit words are entered serially, MSB first, into digital data input, Din. Six words are loaded into the MC144110 during each D/A cycle; four words are loaded into the MC144111. The last 6-bit word shifted in determines the output level of pins Q1 Out and R1 Out. The next-to-last 6-bit word affects pins Q2 Out and R2 Out, etc. ENB Negative Logic Enable The ENB pin must be low (active) during the serial load. On the low-to-high transition of ENB, data contained in the shift register is loaded into the latch. CLK Shift Register Clock Data is shifted into the register on the high-to-low transition of CLK. CLK is fed into the D-input of a transparent latch, which is used for inhibiting the clocking of the shift register when ENB is high. The number of clock cycles required for the MC144110 is usually 36. The MC144111 usually uses 24 cycles. See Table 4 for additional information. 4.2 OUTPUTS Dout Data Output The digital data output is primarily used for cascading the DACs and may be fed into Din of the next stage. R1 Out through Rn Out Resistor Network Outputs These are the R-2R resistor network outputs. These outputs may be fed to high-impedance input FET op amps to bypass the on-chip bipolar transistors. The R value of the resistor network ranges from 7 to 15 kΩ. MC144110 Technical Data, Rev. 2 8 Freescale Semiconductor Pin Descriptions Q1 Out through Qn Out NPN Transistor Outputs Buffered DAC outputs utilize an emitter-follower configuration for current-gain, thereby allowing interface to low-impedance circuits. 4.3 SUPPLY PINS VSS Negative Supply Voltage This pin is usually ground. VDD Positive Supply Voltage The voltage applied to this pin is used to scale the analog output swing from 4.5 to 15 V p-p. MC144110 Technical Data, Rev. 2 Freescale Semiconductor 9 Packaging 5 Packaging NOTES: 1. POSITIONAL TOLERANCE OF LEADS (D). SHALL BE WITHIN 0.25 (0.010) AT MAXIMUM MATERIAL CONDITION, IN RELATION TO SEATING PLANE AND EACH OTHER. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 4. CONTROLLING DIMENSION: INCH. J 18 10 1 9 B L M A C N D F H K SEATING PLANE G INCHES MILLIMETERS MIN MAX MIN MAX 0.875 0.915 22.22 23.24 0.240 0.260 6.10 6.60 0.140 0.180 3.56 4.57 0.014 0.022 0.36 0.56 0.050 0.070 1.27 1.78 0.100 BSC 2.54 BSC 0.040 0.060 1.02 1.52 0.008 0.012 0.20 0.30 0.115 0.135 2.92 3.43 0.300 BSC 7.62 BSC 0˚ 15˚ 0˚ 15˚ 0.020 0.040 0.51 1.02 DIM A B C D F G H J K L M N Figure 7. Outline Dimensions for P SUFFIX, PLASTIC DIP (CASE 707-02, Issue C) 10X PIN NUMBER 10.55 10.05 0.25 M B 2.65 2.35 0.25 0.10 A 20X 1 20 PIN 1 INDEX 0.49 0.35 0.25 6 M T A B 18X 1.27 4 12.95 12.65 A 10 A 11 T SEATING PLANE 20X 7.6 7.4 0.1 T B 5 0.75 0.25 X45˚ 0.32 0.23 1.0 0.4 7˚ 0˚ NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 3. DATUMS A AND B TO BE DETERMINED AT THE PLANE WHERE THE BOTTOM OF THE LEADS EXIT THE PLASTIC BODY. 4. THIS DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURRS. MOLD FLASH, PROTRUSION OR GATE BURRS SHALL NOT EXCEED 0.15mm PER SIDE. THIS DIMENSION IS DETERMINED AT THE PLANE WHERE THE BOTTOM OF THE LEADS EXIT THE PLASTIC BODY. 5. THIS DIMENSION DOES NOT INCLUDE INTER-LEAD FLASH OR PROTRUSIONS. INTER-LEAD FLASH AND PROTRUSIONS SHALL NOT EXCEED 0.25mm PER SIDE. THIS DIMENSION IS DETERMINED AT THE PLANE WHERE THE BOTTOM OF THE LEADS EXIT THE PLASTIC BODY. 6. THIS DIMENSION DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL NOT CAUSE WIDTH TO EXCEED 0.62mm. SECTION A-A Figure 8. Outline Dimensions for DW SUFFIX, SOG (CASE 751D-06, Issue H) MC144110 Technical Data, Rev. 2 10 Freescale Semiconductor Packaging 14 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. 6. 646-06 OBSOLETE, NEW STANDARD 646-07. 8 B 1 7 A F DIM A B C D F G H J K L M N L N C -TSEATING PLANE K H J D 14 PL G (0.005) M INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 --10˚ 0.015 0.040 M Figure 9. Outline Dimensions for P SUFFIX, PLASTIC DIP (CASE 646-07, Issue P) 0.25 8X PIN'S NUMBER M B A 10.55 10.05 2.65 2.35 0.25 0.10 16X 16 1 0.49 0.35 0.25 6 M T A B PIN 1 INDEX 14X 10.45 4 10.15 A A 8 1.27 9 7.6 7.4 T B SEATING PLANE 16X 0.1 T 5 0.75 0.25 X45˚ 0.32 0.23 1.0 0.4 SECTION A-A NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 3. DATUMS A AND B TO BE DETERMINED AT THE PLANE WHERE THE BOTTOM OF THE LEADS EXIT THE PLASTIC BODY. 4. THIS DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURRS. MOLD FLASH, PROTRUSION OR GATE BURRS SHALL NOT EXCEED 0.15mm PER SIDE. THIS DIMENSION IS DETERMINED AT THE PLANE WHERE THE BOTTOM OF THE LEADS EXIT THE PLASTIC BODY. 5. THIS DIMENSION DOES NOT INCLUDE INTER-LEAD FLASH OR PROTRUSIONS. INTER-LEAD FLASH AND PROTRUSIONS SHALL NOT EXCEED 0.25mm PER SIDE. THIS DIMENSION IS DETERMINED AT THE PLANE WHERE THE BOTTOM OF THE LEADS EXIT THE PLASTIC BODY. 6. THIS DIMENSION DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL NOT CAUSE THE LEAD WIDTH TO EXCEED 0.62mm. 7˚ 0˚ Figure 10. Outline Dimensions for DW SUFFIX, SOG (CASE 751G-04, Issue D) MC144110 Technical Data, Rev. 2 Freescale Semiconductor 11 How to Reach Us: Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. 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