NXP Semiconductors
Data Sheet: Advance Information
Document Number: CM0902
Rev. 4.0, 8/2016
Dual high-speed CAN transceiver
CM0902
The CM0902 is a SMARTMOS dual high-speed (up to 1.0 Mbit/s) CAN
transceiver device, providing the physical interface between the CAN protocol
controller of an MCU and the physical dual wire CAN bus. Both channels are
completely independent, featuring CAN bus wake-up on each CAN interface,
and TXD dominant timeout functionality (33CM0902 only).
CAN HIGH-SPEED TRANSCEIVER
The CM0902 is packaged in a 14-pin SOIC, with industry standard pin out, and
offers excellent EMC and ESD performance without the need for external filter
components.The CM0902 comes in two variants: 33CM0902 and 34CM0902 for
Automotive and Industrial applications respectively.
Features
• Very low-current consumption in standby mode
• Compatible with +3.3 V or +5.0 V MCU interface
• Standby mode with remote CAN wake-up
• Pin and function compatible with market standard
Cost efficient robustness:
EF SUFFIX (PB-FREE)
98ASB42565B
14-PIN SOICN
• High system level ESD performance
• Very high electromagnetic immunity and low electromagnetic emission
without common mode choke or other external components.
Fail-safe behaviors:
• TXD Dominant timeout (33CM0902 only)
• Ideal passive behavior when unpowered, CAN bus leakage current
RXD high). The delay between bus dominant and RXD
low, and bus recessive and RXD high is longer than in Normal mode (refer to tTGLT). The three events must occur within the tWU_TO
timeout.
Figure 5 “Wake-up pattern timing illustration” illustrates the wake-up detection and reporting (toggling) mechanism.
If the three events do not occur within the TWU_TO timeout, the wake-up and toggling mechanism are not activated. This is illustrated in
Figure 6. The three events and the timeout function avoid a permanent dominant state on the bus which would generate a permanent
wake-up situation, and prevent the system from entering into Low-power mode.
6.1.3
Unpowered mode
When VIO is below VIO UV, the device is in unpowered mode. Both CAN buses is in high-impedance and not able to transmit, receive, or
report bus wake-up events through any of the buses.
6.2
Fail-safe mechanisms
The device implements various protection, detection, and predictable fail-safe mechanisms explained below.
6.2.1
STB and TXD input pins
The STBx input pin has an internal integrated pull-up structure to the VIO supply pin. If STBx is open, the respective CANx interface is
set to Standby mode to ensure predictable behavior and minimize system current consumption.
The TXDx input pin also has an internal integrated pull-up structure to the VIO supply pin. If TXDx is open, the CANx driver is set to the
recessive state to minimize current consumption and ensure no false dominant bit is transmitted on the bus.
CM0902
17
NXP Semiconductors
6.2.2
TXD dominant timeout detection
The 33CM0902 device implements a TXD dominant timeout detection and protection mechanism. If TXDx is set low for a time longer than
the tXDOM parameter, the CANx drivers are disabled and the CANx bus returns to the recessive state. This prevents the bus from being
set to the dominant state permanently in case a fault sets the TXDx input to low level permanently. The device recovers when a high level
is detected on TXDx (Refer to Figure 7).
6.2.3
CAN current limitation
The current flowing in and out of the CANHx and CANLx driver is limited to a maximum of 100 mA, in case of a short-circuit (parameter
for ILIM1).
6.2.4
CAN overtemperature
If the driver temperature exceeds TSD, the driver turns off to protect the device. A hysteresis is implemented in this protection feature. The
device overtemperature and recovery conditions are shown in Figure 10. The driver remains disabled until the temperature has fallen
below the OT threshold minus the hysteresis and a TXD high to low transition is detected. Since both CAN interfaces are fully independent,
each driver requires a high to low transition of its own TXDx pin to re-enable the CAN driver.
Overtemperature Threshold
Hysteresis
Hysteresis
Temperature
Event 1
Event 1
Event 2
Event 2
Event 4
Event 3
Event 3
high
TXD
low
dominant
recessive
dominant
dominant
BUS
Event 1: overtemperature detection. CAN driver disabled.
Event 2: temperature falls below “overtemperature. threshold minus hysteresis” => CAN driver remains disabled.
Event 3: temperature below “overtemperature. threshold minus hysteresis” and TxD high to low transition => CAN driver enabled.
Event 4: temperature above “overtemperature. threshold minus hysteresis” and TxD high to low transition => CAN driver remains disabled.
Figure 10. Overtemperature behavior
6.2.5
VDD and VIO supply voltage monitoring
The device monitors the VDD and VIO supply inputs.
The device is set in Standby mode if VDD falls below VDD UV (VDD_UV). This ensures a predictable behavior due to the loss of VDD. CAN
drivers, receiver, or bus biasing cannot operate any longer. In this case, the bus wake-up is available as VIO remains active.
If VIO falls below VIO UV (VIO_UV), the device is set to an unpowered condition. This ensures a predictable behavior due to the loss of
VIO, CAN drivers, receivers, or bus biasing cannot operate any longer. This sets the bus in high-impedance and in ideal passive condition.
6.2.6
Bus dominant state behavior in standby mode
When the CAN interface is in Standby mode, a bus dominant condition due to a short-circuit or a fault in any of the CAN nodes, does not
generate a permanent wake-up event, since the specific wake-up sequence and timeout protect the device from waking-up with an
unwanted event.
CM0902
NXP Semiconductors
18
6.3
Device operation summary
The following table summarizes the CAN interface operation and the state of the input/output pins, depending on the operating mode and
power supply conditions.
Standby and normal modes
mode
Description
Normal
Nominal supply
and normal
mode
Standby
Nominal supply
and standby
mode
VDD range VIO range
STBx
TXDx
from 4.5 V from 2.8 V
to 5.5 V
to 5.5 V
Low
TXD High
=> bus
recessive
TXD Low =>
bus
dominant
from 0.0 V from 2.8 V
to 5.5 V
to 5.5 V
RXDx
CANx
Wake-up
CANH and CANL drivers controlled
by TXD input.
Differential receiver reports the bus
state on RXD pin.
Biasing circuitry provides approx
2.5 V in recessive state.
Disabled
CAN driver and differential receiver
High or No effect. on
floating CAN bus. Report bus wake up disabled.
via toggling
Bus biased to GND via internal RIN
mechanism.
resistors.
Enabled
Report CAN state
(bus recessive =>
RXD high, bus
dominant => RXD
low).
Undervoltage and loss of power conditions
Standby due Device in
from 0.0 to from 2.8 V
to VDD loss standby mode
to 5.5 V
VDD_UV.
due to loss of
(12)
(11)
VDD (VDD falls
below VDD UV)
Unpowered Device in
due to VIO unpowered
state due to low
loss
VIO. CAN bus
highimpedance.
(11)
from 0.0 V
to VIO_UV
X
X
(10)
X
CAN driver and differential receiver
Report bus wake up disabled.
via toggling
Bus biased to GND via internal RIN
mechanism.
resistors.
X
Pulled up to VIO
down to VIO approx
= 1.5 V, then
released.
CAN driver and differential receiver
disabled.
High-impedance, with ideal passive
behavior.
Enabled
Not available.
Notes
10. STBx pin has no effect. CANx Interface enters in Standby mode.
11. VDD consumption < 10 uA down to VDD approx 1.5 V.
12.
VIO consumption < 10 uA down to VIO approx 1.5 V. If STB is high or floating.
CM0902
19
NXP Semiconductors
7
Typical applications
7.1
Application diagrams
VPWR
D
5.0 V Reg.
5.0 V
MCU
C1: 1.0 µF
R1 & R2: application dependant
(ex: 60, 120 Ω or other value)
CM0902
VCC
C1
VDD
VIO
CANH1
STB1
Port_xx
R1
TXD1
CAN TXD1
controller
RXD1
CANL1
RXD1
Port_xy
STB2
TXD2
TXD2
CAN
controller
RXD2
CANH2
R2
CANL2
RXD2
GND
Figure 11. Single supply typical application schematic
5.0 V Reg
VPWR
D
5.0 V
C2
C1: 1.0 µF
C2: 1.0 µF
R1 & R2: application dependant
(ex: 60, 120 Ω or other value)
3.3-5.0 V Reg 3.3 - 5.0 V
MCU
CM0902
VCC
C1
VIO
VDD
Port_xx
STB1
CANH1
TXD1
TXD1
CANL1
R1
CAN
controller
RXD1
Port_xy
CAN TXD2
controller
RXD2
RXD1
STB2
CANH2
TXD2
RXD2
R2
CANL2
GND
Figure 12. Dual supply typical application schematic
CM0902
NXP Semiconductors
20
CANH
C3
R2
R2, R3: application dependant
(ex: 60 ohm or other value):
R3
C3: application dependant
(ex: 4.7 nF or other value):
CANL
Figure 13. Example of bus termination options
CM0902
21
NXP Semiconductors
8
Packaging
8.1
Package mechanical dimensions
Package dimensions are provided in package drawings. To find the most current package outline drawing, go to www.nxp.com and
perform a keyword search for the drawing’s document number.
Table 8. Packaging Information
Package
Suffix
14-Pin SOICN
EF
Package outline drawing number
98ASB42565B
.
CM0902
NXP Semiconductors
22
.
CM0902
23
NXP Semiconductors
9
Revision history
Revision
Date
1.0
6/2014
•
Initial release
2.0
11/2014
•
Data adjusted to match latest silicon
3.0
1/2015
•
Changed ordering information from PC to MC
•
Added information for dual speed (up to 1 Mbit/s)
•
Added VREC_SM1 & VREC_SM2 (CANH, CANL recessive voltage, sleep mode) to Table 5
•
Added driver symmetry VSYM1 & VSYM2 to Table 5
•
Updated IIN_UPWR1 & IIN_UPWR2 in Table 5
•
Updated document to NXP form and style
4/2015
4.0
8/2016
Description of changes
CM0902
NXP Semiconductors
24
How to Reach Us:
Information in this document is provided solely to enable system and software implementers to use NXP products.
Home Page:
NXP.com
There are no expressed or implied copyright licenses granted hereunder to design or fabricate any integrated circuits
Web Support:
http://www.nxp.com/support
products herein.
based on the information in this document. NXP reserves the right to make changes without further notice to any
NXP makes no warranty, representation, or guarantee regarding the suitability of its products for any particular
purpose, nor does NXP assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation, consequential or incidental damages. "Typical"
parameters that may be provided in NXP data sheets and/or specifications can and do vary in different applications,
and actual performance may vary over time. All operating parameters, including "typicals," must be validated for each
customer application by the customer's technical experts. NXP does not convey any license under its patent rights nor
the rights of others. NXP sells products pursuant to standard terms and conditions of sale, which can be found at the
following address:
http://www.nxp.com/terms-of-use.html.
NXP, the NXP logo, Freescale, the Freescale logo and SMARTMOS are trademarks of NXP B.V. All other product or
service names are the property of their respective owners. All rights reserved.
© 2016 NXP B.V.
Document Number: CM0902
Rev. 4.0
8/2016
