MC88920DW

 Freescale Semiconductor, Inc. Order this document from Logic Marketing SEMICONDUCTOR TECHNICAL DATA # #    "   # ##  ! Freescale Semiconductor, Inc... The MC88920 Clock Driver utilizes phase–locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock. It is designed to provide clock distribution for CISC microprocessor or single processor RISC systems. The RST_IN/RST_OUT(LOCK) pins provide a processor reset function designed specifically for the MC68/EC/LC030/040 microprocessor family. The PLL allows the the high current, low skew outputs to lock onto a single clock input and distribute it with essentially zero delay to multiple locations on a board. The PLL also allows the MC88920 to multiply a low frequency input clock and distribute it locally at a higher (2X) system frequency.  LOW SKEW CMOS PLL CLOCK DRIVER With Power–Down/ Power–Up Feature • 2X_Q Output Meets All Requirements of the 20 and 25MHz 68040 Microprocessor PCLK Input Specifications • Three Outputs (Q0–Q2) With Output–Output Skew