Freescale Semiconductor, Inc.
MOTOROLA
Order number: MPC926508/D
Rev 2, 02/2004
SEMICONDUCTOR TECHNICAL DATA
MPC926508
Networking Clock Source
The MPC926508 is a low cost, low jitter, high performance clock
synthesizer for networking applications. Using analog Phase-Locked
Loop (PLL) techniques, the device accepts an input to produce multiple output clocks for networking chips, PCI devices, SDRAM, and
ASICs. The MPC926508 outputs all have 0 ppm synthesis error.
NETWORKING
CLOCK SOURCE
Freescale Semiconductor, Inc...
Features
•
Packaged in 20 pin narrow (150 mil) SSOP (QSOP)
•
25 or 125 MHz fundamental clock input or 25 MHz crystal input
•
Two output clocks
•
SDRAM frequencies of 100 and 133 MHz
•
Zero ppm synthesis error in all clocks
•
Full CMOS output swing with 25 mA output drive capability at TTL
levels
•
Advanced, low power, sub-micron CMOS process
•
3.3V operating voltage
VDD
2
SD SUFFIX
20 LEAD SSOP
CASE 1461
GND
2
Output
Buffer
SEL_25
OUT1 (100 MHz)
Clock Synthesis
and Control
Circuitry
SEL_CLK
Output
Buffer
25 MHz or
125 MHz clock
or 25 MHz crystalX1
OUT2 (133.33
MHz)
Clock
Buffer /
Crystal
Oscillator
X2
*Optional crystal capacitors are shown and may be required for tuning of initial accuracy (determined
once per board).
© Motorola, Inc. 2004
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Freescale Semiconductor, Inc.
MPC926508
Table 1. Function table
Control
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Default
0
1
SEL_25
1
125
25
SEL_CLK
1
XTAL
REF_CLK
X2
1
20
NC
NC
2
19
SEL_CLK
X1/ICLK
3
18
NC
VDD
4
17
OUT1 (100 MHz)
NC
5
16
VDD
GND
6
15
NC
NC
7
14
GND
NC
8
13
NC
NC
9
12
NC
OUT2 (133.33 MHz)
10
11
SEL_25
MPC926508
NC = Not Connected
Figure 1. MPC926508 Pin Assignment
Table 2. Pin Description
Number
Name
Type
Description
1
X2
XO
2
NC
-
3
X1/ICLK
XI
Crystal connection. Connect to a fundamental crystal or clock input.
4
VDD
P
Connect to +3.3 V. Must be same as other VDD.
5
NC
-
Not Connected
6
GND
P
Connect to ground.
7
NC
-
Not Connected
8
NC
-
Not Connected
9
NC
-
Not Connected
10
OUT1 (133.33 MHz)
O
133.33 MHz Output
11
SEL_25
I
REF_CLK or XTAL Input Selection.
12
NC
-
Not Connected
13
NC
-
Not Connected
14
GND
P
Connect to ground.
15
NC
-
Not Connected
16
VDD
P
Connect to +3.3 V. Must be same as other VDD.
17
OUT2 (100 MHz)
O
100 MHz Output
18
NC
-
Not Connected
19
SEL_CLK
I
25 or 125 MHz REF_CLK Selection.
20
NC
-
Not Connected
Crystal connection. Connect to a crystal or leave unconnected for a clock input.
Not Connected
Key: XI, XO = crystal connections; I = Input with internal pull-up resistor; O = Output; P = power supply connection.
2
Networking Clock Source
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MOTOROLA
Freescale Semiconductor, Inc.
MPC926508
Table 3. ABSOLUTE MAXIMUM RATINGSa
Symbol
VDD
Characteristics
Min
TA
Ambient Operating Temperature
TA
Ambient Operating Temperature, I version
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TS
Max
Unit
3.9
V
Referenced to GND
-0.5
VDD + 0.5
V
Referenced to GND
0
70
°C
-40
85
°C
Industrial temp
260
°C
Max of 20 seconds
150
°C
Supply Voltage
Inputs and Clock Outputs
TSOL
Typ
Soldering Temperature
Storage Temperature
-65
Condition
a. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these
conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated
conditions is not implied.
Table 4. DC CHARACTERISTICS (VDD = 3.3V ± 10%, TA = -40°C to 85°C)
Symbol
Characteristics
Min
Typ
VDD/2+1
2
VDD/2
Max
Unit
Condition
VIH
Input High VoltageX1 pin only
all I type inputs
VIL
Input Low VoltageX1 pin only
all I type inputs
VOH
Output High Voltage
VOL
Output Low Voltage
VOH
Output High Voltage, CMOS level
IDD
Operating Supply Current
35
mA
No Load
Short Circuit Current
90
mA
Each Output
Internal Pull-Up Resistor
200
kΩ
SEL_25, SEL_CLK
VDD/2
V
V
VDD/2-1
0.8
2.4
0.4
VDD - 0.4
V
V
V
IOH=-25 mA
V
IOL= 25 mA
V
IOH=-8 mA
Table 5. AC CHARACTERISTICS (VDD = 3.3V ± 10%, TA = -40°C to 85°C)
Symbol
Characteristics
fREF
Input Frequency
fREF
Input Frequency
Min
Typ
Max
Unit
Condition
12
25
27
MHz
Crystal Oscillator
125
MHz
External Input
tr
Output Clock Rise Time
1
ns
0.8 to 2.0V
tf
Output Clock Fall Time
1
ns
2.0 to 0.8V
60
%
At VDD/2
0
ppm
All clocks
DCO
Output Clock Duty Cycle
40
50
Frequency Error
tJIT(CC) Jitter (Cycle-to-Cycle)
MOTOROLA
300
Networking Clock Source
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ps
Variation from mean
3
Freescale Semiconductor, Inc.
MPC926508
APPLICATIONS INFORMATION
Freescale Semiconductor, Inc...
External Components
The MPC926508 requires a minimum number of external
components for proper operation. Decoupling capacitors of
0.01µF should be connected between each VDD and GND
(pins 4 and 6, pins 16 and 14), as close to the MPC926508 as
possible. A series termination resistor of 33 Ω may be used for
each clock output. The crystal must be connected as close to
the chip as possible. The crystal should be a fundamental mode
(do not use third overtone), parallel resonant. Crystal capacitors
should be connected from pins X1 to ground and X2 to ground
to optimize the initial accuracy. The value of these capacitors is
given by the following equation, where CL is the crystal load capacitance: Crystal caps (pF) = (CL-6) x 2. So for a crystal with
16 pF load capacitance, two 20 pF caps should be used.
4
Networking Clock Source
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MOTOROLA
Freescale Semiconductor, Inc.
MPC926508
PACKAGE DIMENSIONS
SD SUFFIX
20-LEAD SSOP PACKAGE
CASE 1461-01
ISSUE O
.236
.157
.150
4
D
.061
.055
5
PIN 1 ID
18X
Freescale Semiconductor, Inc...
1
20
B
.025
B
4
4
B
A
.0125
.344
.337
10
CL
5
11
3
2X
.118
.003 H
2X 10 TIPS
.010 C
H
C
A-B D
SEATING
PLANE
20X
.004 C
A-B D
7
A
A
0˚
(.010)
MIN
BASE METAL
R.003 MIN
.010
.007
(.008)
.010
.0098
.0040
GAUGE PLANE
.012
.008
.007
PLATING
C A-B D
M
SECTION A-A
8˚
0˚
.035
.016
6
SECTION B-B
8
NOTES:
1. DIMENSIONS ARE IN INCHES.
2. DIMENSIONING AND TOLERANCING PER ASME
Y14.5m, 1994.
3. DATUM PLANE H LOCATED AT MOLD PARTING
LINE AND COINCIDENT WITH LEAD, WHERE
LEAD EXITS PLASTIC BODY AT BOTTOM OF
PARTING LINE.
4. DATUM A, B AND D TO BE DETRMINED WHERE
CENTERLINE BETWEEN LEADS EXITS PLASTIC
BODY AT DATUM PLANE H.
5. THIS DIMENSION DOES NOT INCLUDE MOLD
FLASH OR PROTRUSIONS, BUT DO INCLUDE
MOLD MISMATCH AND ARE MEASURED AT THE
MOLD PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED .006
INCHES FOR ENDS AND .008 INCHES FOR
SIDES.
6. THIS DIMENSION IS LENGTH OF TERMINAL FOR
SOLDERING A SUBSTRATE.
7. FORMED LEADS SHALL BE PLANAR WITH
RESPECT TO ONE ANOTHER WITHIN .004
INCHES AT SEATING PLANE.
8. THIS DIMENSION IS DEFINED AS THE DISTANCE
FROM THE SEATING PLANE TO THE LOWEST
POINT OF THE PACKAGE BODY.
CASE 1467-01
ISSUE O
DATE 11/20/02
MOTOROLA
Networking Clock Source
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Freescale Semiconductor, Inc...
NOTES
6
Networking Clock Source
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MOTOROLA
Freescale Semiconductor, Inc.
Freescale Semiconductor, Inc...
NOTES
MOTOROLA
Networking Clock Source
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Freescale Semiconductor, Inc.
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© Motorola, Inc. 2004
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852-26668334
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MPC926508
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