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N74F240DB,118

N74F240DB,118

  • 厂商:

    NXP(恩智浦)

  • 封装:

    SSOP20_7.2X5.3MM

  • 描述:

    IC BUFFER INVERT 5.5V 20SSOP

  • 数据手册
  • 价格&库存
N74F240DB,118 数据手册
INTEGRATED CIRCUITS 74F240 Octal inverting buffer (3-state) Product data Supersedes data of 2002 Mar 18    2004 Feb 25 Philips Semiconductors Product data Octal inverting buffer 74F240 FEATURES DESCRIPTION • Octal bus interface • 3-state buffer outputs sink 64 mA • 15 mA source current TYPE The 74F240 is an octal inverting buffer that is ideal for driving bus lines of buffer memory address registers. The outputs are all capable of sinking 64 mA and sourcing up to 15 mA. The device features two output enables, each controlling four of the 3-state outputs. TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 4.3 ns 37 mA 74F240 ORDERING INFORMATION ORDER CODE DESCRIPTION COMMERCIAL RANGE VCC = 5 V ±10%, Tamb = 0 °C to +70 °C PKG DWG # 20-pin plastic DIP N74F240N SOT146-1 20-pin plastic SOL N74F240D SOT163-1 20-pin plastic SSOP II N74F240DB SOT339-1 INPUT AND OUTPUT LOADING AND FAN OUT TABLE PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW Data inputs 1.0/1.67 20 µA/1.0 mA OEa, OEb Output enable inputs (Active-LOW) 1.0/0.33 20 µA/0.2 mA Yan, Ybn Data outputs 750/106.7 15 mA/64 mA Ian, Ibn Note to input and output loading and fan out table One (1.0) FAST unit load is defined as: 20 µA in the HIGH state and 0.6 mA in the LOW state. PIN CONFIGURATION LOGIC SYMBOL OEa 1 20 VCC Ia0 2 19 OEb Yb0 3 18 Ya0 Ia1 4 17 Ib0 Yb1 5 16 Ya1 Ia2 6 15 Ib1 Yb2 7 14 Ya2 Ia3 8 13 Ib2 Yb3 9 12 Ya3 GND 10 4 6 8 17 15 13 Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3 1 OEa 19 OEb 11 Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3 18 16 14 12 3 5 7 9 11 Ib3 VCC = Pin 20 GND = Pin 10 SF00320 2004 Feb 25 2 2 SF00321 Philips Semiconductors Product data Octal inverting buffer 74F240 IEC/IEEE SYMBOL LOGIC DIAGRAM 1 EN1 19 Ia0 2 18 4 16 6 14 8 12 Ya0 Ib0 Ya1 Ib1 Ya2 Ib2 Ya3 Ib3 17 3 15 5 13 7 11 9 Yb0 EN2 Ia1 2 2D 1 4 16 6 14 8 12 17 Yb1 18 Ia2 Ia3 3 2 15 5 13 7 11 9 OEa 1 Yb3 10 OEb VCC = Pin 20 GND = Pin 10 SF00322 Yb2 SF00323 FUNCTION TABLE INPUTS OEa OUTPUTS Ia OEb Ib Ya Yb L L L H L L H H L H L L H X H X Z Z NOTES: H = High voltage level L = Low voltage level X = Don’t care Z = High impedance “off” state ABSOLUTE MAXIMUM RATINGS (Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.) RATING UNIT VCC Supply voltage PARAMETER –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in high output state –0.5 to VCC V IOUT Current applied to output in low output state 128 mA Tamb Operating free air temperature range 0 to +70 °C Tstg Storage temperature range –65 to +150 °C SYMBOL RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL PARAMETER MIN NOM MAX 5.0 5.5 UNIT VCC Supply voltage 4.5 VIH High-level input voltage 2.0 VIL Low-level input voltage 0.8 V IIk Input clamp current –18 mA IOH High-level output current –15 mA IOL Low-level output current 64 mA Tamb Operating free air temperature range +70 °C 2004 Feb 25 0 3 V V Philips Semiconductors Product data Octal inverting buffer 74F240 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL TEST CONDITIONS1 PARAMETER LIMITS MIN VOH O VCC = MIN; VIL = MAX; VIH = MIN High level output voltage High-level VCC = MIN; VIL = MAX; VIH = MIN IOH 3 mA O = –3 IOH 15 mA O = –15 TYP2 UNIT MAX ±10%VCC 2.4 ±5%VCC 2.7 ±10%VCC 2.0 V ±5%VCC 2.0 V V 3.4 ±10%VCC V 0.50 V 0.42 0.50 V –0.73 –1.2 V VCC = MAX; VI = 7.0 V 100 µA VCC = MAX; VI = 2.7 V 20 µA Low-level input current VCC = MAX; VI = 0.5 V –1.0 mA IOZH Off-state output current, high-level voltage applied VCC = MAX, VO = 2.7 V 50 µA IOZL Off-state output current, low-level voltage applied VCC = MAX, VO = 0.5 V –50 µA IOS Short-circuit output current3 VOL O Low level output voltage Low-level VIK Input clamp voltage VCC = MIN; II = IIK II Input current at maximum input voltage IIH High-level input current IIL VCC = MAX Supply current (total) ICCL ±5%VCC –100 ICCH ICC IOL O = MAX VCC = MAX ICCZ –225 mA 12 18 mA 50 70 mA 35 45 mA NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5 V, Tamb = 25 °C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. 2004 Feb 25 4 Philips Semiconductors Product data Octal inverting buffer 74F240 AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER Tamb = +25 °C VCC = +5.0 V CL = 50 pF; RL = 500 Ω TEST CONDITION Tamb = 0 °C to +70 °C VCC = +5.0 V ± 10% CL = 50 pF; RL = 500 Ω MIN TYP MAX MIN MAX Waveform 1 3.0 2.0 4.5 3.0 6.5 4.5 3.0 2.0 7.5 5.0 ns Output enable time to high or low level Waveform 2 & 3 3.0 4.5 5.0 6.5 7.5 8.5 3.0 4.0 9.0 10.0 ns Output disable time from high or low level Waveform 2 & 3 3.0 3.0 5.5 5.0 7.0 7.0 3.0 3.0 7.5 7.5 ns tPLH tPHL Propagation delay Ian, Ibn to Yn tPZH tPZL tPHZ tPLZ NOTES: 1. | tPN actual – tPM actual| for any output compared to any other output where N and M are either LH or HL. 2004 Feb 25 UNIT 5 Philips Semiconductors Product data Octal inverting buffer 74F240 AC WAVEFORMS Ian, Ibn VM OEn VM VM VM OEb tPHL tPLH VM Yn tPZL VM tPLZ 3.5V VM Yn, Yn SF00328 VOL +0.3V SF00331 Waveform 1. Propagation delay for inverting outputs Waveform 3. 3-state output enable time to low level and output disable time from low level OEn VM VM tPZH tPHZ OEb Yn, Yn Notes to AC waveforms 1. For all waveforms, VM = 1.5 V. VOH -0.3V VM 0V SF00330 Waveform 2. 3-state output enable time to high level and output disable time from high level TEST CIRCUIT AND WAVEFORMS VCC 7.0 V VIN RL VOUT PULSE GENERATOR tw 90% NEGATIVE PULSE VM CL AMP (V) VM 10% D.U.T. RT 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V RL AMP (V) 90% Test Circuit for Open Collector Outputs POSITIVE PULSE 90% VM VM 10% TEST tPLZ tPZL All other SWITCH closed closed open DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 10% tw SWITCH POSITION 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0 V 1.5 V rep. rate 1 MHz tw tTLH 500 ns 2.5 ns tTHL 2.5 ns SF00128 2004 Feb 25 6 Philips Semiconductors Product data Octal inverting buffer 74F240 DIP20: plastic dual in-line package; 20 leads (300 mil) 2004 Feb 25 7 SOT146-1 Philips Semiconductors Product data Octal inverting buffer 74F240 SO20: plastic small outline package; 20 leads; body width 7.5 mm 2004 Feb 25 8 SOT163-1 Philips Semiconductors Product data Octal inverting buffer 74F240 SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm 2004 Feb 25 9 SOT339-1 Philips Semiconductors Product data Octal inverting buffer 74F240 REVISION HISTORY Rev Date Description _4 20040225 Product data (9397 750 12941); supersedes data sheet 74F240_241_241A_3 of 2002 Mar 18 (9397 750 09571). Modifications: • Delete all references to 74F241A (product discontinued). • Separate 74F240 and 74F241 into standalone data sheets. _3 20020318 2004 Feb 25 Product data (9397 750 09571); supersedes previous version. 10 Philips Semiconductors Product data Octal inverting buffer 74F240 Data sheet status Level Data sheet status [1] Product status [2] [3] Definitions I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.  Koninklijke Philips Electronics N.V. 2004 All rights reserved. Printed in U.S.A. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 Date of release: 02-04 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. Document order number:    2004 Feb 25 11 9397 750 12941
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