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NCX8193GUX

NCX8193GUX

  • 厂商:

    NXP(恩智浦)

  • 封装:

    XFQFN10

  • 描述:

    ICAUDIOJACKDETECTCTRL10XQFN

  • 数据手册
  • 价格&库存
NCX8193GUX 数据手册
NCX8193 Audio jack detection and configuration with false detection prevention Rev. 2 — 21 November 2014 Product data sheet 1. General description The NCX8193 is an advanced audio jack accessory detector and controller. It supports 3-pole and 4-pole connectors and detects the insertion of plugs into jacks using a fault detection technique. An internal microphone bias line switch allows a codec or application processor to control the audio jack configuration. The device supports a broad variety of after-market headphones. 2. Features and benefits        Fail-safe headset and headphone detection Low-power standby mode Click free switching Low THD and noise microphone pass through channel Send/End button detection Low ON resistance: 0.9  (typical) at a supply voltage of 2.8 V ESD protection:  HBM JEDEC JDS-001 Class 3B exceeds 8 kV  Operating ambient temperature 40C to +85C 3. Applications  Headphones with integrated microphone and remote control buttons 4. Ordering information Table 1. Ordering information Type number NCX8193GU Package Temperature range Name Description Version 40 C to +85 C XQFN10 plastic, extremely thin quad flat package; no leads; 10 terminals; body 1.8  1.4  0.5 mm SOT1160-2 5. Marking Table 2. Marking codes Type number Marking code NCX8193GU q8 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention 6. Functional diagram 9&& ,2 9&& 0ȍ , —$ P9 -B'(7 '(7 (1 6( KHDGVHWMDFN / 26&,//$725 $1' &21752/ 5 *1' 0,& P9 5ELDV -B0,& 0,& *1' &0,& DDD J_DET is pulled up to VCC in Sleep mode; J_DET is connected to I1 in Active mode. Fig 1. Simplified schematic NCX8193 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 2 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention 7. Pinning information 7.1 Pinning '(7 9&& ,2   (1   -B'(7 QF   *1' 9&&   -B0,&   6( 0,& DDD 7UDQVSDUHQWWRSYLHZ VROGHUSDGVIDFLQJGRZQ Fig 2. Pin configuration 7.2 Pin description Table 3. Pin description Symbol Pin Type Description VCC(IO) 1 Power digital interface input/output supply voltage; headphone mode bias supply DET 2 O plug detect; Plug inserted: DET = LOW; unplugged: DET = HIGH EN 3 I microphone bias path switch SWM control. closed: EN = HIGH; open: EN = LOW n.c. 4 n.c. not connected (preferably connected GND) VCC 5 Power core supply (e.g. battery) S/E 6 O keypress-detect; key press: S/E = HIGH; NO key press: S/E = LOW MIC 7 I/O microphone bias connection audio codec side J_MIC 8 I/O microphone bias connection audio headset side GND 9 ground ground J_DET 10 I/O plug detection bias and logic level input NCX8193 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 3 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention 8. Functional description The simplified schematic of the NCX8193 is shown in Figure 1. If no plug is inserted, J_DET is pulled-up to VCC via a 1.2 M resistor. Once J_DET is pulled below 400 mV, the pull-up resistor is switched out and J_DET is connected to a variable current source. The current source slowly increases its output current. If J_DET remains lower than 300 mV, DET is set LOW to indicate that a plug has been inserted. In case DET is set LOW, when EN is HIGH, J_DET is connected to the current source and the integrated button press detection circuit on J_MIC is active. The button press detection uses a trigger level of 780 mV. It enables a 1.8 V bias voltage in combination with an Rbias, matching the series resistance of the microphone, to detect button presses. Not only call-end button press but also forward and reverse button press event levels can be passed from J_MIC to MIC. The codec or processor decodes according to the individual button pressed. Refer to Figure 3 and Figure 4 for details. 6OHHS -B'(7P9 -B'(7!9 -B'(7P9 'HWHFW 0RLVWXUH -B'(7!P9 -B'(7!9 IRUPV -B'(7P9 IRUPV 3OXJLQ '(7 / (1 +DQG -B'(79 (1 /RU -B'(7!9 $FWLYH '(7 / -B0,&P9 IRUPV (1 /RU -B'(7!9 -B0,&!P9 IRUPV -B0,& 3UHVVHG 6( + '(7 / DDD Fig 3. NCX8193 Product data sheet Simplified status diagram of NCX8193 All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 4 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention 9&& -B'(7 '(7 9&& ,2 (1 90 90 9$ $XGLRDSSOLHGWR-B'(7 WGHE    DDD (1) J_DET = VCC; microphone path is open. (2) J_DET = I1; microphone path is open. (3) J_DET = I1; microphone path is closed. Fig 4. Table 4. Basic headset plug-in detection Simplified status diagram signal and functional conditions[1] States Sleep Detect Moisture Plug-in Active J_MIC pressed I/O J_DET H L 0.3 V audio signal audio signal audio signal Input EN X X X L H H I/O J_MIC L L L L > 780 mV < 780 mV I/O MIC Z Z Z Z J_MIC J_MIC Output DET H Output S/E L [2] H H L L L L L L L H [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. [2] In case an unplug event is detected, DET remains LOW for 40 ms before returning to HIGH.‘ NCX8193 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 5 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention 9. Application diagram For stable operation of the NCX8913, place a 4.7 F capacitor between VCC and GND and place a 1F capacitor between VCC(IO) and GND. These bypass capacitors should be placed as close to the device as possible with low-ohmic connections from the power supplies and GND connections. When the headset or accessory plug is inserted into audio jack, the J_DET pin is shorted to the left (L) audio channel. Audio performance, within the audio range of 20 – 20 kHz, may be affected when connecting external circuitry to the J_DET pin. VCC(IO) VCC 1.0 μF 4.7 μF VCC VCC(IO) 1.2 MΩ I1 1 μA J_DET DET headset jack 400 mV PROCESSOR EN OSCILLATOR AND CONTROL S/E L R GND MIC 780 mV MIC BIAS AUDIO CODEC 2.2 kΩ MIC J_MIC GND 1 μF aaa-015597 Fig 5. NCX8193 application diagram 10. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage 0.5 +6.0 V VCC(IO) input/output supply voltage 0.5 +6.0 V VI input voltage J_MIC; MIC 0.5 VCC V EN 0.5 VCC(IO) + 0.1 V J_DET 1.5 VCC V VO output voltage DET; S/E 0.5 VCC(IO) + 0.3 V V voltage difference VCC to J_DET - 6.0 V ISW switch current continuous current from MIC to J_MIC - 50 mA NCX8193 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 6 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention Table 5. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit Tj(max) maximum junction temperature 40 +125 C Tstg storage temperature 65 +150 C Ptot total power dissipation - 250 mW 11. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter VCC supply voltage VCC(IO) input/output supply voltage Conditions Min Max Unit 2.4 5.25 V VCC(IO)  VCC 1.6 VCC V VI input voltage MIC; J_MIC 0 VCC V V voltage difference VCC to J_DET - 5.5 V Tamb ambient temperature 40 +85 C 12. Thermal characteristics Table 7. Thermal characteristics Symbol Parameter [1] thermal resistance from junction to ambient Rth(j-a) [1] Conditions Typ Unit 148 K/W Rth(j-a) is dependent upon board layout. To minimize Rth(j-a), ensure that all pins have a solid connection to larger copper layer areas. In multi-layer PCBs, the second layer should be used to create a large heat spreader area below the device. Avoid using solder-stop varnish under the device. 13. Static characteristics Table 8. Static characteristics At recommended operating conditions, unless otherwise specified typical values are measured with VCC = 3.6 V and VCC(IO) = 1.8 V. Voltages are referenced to GND (ground 0 V). Symbol Parameter Tamb = 25 C Conditions Tamb = 40 C to +85 C Unit Min Typ Max Min Max Digital control VIH HIGH-level input voltage EN - - - 0.7VCC(IO) - V VIL LOW-level input voltage EN - - - - 0.3VCC(IO) V VOH HIGH-level output voltage DET; S/E; IO = 0.5 mA - - - 0.8VCC(IO) - V VOL LOW-level output voltage DET; S/E; IO = 0.5 mA - - - - 0.2VCC(IO) V CI input capacitance J_DET - 5 - - - pF EN - 1 - - - pF NCX8193 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 7 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention Table 8. Static characteristics …continued At recommended operating conditions, unless otherwise specified typical values are measured with VCC = 3.6 V and VCC(IO) = 1.8 V. Voltages are referenced to GND (ground 0 V). Symbol Parameter Tamb = 25 C Conditions Tamb = 40 C to +85 C Unit Min Typ Max Min Max - - - - 0.1 A VCC = 2.8 V; see Figure 9 - 0.9 - - 1.5  VCC = 3.0 V; see Figure 10 - 0.9 - - 1.5  VCC = 3.3 V; see Figure 11 - 0.9 - - 1.5  VCC = 3.8 V; see Figure 12 - 0.9 - - 1.5  VCC = 2.8 V; see Figure 9 - - - - 0.6  VCC = 3.0 V; see Figure 10 - - - - 0.6  VCC = 3.3 V; see Figure 11 - - - - 0.6  VCC = 3.8 V; see Figure 12 Microphone bias switch IS(OFF) OFF-state leakage current RON ON resistance MIC; IO(J_MIC) = 30 mA; VI(MIC) = 850 mV; see Figure 7 and Figure 8 RON(flat) MIC; VI(MIC) = 850 mV; see Figure 6 ON resistance IO(J_MIC) = 30 mA; (flatness) 0.8 V < VI(MIC) < 1.2 V - - - - 0.6  CS(OFF) OFF-state capacitance J_MIC; MIC - 20 - - - pF CS(ON) ON-state capacitance J_MIC; MIC - 60 - - - pF Audio/analog performance THD total harmonic distortion RS = RL = 600 ; VAC = 0.5 V (p-p); VDC = 1.7 V; fi = 20 Hz to 20 kHz; VCC = 3.8 V; VCC(IO) = 1.8 V; see Figure 13 - 0.01 - - - % iso isolation (OFF-state) RS = RL = 32 ; VAC = 0.1 V (p-p); VDC = 2.2 V; fi = 20 kHz; VCC = 3.8 V; VCC(IO) = 1.8 V; see Figure 14 - 100 - - - dB PSRR power supply rejection ratio RS = RL = 600 ; VCC = 3.8 V; VCC(IO) = 1.8 V; VDC = 1.7 V; VAC = 0.3 V (p-p); fi = 217 Hz; see Figure 15 - 110 - - - dB NCX8193 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 8 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention Table 8. Static characteristics …continued At recommended operating conditions, unless otherwise specified typical values are measured with VCC = 3.6 V and VCC(IO) = 1.8 V. Voltages are referenced to GND (ground 0 V). Symbol Parameter Tamb = 25 C Conditions Tamb = 40 C to +85 C Unit Min Typ Max Min Max - - - 400 Headset detection VT negative-going J_DET threshold voltage - mV Vref reference voltage J_DET; plug detect - 300 - 270 330 mV J_DET; plug removed; 1.6 V < VCC(IO) < VCC - 1.32 - 1.2 1.44 V fmax maximum frequency J_DET - - - 20000 - Hz Rpu pull-up resistance J_DET - 1.2 - 0.9 1.6 M Isource source current J_DET - 1.0 - - - A J_MIC - 780 - 718 842 mV - 0.1 - - 1 A Button press; S/E detect Vref reference voltage Current consumption ICC supply current power down; VCC(IO) = 0 V; VCC = 3.6 V; J_DET = open ICC(tot) total supply current ICC(IO) + ICC; 1.6 V < VCC(IO) < 2.0 V; VCC = 3.6 V; NCX8193 Product data sheet Sleep mode; J_DET = open - 0.1 - - 1 A Plug-in mode - 15 - - 25 A Active mode - 15 - - 25 A All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 9 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention 13.1 Test circuits and graphs 9&& 9&& ,2 26&,//$725 $1' &21752/ (1 9,/ -B'(7 -B0,& 0,& ,6 *1' 9, DDD Fig 6. Test circuit for measuring OFF-state leakage current 96: 9&& ,2 DDD  9&& 521 ȍ  (1 9,+ 26&,//$725 $1' &21752/  -B'(7     0,& -B0,&  9,  ,2 *1'      DDD   9&& 9 (1) Tamb = 85 C RON = VSW / IO (2) Tamb = 25 C (3) Tamb = 40 C Fig 7. Test circuit for measuring ON resistance NCX8193 Product data sheet Fig 8. ON resistance versus VCC All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 10 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention DDD  DDD  521 ȍ 521 ȍ                        9, 9    (1) Tamb = 85 C (1) Tamb = 85 C (2) Tamb = 25 C (2) Tamb = 25 C (3) Tamb = 40 C (3) Tamb = 40 C Fig 9. ON resistance as a function of VI(MIC); VCC = 2.8 V DDD  521 ȍ      9, 9 Fig 10. ON resistance as a function of VI(MIC); VCC = 3.0 V DDD  521 ȍ                         9, 9   (1) Tamb = 85 C (2) Tamb = 25 C (2) Tamb = 25 C (3) Tamb = 40 C (3) Tamb = 40 C NCX8193 Product data sheet   9, 9 (1) Tamb = 85 C Fig 11. ON resistance as a function of VI(MIC); VCC = 3.3 V  Fig 12. ON resistance as a function of VI(MIC); VCC = 3.8 V All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 11 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention 9&& ,2 (1 9,+ 9&& ,2 9&& 26&,//$725 $1' &21752/ 9,/ -B'(7 (1 9&& 26&,//$725 $1' &21752/ 0,& 0,& -B0,& -B0,& 5/ 56 5/ 56 ' 9'& -B'(7 9'& IL G% IL DDD DDD Fig 13. Test circuit for measuring total harmonic distortion 9&& ,2 9$& *1' 9$& *1' Fig 14. Test circuit for measuring isolation (OFF-state) 9&& G% (1 9,+ 26&,//$725 $1' &21752/ 0,& 9$& IL -B'(7 -B0,& 56 5/ 9'& 9&& *1' DDD Fig 15. Test circuit for measuring the power supply rejection ratio NCX8193 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 12 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention 14. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; unless otherwise specified typical values are measured with VCC = 3.6 V and VCC(IO) = 1.8 V; voltages are referenced to GND (ground = 0 V); see Figure 19. Symbol Parameter Tamb = 25 C Conditions Tamb = 40 C to +85 C Unit Min Typ Max Min Max tTLH LOW to HIGH output transition time DET; S/E; CL = 5 pF; see Figure 16 and Figure 19 - 5 - - - ns tTHL HIGH to LOW output transition time DET; S/E; CL = 5 pF; see Figure 16 and Figure 19 - 2 - - - ns tdeb debounce time see Figure 16 and Figure 19 Detect to Plug-in - 80 - - 100 ms Plug-in to Sleep - 40 - - - ms Active to or from J_MIC Pressed - 30 - - - ms - 15 - - - s EN to J_MIC; see Figure 17 and Figure 20 - 15 - - - s J_DET to J_MIC; see Figure 18 - 15 - - - s ten enable time EN to J_MIC; VI(MIC) = VCC; see Figure 17 and Figure 20 tdis disable time VI(MIC) = VCC; 14.1 Waveform and test circuits 9, 9% -B'(7-B0,& LQSXW 9$ *1' WGHE 92+ WGHE 9< '(76( RXWSXW 90 9; 92/ W7+/ W7/+ DDD Measurement points are given in Table 10. VOL and VOH are typical voltage output levels that occur with the output load. Fig 16. Input to output propagation delays Table 10. Measurement points Supply voltage Input J_DET VCC VCC(IO) VA VB VA VB VM VX VY 3.6 V 1.8 V 0.05 V 1.44 V 0.7 V 0.85 V 0.5VCC(IO) 0.2VCC(IO) 0.8VCC(IO) NCX8193 Product data sheet Input J_MIC Output DET, S/E All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 13 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention 9, (1LQSXW 90 *1' WHQ WGLV 92+ 9< -B0,& RXWSXW 9; *1' VZLWFK GLVDEOHG VZLWFK HQDEOHG VZLWFK GLVDEOHG DDD Measurement points are given in Table 11. Logic level: VOH is the typical output voltage that occurs with the output load. Fig 17. Enable and disable times (EN to J_MIC) 9, -B'(7 LQSXW 90 *1' WGLV 92+ 9< -B0,& RXWSXW *1' DDD Measurement points are given in Table 11. Logic level: VOH is the typical output voltage that occurs with the output load. Fig 18. Enable and disable times (J_DET to J_MIC) Table 11. Measurement points Supply Voltage Input J_DET Input EN Output J_MIC VCC VCC(IO) VM VM VX VY 3.6 V 1.8 V 1.44 V 0.5VCC(IO) 0.1VCC 0.9VCC NCX8193 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 14 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention 9&& ,2 9,+ (1 9&& 26&,//$725 $1' &21752/ 0,& 9&& ,2 -B'(7 9,+ -B0,& (1 26&,//$725 $1' &21752/ 0,& *1' 92 -B'(7 -B0,& 6( '(7 9 9&& *1' * &/ 9, 9 92 * &/ 9, DDD Test data is given in Table 12. Definitions test circuit: CL = Load capacitance including jig and probe capacitance. Fig 19. Test circuit for measuring switching times Table 12. Test data Supply voltage Input Load VCC VCC(IO) VI tr, tf CL 2.4 V to 5.25 V 1.6 V to VCC VCC  2.5 ns 5 pF NCX8193 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 15 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention 9&& ,2 (1 9&& 26&,//$725 $1' &21752/ 0,& -B'(7 -B0,& *1' * 9, 9, &/ 9 92 DDD Test data is given in Table 13. Definitions test circuit: CL = Load capacitance including jig and probe capacitance. Fig 20. Test circuit for measuring switching times Table 13. Test data Supply voltage Input Load VCC VCC(IO) VI(EN) VI(J_MIC) tr, tf CL 2.4 V to 5.25 V 1.6 V to VCC VCC(IO) VCC  2.5 ns 5 pF NCX8193 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 16 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention 15. Package outline ;4)1SODVWLFH[WUHPHO\WKLQTXDGIODWSDFNDJHQROHDGV WHUPLQDOVERG\[[PP 627 ; % ' $ WHUPLQDO LQGH[DUHD ( $ $ F GHWDLO; H H   & & $ % & Y Z E \ & \ / H     H WHUPLQDO LQGH[DUHD     'LPHQVLRQV 8QLW PP PD[ QRP PLQ PP VFDOH $  $ E F '          ( H H H / Y           Z \ \    1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 5HIHUHQFHV 2XWOLQH YHUVLRQ ,(& -('(& -(,7$ 627  02  VRWBSR (XURSHDQ SURMHFWLRQ ,VVXHGDWH   Fig 21. Package outline XQFN10 (SOT1160-2) package NCX8193 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 17 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention 16. Abbreviations Table 14. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MOSFET Metal-Oxide Semiconductor Field Effect Transistor THD Total Harmonic Distortion 17. Revision history Table 15. Revision history Document ID Release date Data sheet status Change notice Supersedes NCX8193 v.2 20141121 Product data sheet - NCX8193 v.1 Product data sheet - - Modifications: NCX8193 v.1 NCX8193 Product data sheet • Added application 20140709 All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 18 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention 18. Legal information 18.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 18.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 18.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. NCX8193 Product data sheet Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 19 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 18.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 19. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com NCX8193 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 21 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 20 of 21 NCX8193 NXP Semiconductors Audio jack detection and configuration with false detection prevention 20. Contents 1 2 3 4 5 6 7 7.1 7.2 8 9 10 11 12 13 13.1 14 14.1 15 16 17 18 18.1 18.2 18.3 18.4 19 20 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Application diagram . . . . . . . . . . . . . . . . . . . . . 6 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 Recommended operating conditions. . . . . . . . 7 Thermal characteristics . . . . . . . . . . . . . . . . . . 7 Static characteristics. . . . . . . . . . . . . . . . . . . . . 7 Test circuits and graphs . . . . . . . . . . . . . . . . . 10 Dynamic characteristics . . . . . . . . . . . . . . . . . 13 Waveform and test circuits . . . . . . . . . . . . . . . 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Contact information. . . . . . . . . . . . . . . . . . . . . 20 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP Semiconductors N.V. 2014. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 21 November 2014 Document identifier: NCX8193
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