NTB0104UK-Q100Z

NTB0104-Q100 Dual supply translating transceiver; auto direction sensing; 3-state Rev. 2 — 18 April 2013 Product data sheet 1. General description The NTB0104-Q100 is a 4-bit, dual supply translating transceiver with auto direction sensing, that enables bidirectional voltage level translation. It features two 4-bit input-output ports (An and Bn), one output enable input (OE) and two supply pins (VCC(A) and VCC(B)). VCC(A) can be supplied with any voltage between 1.2 V and 3.6 V. VCC(B) can be supplied with any voltage between 1.65 V and 5.5 V. The range of supply voltages makes the device suitable for translating between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins An and OE are referenced to VCC(A) and pins Bn are referenced to VCC(B). A LOW level at pin OE causes the outputs to assume a high-impedance OFF-state. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits  Automotive product qualification in accordance with AEC-Q100 (Grade 1)  Specified from 40 C to +85 C and from 40 C to +125 C  Wide supply voltage range:  VCC(A): 1.2 V to 3.6 V and VCC(B): 1.65 V to 5.5 V  IOFF circuitry provides partial Power-down mode operation  Inputs accept voltages up to 5.5 V  ESD protection:  MIL-STD-883, method 3015 Class 2 exceeds 2500 V for A port  MIL-STD-883, method 3015 Class 3B exceeds 15000 V for B port  HBM JESD22-A114E Class 2 exceeds 2500 V for A port  HBM JESD22-A114E Class 3B exceeds 15000 V for B port  MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 )  Latch-up performance exceeds 100 mA per JESD 78B Class II  Multiple package options NTB0104-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version NTB0104BQ-Q100 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1 very thin quad flat package; no leads; 14 terminals; body 2.5  3  0.85 mm NTB0104UK-Q100 40 C to +125 C WLCSP12 wafer level chip-size package, 12 bumps; NTB0104UK-Q100 body 1.20  1.60  0.56 mm. (Backside Coating included) 4. Marking Table 2. Marking Type number Marking code NTB0104BQ-Q100 B0104 NTB0104UK-Q100 t04 5. Functional diagram OE A1 B1 A2 B2 A3 B3 A4 B4 VCC(A) VCC(B) 001aam795 Fig 1. Logic symbol NTB0104_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 April 2013 © NXP B.V. 2013. All rights reserved. 2 of 23 NTB0104-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state 6. Pinning information 6.1 Pinning   & ' ()     17%4            "       % ! $  #  DDD     (1) This is not a supply pin, the substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad, however if it is soldered the solder land should remain floating or be connected to GND Fig 2. Pin configuration DHVQFN14 (SOT762-1) 17%4   $ % 9&&% $ $ % % 9&&$ $ % & % 2( $ & ' % *1' $ ' 7UDQVSDUHQWWRSYLHZ    7UDQVSDUHQWWRSYLHZ DDD Fig 3. 17%4 EDOO$ LQGH[DUHD  DDD Pin configuration WLCSP12 package Fig 4. Ball mapping for WLCSP12 6.2 Pin description Table 3. Pin description Symbol Pin Ball SOT762-1 WLCSP12 VCC(A) 1 B2 supply voltage A A1, A2, A3, A4 2, 3, 4, 5 A3, B3, C3, D3 data input or output (referenced to VCC(A)) n.c. 6, 9 - not connected NTB0104_Q100 Product data sheet Description All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 April 2013 © NXP B.V. 2013. All rights reserved. 3 of 23 NTB0104-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state Table 3. Pin description …continued Symbol Pin Ball SOT762-1 WLCSP12 Description GND 7 D2 ground (0 V) OE 8 C2 output enable input (active HIGH; referenced to VCC(A)) B4, B3, B2, B1 10, 11, 12, 13 D1, C1, B1, A1 data input or output (referenced to VCC(B)) VCC(B) 14 A2 supply voltage B 7. Functional description Table 4. Function table[1] Supply voltage Input Input/output VCC(A) VCC(B) OE An Bn 1.2 V to VCC(B) 1.65 V to 5.5 V L Z Z 1.2 V to VCC(B) 1.65 V to 5.5 V H input or output output or input GND[2] GND[2] X Z Z [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. [2] When either VCC(A) or VCC(B) is at GND level, the device goes into power-down mode. 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC(A) supply voltage A VCC(B) supply voltage B Conditions output voltage VO Active mode input clamping current VI < 0 V IOK output clamping current VO < 0 V IO output current VO = 0 V to VCCO ICC supply current ICC(A) or ICC(B) IGND ground current Tstg storage temperature total power dissipation Ptot Unit +6.5 V 0.5 +6.5 V 0.5 +6.5 V [1][2][3] 0.5 VCCO + 0.5 V [1] 0.5 +6.5 V 50 - mA 50 - mA - 50 mA - 100 mA 100 - mA 65 +150 C - 250 mW Power-down or 3-state mode IIK Max 0.5 [1] input voltage VI Min Tamb = 40 C to +125 C [2] [4] [1] The minimum input and minimum output voltage ratings may be exceeded if the input and output current ratings are observed. [2] VCCO is the supply voltage associated with the output. [3] VCCO + 0.5 V should not exceed 6.5 V. [4] For DHVQFN14 packages: above 60 C the value of Ptot derates linearly with 4.5 mW/K. NTB0104_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 April 2013 © NXP B.V. 2013. All rights reserved. 4 of 23 NTB0104-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state 9. Recommended operating conditions Table 6. Recommended operating conditions[1][2] Symbol Parameter VCC(A) Conditions Min Max Unit supply voltage A 1.2 3.6 V VCC(B) supply voltage B 1.65 5.5 V VI input voltage 0 5.5 V VO output voltage A port 0 3.6 V B port 0 5.5 V 40 +125 C - 40 ns/V Power-down or 3-state mode; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V Tamb ambient temperature t/V input transition rise and fall rate VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V [1] Hold the A and B sides of an unused I/O pair in the same state, either both at VCCI or both at GND. [2] VCC(A) must be less than or equal to VCC(B). 10. Static characteristics Table 7. Typical static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 C. Symbol Parameter Conditions Min Typ Max Unit VOH HIGH-level output voltage A port; VCC(A) = 1.2 V; IO = 20 A - 1.1 - V VOL LOW-level output voltage A port; VCC(A) = 1.2 V; IO = 20 A - 0.09 - V II input leakage current OE input; VI = 0 V to 3.6 V; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V - - 1 A IOZ OFF-state output A or B port; VO = 0 V to VCCO; VCC(A) = 1.2 V to 3.6 V; current VCC(B) = 1.65 V to 5.5 V - - 1 A IOFF power-off leakage current A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; VCC(B) = 0 V to 5.5 V - - 1 A B port; VI or VO = 0 V to 5.5 V; VCC(B) = 0 V; VCC(A) = 0 V to 3.6 V - - 1 A ICC(A); VCC(A) = 1.2 V; VCC(B) = 1.65 V to 5.5 V - 0.05 - A ICC(B); VCC(A) = 1.2 V; VCC(B) = 1.65 V to 5.5 V - 3.3 - A ICC(A) + ICC(B); VCC(A) = 1.2 V; VCC(B) = 1.65 V to 5.5 V - 3.5 - A supply current ICC VI = 0 V or VCCI; IO = 0 A [1] [2] CI input capacitance OE input; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V - 2.8 - pF CI/O input/output capacitance A port; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V - 4.0 - pF B port; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V - 7.5 - pF [1] VCCO is the supply voltage associated with the output. [2] VCCI is the supply voltage associated with the input. NTB0104_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 April 2013 © NXP B.V. 2013. All rights reserved. 5 of 23 NTB0104-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state Table 8. Typical supply current At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 C. VCC(A) VCC(B) Unit 1.8 V 2.5 V 3.3 V 5.0 V ICC(A) ICC(B) ICC(A) ICC(B) ICC(A) ICC(B) ICC(A) ICC(B) 1.2 V 10 10 10 10 10 20 10 1050 nA 1.5 V 10 10 10 10 10 10 10 650 nA 1.8 V 10 10 10 10 10 10 10 350 nA 2.5 V - - 10 10 10 10 10 40 nA 3.3 V - - - - 10 10 10 10 nA Table 9. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH VIL VOH 40 C to +85 C Conditions Min Max Min Max 0.65VCCI - 0.65VCCI - V - 0.35VCCI - 0.35VCCI V VCCO  0.4 - VCCO  0.4 - V VCCO  0.4 - VCCO  0.4 - V A port; VCC(A) = 1.4 V to 3.6 V - 0.4 - 0.4 V B port; VCC(B) = 1.65 V to 5.5 V - 0.4 - 0.4 V - 2 - 5 A - 2 - 10 A HIGH-level input voltage A or B port and OE input LOW-level input voltage A or B port and OE input HIGH-level output voltage A or B port; IO = 20 A LOW-level output voltage Unit [1] VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V [1] VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V [2] A port; VCC(A) = 1.4 V to 3.6 V B port; VCC(B) = 1.65 V to 5.5 V VOL 40 C to +125 C A or B port; IO = 20 A [2] II input leakage current OE input; VI = 0 V to 3.6 V; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V IOZ OFF-state output current A or B port; VO = 0 V or VCCO; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V IOFF power-off leakage current A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; VCC(B) = 0 V to 5.5 V - 2 - 10 A B port; VI or VO = 0 V to 5.5 V; VCC(B) = 0 V; VCC(A) = 0 V to 3.6 V - 2 - 10 A NTB0104_Q100 Product data sheet [2] All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 April 2013 © NXP B.V. 2013. All rights reserved. 6 of 23 NTB0104-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state Table 9. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter ICC supply current 40 C to +85 C Conditions 40 C to +125 C Unit Min Max Min Max OE = LOW; VCC(A) = 1.4 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V - 5 - 15 A OE = HIGH; VCC(A) = 1.4 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V - 5 - 20 A VCC(A) = 3.6 V; VCC(B) = 0 V - 2 - 15 A VCC(A) = 0 V; VCC(B) = 5.5 V - 2 - 15 A OE = LOW; VCC(A) = 1.4 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V - 5 - 15 A OE = HIGH; VCC(A) = 1.4 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V - 5 - 20 A VCC(A) = 3.6 V; VCC(B) = 0 V - 2 - 15 A VCC(A) = 0 V; VCC(B) = 5.5 V - 2 - 15 A - 10 - 40 A VI = 0 V or VCCI; IO = 0 A [1] ICC(A) ICC(B) ICC(A) + ICC(B) VCC(A) = 1.4 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V [1] VCCI is the supply voltage associated with the input. [2] VCCO is the supply voltage associated with the output. 11. Dynamic characteristics Table 10. Typical dynamic characteristics for temperature 25 C[1] Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for waveforms see Figure 5 and Figure 6. Symbol Parameter Conditions VCC(B) Unit 1.8 V 2.5 V 3.3 V 5.0 V A to B 5.9 4.8 4.4 4.2 ns B to A 5.6 4.8 4.5 4.4 ns VCC(A) = 1.2 V; Tamb = 25 C tpd propagation delay ten enable time OE to A, B 0.5 0.5 0.5 0.5 s tdis disable time OE to A; no external load [2] 8.3 8.3 8.3 8.3 ns OE to B; no external load [2] 10.4 9.4 9.3 8.8 ns 81 69 83 68 ns OE to A tt transition time NTB0104_Q100 Product data sheet OE to B 81 69 83 68 ns A port 4.0 4.0 4.1 4.1 ns B port 2.6 2.0 1.7 1.4 ns All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 April 2013 © NXP B.V. 2013. All rights reserved. 7 of 23 NTB0104-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state Table 10. Typical dynamic characteristics for temperature 25 C[1] …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for waveforms see Figure 5 and Figure 6. Symbol Parameter Conditions tsk(o) output skew time between channels tW pulse width data inputs fdata data rate [1] VCC(B) Unit 1.8 V 2.5 V 3.3 V 5.0 V 0.2 0.2 0.2 0.2 [3] ns 15 13 13 13 ns 70 80 80 80 Mbps tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. tt is the same as tTHL and tTLH [2] Delay between OE going LOW and when the outputs are actually disabled. [3] Skew between any two outputs of the same package switching in the same direction. Table 11. Dynamic characteristics for temperature range 40 C to +85 C[1] Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for wave forms see Figure 5 and Figure 6. Symbol Parameter Conditions VCC(B) Unit 1.8 V  0.15 V 2.5 V  0.2 V 3.3 V  0.3 V 5.0 V  0.5 V Min Max Min Max Min Max Min Max A to B 1.4 12.9 1.2 10.1 1.1 10.0 0.8 9.9 B to A 0.9 14.2 0.7 12.0 0.4 11.7 0.3 13.7 ns VCC(A) = 1.5 V  0.1 V tpd propagation delay ns s ten enable time OE to A, B - 1.0 - 1.0 - 1.0 - tdis disable time OE to A; no external load [2] 1.0 12.9 1.0 12.9 1.0 12.9 1.0 12.9 ns OE to B; no external load [2] 1.0 18.7 1.0 15.8 1.0 15.1 1.0 14.4 ns - 320 - 260 - 260 - 280 ns OE to A OE to B tt transition time A port B port tsk(o) output skew time between channels tW pulse width data inputs fdata data rate [3] 1.0 - 200 - 200 - 200 - 200 ns 0.9 5.1 0.9 5.1 0.9 5.1 0.9 5.1 ns 0.9 4.7 0.6 3.2 0.5 2.5 0.4 2.7 ns - 0.5 - 0.5 - 0.5 - 0.5 ns 25 - 25 - 25 - 25 - ns - 40 - 40 - 40 - 40 Mbps VCC(A) = 1.8 V  0.15 V tpd ten tdis tt propagation delay A to B 1.6 11.0 1.4 7.7 1.3 6.8 1.2 6.5 ns B to A 1.5 12.0 1.3 8.4 1.0 7.6 0.9 7.1 ns enable time OE to A, B disable time transition time NTB0104_Q100 Product data sheet - 1.0 - 1.0 - 1.0 - 1.0 s OE to A; no external load [2] 1.0 11.7 1.0 11.7 1.0 11.7 1.0 11.7 ns OE to B; no external load [2] 12.7 ns 1.0 16.9 1.0 14.5 1.0 13.7 1.0 OE to A - 260 - 230 - 230 - 230 ns OE to B - 200 - 200 - 200 - 200 ns A port 0.8 4.1 0.8 4.1 0.8 4.1 0.8 4.1 ns B port 0.9 4.7 0.6 3.2 0.5 2.5 0.4 2.7 ns All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 April 2013 © NXP B.V. 2013. All rights reserved. 8 of 23 NTB0104-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state Table 11. Dynamic characteristics for temperature range 40 C to +85 C[1] …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for wave forms see Figure 5 and Figure 6. Symbol Parameter Conditions VCC(B) Unit 1.8 V  0.15 V 2.5 V  0.2 V 3.3 V  0.3 V 5.0 V  0.5 V tsk(o) output skew time between channels tW pulse width data inputs fdata data rate [3] Min Max Min Max Min Max Min Max - 0.5 - 0.5 - 0.5 - 0.5 ns 20 - 17 - 17 - 17 - ns - 49 - 60 - 60 - 60 Mbps VCC(A) = 2.5 V  0.2 V tpd ten propagation delay A to B - - 1.1 6.3 1.0 5.2 0.9 4.7 ns B to A - - 1.2 6.6 1.1 5.1 0.9 4.4 ns enable time OE to A, B 1.0 - 1.0 - 1.0 s disable time tdis transition time tt - - - OE to A; no external load [2] - - 1.0 9.7 1.0 9.7 1.0 9.7 ns OE to B; no external load [2] - - 1.0 12.9 1.0 12.0 1.0 11.0 ns OE to A - - - 200 - 200 - 200 ns OE to B - - - 200 - 200 - 200 ns A port - - 0.7 3.0 0.7 3.0 0.7 3.0 ns B port - - 0.7 3.2 0.5 2.5 0.4 2.7 ns - - - 0.5 - 0.5 - 0.5 ns tsk(o) output skew time between channels tW pulse width data inputs fdata data rate [3] - - 12 - 10 - 10 - - - - 85 - 100 - 100 Mbps ns ns VCC(A) = 3.3 V  0.3 V tpd propagation delay A to B - - - - 0.9 4.7 0.8 4.0 B to A - - - - 1.0 4.9 0.9 3.8 ns ten enable time OE to A, B - - - - - 1.0 - 1.0 s tdis disable time OE to A; no external load [2] - - - - 1.0 9.4 1.0 9.4 ns OE to B; no external load [2] - - - - 1.0 11.3 1.0 10.4 ns OE to A - - - - - 260 - 260 ns OE to B - - - - - 200 - 200 ns A port - - - - 0.7 2.5 0.7 2.5 ns - - - - 0.5 2.5 0.4 2.7 ns - - - - - 0.5 - 0.5 ns - - - - 10 - 10 - ns - - - - - 100 - 100 transition time tt B port tsk(o) output skew time between channels tW pulse width data inputs fdata data rate [1] [3] Mbps tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. tt is the same as tTHL and tTLH [2] Delay between OE going LOW and when the outputs are disabled. [3] Skew between any two outputs of the same package switching in the same direction. NTB0104_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 April 2013 © NXP B.V. 2013. All rights reserved. 9 of 23 NTB0104-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state Table 12. Dynamic characteristics for temperature range 40 C to +125 C[1] Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for wave forms see Figure 5 and Figure 6. Symbol Parameter Conditions VCC(B) Unit 1.8 V  0.15 V 2.5 V  0.2 V 3.3 V  0.3 V 5.0 V  0.5 V Min Max Min Max Min Max Min Max VCC(A) = 1.5 V  0.1 V tpd propagation delay A to B 1.4 15.9 1.2 13.1 1.1 13.0 0.8 12.9 ns B to A 0.9 17.2 0.7 15.0 0.4 14.7 0.3 16.7 ns ten enable time OE to A, B - 1.0 - 1.0 - 1.0 - OE to A; no external load [2] 1.0 13.5 1.0 13.5 1.0 13.5 1.0 13.5 ns OE to B; no external load [2] 1.0 19.9 1.0 16.8 1.0 16.1 1.0 15.2 ns OE to A - 340 - 280 - 280 - 300 ns OE to B - 220 - 220 - 220 - 220 ns 0.9 7.1 0.9 7.1 0.9 7.1 0.9 7.1 ns 0.9 6.5 0.6 5.2 0.5 4.8 0.4 4.7 ns - 0.5 - 0.5 - 0.5 - 0.5 ns 25 - 25 - 25 - 25 - ns - 40 - 40 - 40 - 40 Mbps ns tdis tt disable time transition time A port B port tsk(o) output skew time between channels tW pulse width data inputs fdata data rate [3] 1.0 s VCC(A) = 1.8 V  0.15 V tpd ten tdis tt propagation delay A to B 1.6 14.0 1.4 10.7 1.3 9.8 1.2 9.5 B to A 1.5 15.0 1.3 11.4 1.0 10.6 0.9 10.1 ns enable time OE to A, B disable time transition time 1.0 - 1.0 - 1.0 - OE to A; no external load 1.0 12.3 1.0 12.3 1.0 12.3 1.0 12.3 ns OE to B; no external load [2] 1.0 18.1 1.0 15.3 1.0 14.5 1.0 13.5 ns OE to A - 280 - 250 - 250 - 250 ns OE to B - 220 - 220 - 220 - 220 ns A port 0.8 6.2 0.8 6.1 0.8 6.1 0.8 6.1 ns B port 0.9 5.8 0.6 5.2 0.5 4.8 0.4 4.7 ns - 0.5 - 0.5 - 0.5 - 0.5 ns 22 - 19 - 19 - 19 - ns - 45 - 55 - 55 - 55 Mbps ns tsk(o) output skew time between channels tW pulse width data inputs fdata data rate [3] 1.0 s [2] VCC(A) = 2.5 V  0.2 V tpd propagation delay A to B - - 1.1 9.3 1.0 8.2 0.9 7.7 B to A - - 1.2 9.6 1.1 8.1 0.9 7.4 ns ten enable time OE to A, B - - - 1.0 - 1.0 - 1.0 s tdis disable time OE to A; no external load [2] - - 1.0 10.1 1.0 10.1 1.0 10.1 ns OE to B; no external load [2] - - 1.0 13.5 1.0 12.7 1.0 11.7 ns OE to A - - - 220 - 220 - 220 ns OE to B - - - 220 - 220 - 220 ns A port - - 0.7 5.0 0.7 5.0 0.7 5.0 ns B port - - 0.7 4.6 0.5 4.8 0.4 4.7 ns tt transition time NTB0104_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 April 2013 © NXP B.V. 2013. All rights reserved. 10 of 23 NTB0104-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state Table 12. Dynamic characteristics for temperature range 40 C to +125 C[1] Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for wave forms see Figure 5 and Figure 6. Symbol Parameter Conditions VCC(B) Unit 1.8 V  0.15 V 2.5 V  0.2 V 3.3 V  0.3 V 5.0 V  0.5 V tsk(o) output skew time between channels tW pulse width data inputs; fdata data rate [3] Min Max Min Max Min Max Min Max - - - 0.5 - 0.5 - 0.5 ns - - 14 - 13 - 10 - ns - - - 75 - 80 - 100 Mbps VCC(A) = 3.3 V  0.3 V tpd ten propagation delay A to B - - - - 0.9 7.7 0.8 7.0 ns B to A - - - - 1.0 7.9 0.9 6.8 ns enable time OE to A, B 1.0 - 1.0 s ns disable time tdis transition time tt - - - - - OE to A; no external load [2] - - - - 1.0 9.9 1.0 9.9 OE to B; no external load [2] - - - - 1.0 12.1 1.0 10.9 ns OE to A - - - - - 280 - 280 ns OE to B - - - - - 220 - 220 ns A port - - - - 0.7 4.5 0.7 4.5 ns B port - - - - 0.5 4.1 0.4 4.7 ns - - - - - 0.5 - 0.5 ns - - - - 10 - 10 - ns - - - - - 100 - 100 tsk(o) output skew time between channels tW pulse width data inputs fdata data rate [1] [3] Mbps tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. tt is the same as tTHL and tTLH [2] Delay between OE going LOW and when the outputs are disabled. [3] Skew between any two outputs of the same package switching in the same direction. NTB0104_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 April 2013 © NXP B.V. 2013. All rights reserved. 11 of 23 NTB0104-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state Table 13. Typical power dissipation capacitance Voltages are referenced to GND (ground = 0 V).[1][2] Symbol Parameter Conditions VCC(A) 1.2 V 1.2 V 1.5 V 1.8 V Unit 2.5 V 2.5 V 3.3 V VCC(B) 1.8 V 5.0 V 1.8 V 1.8 V 2.5 V 5.0 V 3.3 V to 5.0 V 5 5 5 5 5 5 5 pF Tamb = 25 C power dissipation capacitance CPD outputs enabled; OE = VCC(A) A port: (direction A to B) A port: (direction B to A) 8 8 8 8 8 8 8 pF B port: (direction A to B) 18 18 18 18 18 18 18 pF B port: (direction B to A) 13 16 12 12 12 12 13 pF A port: (direction A to B) 0.12 0.12 0.04 0.05 0.08 0.08 0.07 pF A port: (direction B to A) 0.01 0.01 0.01 0.01 0.01 0.01 0.01 pF B port: (direction A to B) 0.01 0.01 0.01 0.01 0.01 0.01 0.01 pF B port: (direction B to A) 0.07 0.09 0.07 0.07 0.05 0.09 0.09 pF outputs disabled; OE = GND [1] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of the outputs. [2] fi = 10 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL =  . 12. Waveforms VI An, Bn input VM GND tPHL VOH Bn, An output tPLH 90 % VM VOL 10 % tTHL tTLH 001aal918 Measurement points are given in Table 14. VOL and VOH are typical output voltage levels that occur with the output load. Fig 5. The data input (An, Bn) to data output (Bn, An) propagation delay times NTB0104_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 April 2013 © NXP B.V. 2013. All rights reserved. 12 of 23 NTB0104-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state VI OE input VM GND tPLZ output LOW-to-OFF OFF-to-LOW tPZL VCCO VM VX VOL tPHZ VOH tPZH VY output HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs disabled outputs enabled 001aal919 Measurement points are given in Table 14. VOL and VOH are typical output voltage levels that occur with the output load. Fig 6. Enable and disable times Table 14. Measurement points[1] Supply voltage Input Output VCCO VM VM VX VY 1.2 V 0.5VCCI 0.5VCCO VOL + 0.1 V VOH  0.1 V 1.5 V  0.1 V 0.5VCCI 0.5VCCO VOL + 0.1 V VOH  0.1 V 1.8 V  0.15 V 0.5VCCI 0.5VCCO VOL + 0.15 V VOH  0.15 V 2.5 V  0.2 V 0.5VCCI 0.5VCCO VOL + 0.15 V VOH  0.15 V 3.3 V  0.3 V 0.5VCCI 0.5VCCO VOL + 0.3 V VOH  0.3 V 5.0 V  0.5 V 0.5VCCI 0.5VCCO VOL + 0.3 V VOH  0.3 V [1] VCCI is the supply voltage associated with the input and VCCO is the supply voltage associated with the output. NTB0104_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 April 2013 © NXP B.V. 2013. All rights reserved. 13 of 23 NTB0104-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VEXT VCC VI RL VO G DUT CL RL 001aal920 Test data is given in Table 15. All input pulses are supplied by generators having the following characteristics: PRR  10 MHz; ZO = 50 ; dV/dt  1.0 V/ns. RL = Load resistance. CL = Load capacitance including jig and probe capacitance. VEXT = External voltage for measuring switching times. Fig 7. Table 15. Test circuit for measuring switching times Test data Supply voltage Input VCC(A) VI[1] VCC(B) 1.2 V to 3.6 V 1.65 V to 5.5 V VCCI Load VEXT t/V CL RL[2]  1.0 ns/V 15 pF 50 k, 1 M open tPLH, tPHL tPZH, tPHZ tPZL, tPLZ[3] open 2VCCO [1] VCCI is the supply voltage associated with the input. [2] For measuring data rate, pulse width, propagation delay and output rise and fall measurements, RL = 1 M. For measuring enable and disable times, RL = 50 k. [3] VCCO is the supply voltage associated with the output. NTB0104_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 April 2013 © NXP B.V. 2013. All rights reserved. 14 of 23 NTB0104-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state 13. Application information 13.1 Applications Voltage level-translation applications. The NTB0104-Q100 can be used to interface between devices or systems operating at different supply voltages. See Figure 8 for a typical operating circuit using the NTB0104-Q100. 9 9 9&&$ —) 9 9&&% —) 9 2( 6