NTS0104
Dual supply translating transceiver; open drain; auto direction sensing
Rev. 2 — 27 April 2011 Product data sheet
1. General description
The NTS0104 is a 4-bit, dual supply translating transceiver with auto direction sensing, that enables bidirectional voltage level translation. It features two 4-bit input-output ports (An and Bn), one output enable input (OE) and two supply pins (VCC(A) and VCC(B)). VCC(A) can be supplied at any voltage between 1.65 V and 3.6 V and VCC(B) can be supplied at any voltage between 2.3 V and 5.5 V, making the device suitable for translating between any of the voltage nodes (1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins An and OE are referenced to VCC(A) and pins Bn are referenced to VCC(B). A LOW level at pin OE causes the outputs to assume a high-impedance OFF-state. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
2. Features and benefits
Wide supply voltage range: VCC(A): 1.65 V to 3.6 V and VCC(B): 2.3 V to 5.5 V Maximum data rates: Push-pull: 50 Mbps IOFF circuitry provides partial Power-down mode operation Inputs accept voltages up to 5.5 V ESD protection: HBM JESD22-A114E Class 2 exceeds 2500 V for A port HBM JESD22-A114E Class 3B exceeds 8000 V for B port MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1500 V IEC61000-4-2 contact discharge exceeds 8000 V for B port Latch-up performance exceeds 100 mA per JESD 78B Class II Multiple package options Specified from −40 °C to +85 °C and −40 °C to +125 °C
3. Applications
I2C/SMBus UART GPIO
NXP Semiconductors
NTS0104
Dual supply translating transceiver; open drain; auto direction sensing
4. Ordering information
Table 1. Ordering information Package Temperature range NTS0104D NTS0104PW NTS0104BQ Name Description plastic small outline package; 14 leads; body width 3.9 mm plastic thin shrink small outline package; 14 leads; body width 4.4 mm Version SOT108-1 SOT402-1 SOT762-1 Type number
−40 °C to +125 °C SO14 −40 °C to +125 °C TSSOP14
−40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm −40 °C to +125 °C XQFN16 −40 °C to +125 °C XQFN12 plastic, extremely thin quad flat package; no leads; 16 terminals; body 1.80 × 2.60 × 0.50 mm plastic, extremely thin quad flat package; no leads; 12 terminals; body 1.70 × 2.0 × 0.50 mm
NTS0104GU16 NTS0104GU12
SOT1161-1 SOT1174-1
5. Marking
Table 2. NTS0104D NTS0104PW NTS0104BQ NTS0104GU16 NTS0104GU12 Marking Marking code NTS0104D NTS0104 S0104 s4 s4 Type number
NTS0104
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Product Specification
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NTS0104
Dual supply translating transceiver; open drain; auto direction sensing
6. Functional diagram
GATE BIAS OE
A1
B1
A2
B2
GATE BIAS A3
B3
GATE BIAS A4
B4
VCC(A) GATE BIAS
VCC(B)
001aan110
Fig 1.
Logic symbol
NTS0104
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Product Specification
Rev. 2 — 27 April 2011
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NTS0104
Dual supply translating transceiver; open drain; auto direction sensing
7. Pinning information
7.1 Pinning
NTS0104
VCC(A) 2 3 4 5 6 7 GND OE 8 GND(1) 1 terminal 1 index area 14 VCC(B) 13 B1 12 B2 11 B3 10 B4 9 n.c.
NTS0104
A1 VCC(A) A1 A2 A3 A4 n.c. GND 1 2 3 4 5 6 7
001aan111
14 VCC(B) 13 B1 12 B2 11 B3 10 B4 9 8 n.c. OE
A2 A3 A4 n.c.
001aan112
Transparent top view
(1) This is not a supply pin, the substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad however if it is soldered the solder land should remain floating or be connected to GND.
Fig 2.
Pin configuration SO14 (SOT108-1) and TSSOP14 (SOT402-1)
Fig 3.
Pin configuration DHVQFN14 (SOT762-1)
16 VCC(A)
terminal 1 index area
13 VCC(B)
15 n.c.
14 n.c.
NTS0104
12 OE terminal 1 index area VCC(A) 1
A1 1 A2 2
12 B1 11 B2
11 VCC(B) 10 B1 9 B2 8 B3 7 B4
001aan114
NTS0104
A3 3 A4 4 10 B3 9 B4
A1 2 A2 3 A3 4 A4 5
GND 6
GND 7
001aan113
Transparent top view
Transparent top view
Fig 4. Pin configuration XQFN16 (SOT1161-1)
Fig 5.
Pin configuration XQFN12 (SOT1174-1)
NTS0104
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GND 6
n.c. 5
OE 8
© NXP B.V. 2011. All rights reserved.
Product Specification
Rev. 2 — 27 April 2011
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NTS0104
Dual supply translating transceiver; open drain; auto direction sensing
7.2 Pin description
Table 3. Symbol Pin description Pin SOT108-1, SOT402-1 SOT1161-1 and SOT762-1 VCC(A) n.c. GND OE VCC(B) 1 6, 9 7 8 14 16 1, 2, 3, 4 5, 14, 15 6, 7 8 9, 10, 11, 12 13 A1, A2, A3, A4 2, 3, 4, 5 SOT1174-1 1 2, 3, 4, 5 6 12 7, 8, 9, 10 11 supply voltage A data input or output (referenced to VCC(A)) not connected ground (0 V) output enable input (active HIGH; referenced to VCC(A)) data input or output (referenced to VCC(B)) supply voltage B Description
B4, B3, B2, B1 10, 11, 12, 13
8. Functional description
Table 4. VCC(A) 1.65 V to VCC(B) 1.65 V to VCC(B) GND[2]
[1] [2]
Function table[1] Input VCC(B) 2.3 V to 5.5 V 2.3 V to 5.5 V GND[2] OE L H X Input/output An Z input or output Z Bn Z output or input Z
Supply voltage
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. When either VCC(A) or VCC(B) is at GND level, the device goes into power-down mode.
9. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC(A) VCC(B) VI VO Parameter supply voltage A supply voltage B input voltage output voltage A port and OE input B port Active mode A or B port Power-down or 3-state mode A port B port IIK IOK IO ICC input clamping current output clamping current output current supply current VI < 0 V VO < 0 V VO = 0 V to VCCO ICC(A) or ICC(B)
[2] [1] [1][2] [1][2] [1][2]
Conditions
Min −0.5 −0.5 −0.5 −0.5 −0.5 −0.5 −0.5 −50 −50 -
Max +6.5 +6.5 +6.5 +6.5 VCCO + 0.5 +4.6 +6.5 ±50 100
Unit V V V V V V V mA mA mA mA
NTS0104
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Product Specification
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NTS0104
Dual supply translating transceiver; open drain; auto direction sensing
Table 5. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol IGND Tstg Ptot
[1] [2] [3]
Parameter ground current storage temperature total power dissipation
Conditions
Min −100 −65
Max +150 250
Unit mA °C mW
Tamb = −40 °C to +125 °C
[3]
-
The minimum input and minimum output voltage ratings may be exceeded if the input and output current ratings are observed. VCCO is the supply voltage associated with the output. For SO14 packages: above 70 °C the value of Ptot derates linearly at 8 mW/K. For TSSOP14 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K. For DHVQFN14 packages: above 60 °C the value of Ptot derates linearly at 4.5 mW/K. For XQFN12 packages: above 128 °C the value of Ptot derates linearly with 11.5 mW/K. For XQFN16 packages: above 135 the value of Ptot derates linearly at 16.9 mW/K.
10. Recommended operating conditions
Table 6. Symbol VCC(A) VCC(B) Tamb Δt/ΔV Recommended operating conditions[1][2] Parameter supply voltage A supply voltage B ambient temperature input transition rise and fall rate A or B port; push-pull driving VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V OE input VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V
[1] [2]
Conditions
Min 1.65 2.3 −40 -
Max 3.6 5.5 +125 10
Unit V V °C ns/V
-
10
ns/V
The A and B sides of an unused I/O pair must be held in the same state, both at VCCI or both at GND. VCC(A) must be less than or equal to VCC(B).
11. Static characteristics
Table 7. Typical static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 °C. Symbol Parameter II IOZ IOFF input leakage current Conditions OE input; VI = 0 V to 3.6 V; VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V
[1]
Min -
Typ 2
Max ±1 ±1 ±1 ±1 -
Unit μA μA μA μA pF
OFF-state output A or B port; VO = 0 V or VCCO; VCC(A) = 1.65 V to 3.6 V; current VCC(B) = 2.3 V to 5.5 V power-off leakage current A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; VCC(B) = 0 V to 5.5 V B port; VI or VO = 0 V to 5.5 V; VCC(B) = 0 V; VCC(A) = 0 V to 3.6 V
CI
input capacitance
OE input; VCC(A) = 3.3 V; VCC(B) = 3.3 V
NTS0104
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Product Specification
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NTS0104
Dual supply translating transceiver; open drain; auto direction sensing
Table 7. Typical static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 °C. Symbol Parameter CI/O input/output capacitance Conditions A port B port A or B port; VCC(A) = 3.3 V; VCC(B) = 3.3 V
[1] VCCO is the supply voltage associated with the output.
Min -
Typ 4 7 9
Max -
Unit pF pF pF
Table 8. Typical supply current At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 °C. VCC(A) 2.5 V ICC(A) 1.8 V 2.5 V 3.3 V 0.1 0.1 ICC(B) 0.5 0.1 ICC(A) 0.1 0.1 0.1 VCC(B) 3.3 V ICC(B) 1.5 0.8 0.1 ICC(A) 0.1 0.1 0.1 5.0 V ICC(B) 4.6 3.8 2.8 μA μA μA Unit
Table 9. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH HIGH-level input voltage Conditions A port VCC(A) = 1.65 V to 1.95 V; VCC(B) = 2.3 V to 5.5 V VCC(A) = 2.3 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V B port VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V OE input VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V VIL LOW-level input voltage A or B port VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V OE input VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V VOH HIGH-level output voltage LOW-level output voltage A or B port; IO = −20 μA VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V A or B port; IO = 1 mA VI ≤ 0.15 V; VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V
[2] [1] [1]
−40 °C to +85 °C Min VCCI − 0.2 VCCI − 0.4 Max -
−40 °C to +125 °C Min VCCI − 0.2 VCCI − 0.4 Max -
Unit
V V
[1]
VCCI − 0.4
-
VCCI − 0.4
-
V
0.65VCC(A)
-
0.65VCC(A)
-
V
-
0.15
-
0.15
V
-
0.35VCC(A)
-
0.35VCC(A) V
0.67VCCO
-
0.67VCCO
-
V
VOL
[2]
-
0.4
-
0.4
V
NTS0104
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Product Specification
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NTS0104
Dual supply translating transceiver; open drain; auto direction sensing
Table 9. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter II input leakage current OFF-state output current power-off leakage current supply current Conditions OE input; VI = 0 V to 3.6 V; VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V A or B port; VO = 0 V or VCCO; VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; VCC(B) = 0 V to 5.5 V B port; VI or VO = 0 V to 3.6 V; VCC(B) = 0 V; VCC(A) = 0 V to 3.6 V VI = 0 V or VCCI; IO = 0 A ICC(A) VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V VCC(A) = 3.6 V; VCC(B) = 0 V VCC(A) = 0 V; VCC(B) = 5.5 V ICC(B) VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V VCC(A) = 3.6 V; VCC(B) = 0 V VCC(A) = 0 V; VCC(B) = 5.5 V ICC(A) + ICC(B) VCC(A) = 1.65 V to 3.6 V; VCC(B) = 2.3 V to 5.5 V
[1] [2] VCCI is the supply voltage associated with the input. VCCO is the supply voltage associated with the output.
[1] [2]
−40 °C to +85 °C Min Max ±2
−40 °C to +125 °C Min Max ±12
Unit μA
IOZ
-
±2
-
±12
μA
IOFF
-
±2 ±2
-
±12 ±12
μA μA
ICC
-
2.4 2.2 −1 12 −1 1 14.4
-
15 15 −8 30 −5 6 45
μA μA μA μA μA μA μA
12. Dynamic characteristics
Table 10. Dynamic characteristics for temperature range −40 °C to +85 °C[1] Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8; for wave forms see Figure 6 and Figure 7. Symbol Parameter Conditions 2.5 V ± 0.2 V Min VCC(A) = 1.8 V ± 0.15 V tPHL tPLH tPHL tPLH HIGH to LOW propagation delay LOW to HIGH propagation delay HIGH to LOW propagation delay LOW to HIGH propagation delay A to B A to B B to A B to A 4.6 6.8 4.4 5.3 4.7 6.8 4.5 4.5 5.8 7.0 4.7 0.5 ns ns ns ns Max VCC(B) 3.3 V ± 0.3 V Min Max 5.0 V ± 0.5 V Min Max Unit
NTS0104
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Product Specification
Rev. 2 — 27 April 2011
8 of 26
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NTS0104
Dual supply translating transceiver; open drain; auto direction sensing
Table 10. Dynamic characteristics for temperature range −40 °C to +85 °C[1] Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8; for wave forms see Figure 6 and Figure 7. Symbol Parameter Conditions 2.5 V ± 0.2 V Min ten tdis enable time disable time OE to A; B OE to A; no external load OE to B; no external load OE to A OE to B tTLH LOW to HIGH output transition time HIGH to LOW output transition time output skew time pulse width data rate HIGH to LOW propagation delay LOW to HIGH propagation delay HIGH to LOW propagation delay LOW to HIGH propagation delay enable time disable time A to B A to B B to A B to A OE to A; B OE to A; no external load OE to B; no external load OE to A OE to B tTLH LOW to HIGH output transition time HIGH to LOW output transition time output skew time pulse width data rate HIGH to LOW propagation delay LOW to HIGH propagation delay A to B A to B A port B port A port B port between channels data inputs
[3] [2] [2] [2] [2]
VCC(B) 3.3 V ± 0.3 V Min 2.3 2.7 1.9 2.8 20 2.6 2.9 1.9 2.4 20 Max 200 35 35 230 200 9.3 9.1 6.0 7.5 0.7 50 3.3 4.1 3.6 1.6 200 35 35 200 200 6.6 7.9 5.5 6.7 0.7 50 2.4 4.2 5.0 V ± 0.5 V Min 1.8 2.7 1.7 2.8 20 1.8 2.4 1.8 2.6 20 Max 200 35 35 230 200 7.6 7.6 13.3 10.0 0.7 50 3.4 4.4 4.3 0.7 200 35 35 200 200 6.2 6.8 5.3 6.6 0.7 50 3.1 4.4 Max 200 35 35 230 200 9.5 10.8 5.9 7.6 0.7 50 3.2 3.5 3.0 2.5 200 35 35 200 200 7.4 8.3 5.7 7.8 0.7 50 -
Unit
3.2 3.3 2.0 2.9
[3]
ns ns ns ns ns ns ns ns ns ns ns Mbps ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Mbps ns ns
A port B port A port B port between channels data inputs
tTHL
tsk(o) tW fdata tPHL tPLH tPHL tPLH ten tdis
20 2.8 3.2 1.9 2.2 20 -
VCC(A) = 2.5 V ± 0.2 V
tTHL
tsk(o) tW fdata tPHL tPLH
VCC(A) = 3.3 V ± 0.3 V
NTS0104
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© NXP B.V. 2011. All rights reserved.
Product Specification
Rev. 2 — 27 April 2011
9 of 26
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NTS0104
Dual supply translating transceiver; open drain; auto direction sensing
Table 10. Dynamic characteristics for temperature range −40 °C to +85 °C[1] Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8; for wave forms see Figure 6 and Figure 7. Symbol Parameter Conditions 2.5 V ± 0.2 V Min tPHL tPLH ten tdis HIGH to LOW propagation delay LOW to HIGH propagation delay enable time disable time B to A B to A OE to A; B OE to A; no external load OE to B; no external load OE to A OE to B tTLH LOW to HIGH output transition time HIGH to LOW output transition time output skew time pulse width data rate
ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. [2] [3] Delay between OE going LOW and when the outputs are actually disabled. Skew between any two outputs of the same package switching in the same direction.
[2] [2]
VCC(B) 3.3 V ± 0.3 V Min 2.3 2.5 2.0 2.3 20 Max 2.5 2.5 200 35 35 260 200 5.6 6.4 5.4 7.4 0.7 50 5.0 V ± 0.5 V Min 1.9 2.1 1.9 2.4 20 Max 3.3 2.6 200 35 35 260 200 5.9 7.4 5.0 7.6 0.7 50 Max -
Unit
[3]
ns ns ns ns ns ns ns ns ns ns ns ns ns Mbps
A port B port A port B port between channels data inputs
tTHL
tsk(o) tW fdata
[1]
-
Table 11. Dynamic characteristics for temperature range −40 °C to +125 °C[1] Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8; for wave forms see Figure 6 and Figure 7. Symbol Parameter Conditions 2.5 V ± 0.2 V Min VCC(A) = 1.8 V ± 0.15 V tPHL tPLH tPHL tPLH ten HIGH to LOW propagation delay LOW to HIGH propagation delay HIGH to LOW propagation delay LOW to HIGH propagation delay enable time A to B A to B B to A B to A OE to A; B 5.8 8.5 5.5 6.7 200 5.9 8.5 5.7 5.7 200 7.3 8.8 5.9 0.7 200 ns ns ns ns ns Max VCC(B) 3.3 V ± 0.3 V Min Max 5.0 V ± 0.5 V Min Max Unit
NTS0104
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© NXP B.V. 2011. All rights reserved.
Product Specification
Rev. 2 — 27 April 2011
10 of 26
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NTS0104
Dual supply translating transceiver; open drain; auto direction sensing
Table 11. Dynamic characteristics for temperature range −40 °C to +125 °C[1] …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8; for wave forms see Figure 6 and Figure 7. Symbol Parameter Conditions 2.5 V ± 0.2 V Min tdis disable time OE to A; no external load OE to B; no external load OE to A OE to B tTLH LOW to HIGH output transition time HIGH to LOW output transition time output skew time pulse width data rate HIGH to LOW propagation delay LOW to HIGH propagation delay HIGH to LOW propagation delay LOW to HIGH propagation delay enable time disable time A to B A to B B to A B to A OE to A; B OE to A; no external load OE to B; no external load OE to A OE to B tTLH LOW to HIGH output transition time HIGH to LOW output transition time output skew time pulse width data rate HIGH to LOW propagation delay LOW to HIGH propagation delay A to B A to B A port B port A port B port between channels data inputs
[3] [2] [2] [2] [2]
VCC(B) 3.3 V ± 0.3 V Min 2.3 2.7 1.9 2.8 20 2.6 2.9 1.9 2.4 20 Max 45 45 250 220 11.7 11.4 7.5 9.4 0.8 50 4.2 5.2 4.5 2.0 200 45 45 220 220 8.3 9.7 6.9 8.4 0.8 50 3.0 5.3 5.0 V ± 0.5 V Min 1.8 2.7 1.7 2.8 20 1.8 2.4 1.8 2.6 20 Max 45 45 250 220 9.5 9.5 16.7 12.5 0.8 50 4.3 5.5 5.4 0.9 200 45 45 220 220 7.8 8.3 6.7 8.3 0.8 50 3.9 5.5 Max 45 45 250 220 11.9 13.5 7.4 9.5 0.8 50 4.0 4.4 3.8 3.2 200 45 45 220 220 9.3 10.4 7.2 9.8 0.8 50 -
Unit
3.2 3.3 2.0 2.9
ns ns ns ns ns ns ns ns ns ns Mbps ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Mbps ns ns
A port B port A port B port between channels data inputs
[3]
tTHL
tsk(o) tW fdata tPHL tPLH tPHL tPLH ten tdis
20 2.8 3.2 1.9 2.2 20 -
VCC(A) = 2.5 V ± 0.2 V
tTHL
tsk(o) tW fdata tPHL tPLH
VCC(A) = 3.3 V ± 0.3 V
NTS0104
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© NXP B.V. 2011. All rights reserved.
Product Specification
Rev. 2 — 27 April 2011
11 of 26
NXP Semiconductors
NTS0104
Dual supply translating transceiver; open drain; auto direction sensing
Table 11. Dynamic characteristics for temperature range −40 °C to +125 °C[1] …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8; for wave forms see Figure 6 and Figure 7. Symbol Parameter Conditions 2.5 V ± 0.2 V Min tPHL tPLH ten tdis HIGH to LOW propagation delay LOW to HIGH propagation delay enable time disable time B to A B to A OE to A; B OE to A; no external load OE to B; no external load OE to A OE to B tTLH LOW to HIGH output transition time HIGH to LOW output transition time output skew time pulse width data rate
ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. [2] [3] Delay between OE going LOW and when the outputs are actually disabled. Skew between any two outputs of the same package switching in the same direction.
[2] [2]
VCC(B) 3.3 V ± 0.3 V Min 2.3 2.5 2.0 2.3 20 Max 3.2 3.2 200 45 45 280 220 7.0 8.0 6.8 9.3 0.8 50 5.0 V ± 0.5 V Min 1.9 2.1 1.9 2.4 20 Max 4.2 3.3 200 45 45 280 220 7.4 9.3 6.3 9.5 0.8 50 Max -
Unit
[3]
ns ns ns ns ns ns ns ns ns ns ns ns ns Mbps
A port B port A port B port between channels data inputs
tTHL
tsk(o) tW fdata
[1]
-
13. Waveforms
VI An, Bn input GND tPHL VOH Bn, An output VOL 90 % VM 10 % tTHL tTLH 001aal918 tPLH VM
Measurement points are given in Table 12. VOL and VOH are typical output voltage levels that occur with the output load.
Fig 6.
The data input (An, Bn) to data output (Bn, An) propagation delay times
NTS0104
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Product Specification
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NTS0104
Dual supply translating transceiver; open drain; auto direction sensing
VI OE input GND tPLZ output LOW-to-OFF OFF-to-LOW VCCO VM VOL tPHZ VOH output HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs disabled outputs enabled
001aal919
VM
tPZL
VX tPZH VY VM
Measurement points are given in Table 12. VOL and VOH are typical output voltage levels that occur with the output load.
Fig 7. Table 12. VCCO
Enable and disable times Measurement points[1][2] Input VM 0.5VCCI 0.5VCCI 0.5VCCI 0.5VCCI Output VM 0.5VCCO 0.5VCCO 0.5VCCO 0.5VCCO VX VOL + 0.15 V VOL + 0.15 V VOL + 0.3 V VOL + 0.3 V VY VOH − 0.15 V VOH − 0.15 V VOH − 0.3 V VOH − 0.3 V
Supply voltage 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V
[1] [2]
VCCI is the supply voltage associated with the input. VCCO is the supply voltage associated with the output.
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VI negative pulse 0V
tW 90 % VM 10 % tf tr tr tf 90 % VM 10 % tW
VEXT VCC VI VO
RL
VM
VI positive pulse 0V
VM
G
DUT
CL RL
001aal920
Test data is given in Table 13. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz; ZO = 50 Ω; dV/dt ≥ 1.0 V/ns. RL = Load resistance. CL = Load capacitance including jig and probe capacitance. VEXT = External voltage for measuring switching times.
Fig 8. Table 13. VCC(A)
Test circuit for measuring switching times Test data Input VCC(B) VI[1] VCCI Δt/ΔV ≤ 1.0 ns/V Load CL 15 pF RL
[2]
Supply voltage 1.65 V to 3.6 V 2.3 V to 5.5 V
[1] [2] [3]
VEXT tPLH, tPHL tPZH, tPHZ open tPZL, tPLZ[3] 2VCCO 50 kΩ, 1 MΩ open
VCCI is the supply voltage associated with the input. For measuring data rate, pulse width, propagation delay and output rise and fall measurements, RL = 1 MΩ; for measuring enable and disable times, RL = 50 kΩ. VCCO is the supply voltage associated with the output.
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14. Application information
14.1 Applications
Voltage level-translation applications. The NTS0104 can be used in point-to-point applications to interface between devices or systems operating at different supply voltages. The device is primarily targeted at I2C or 1-wire which use open-drain drivers, it may also be used in applications where push-pull drivers are connected to the ports, however the NTB0104 may be more suitable.
1.8 V
0.1 μF
3.3 V VCC(A) VCC(B) OE 1.8 V SYSTEM CONTROLLER DATA A1 A2 A3 A4 GND
001aan115 0.1 μF 1 μF
NTS0104
B1 B2 B3 B4
3.3 V SYSTEM DATA
Fig 9.
Typical operating circuit
14.2 Architecture
The architecture of the NTS0104 is shown in Figure 10. The device does not require an extra input signal to control the direction of data flow from A to B or B to A.
VCC(A)
VCC(B)
T1
T2
ONE SHOT
10 kΩ
ONE SHOT
10 kΩ
GATE BIAS
T3
A
B
001aal965
Fig 10. Architecture of NTS0104 I/O cell (one channel)
The NTS0104 is a "switch" type voltage translator, it employs two key circuits to enable voltage translation: 1. A pass-gate transistor (N-channel) that ties the ports together. 2. An output edge-rate accelerator that detects and accelerates rising edges on the I/O pins.
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The gate bias voltage of the pass gate transistor (T3) is set at approximately one threshold voltage above the VCC level of the low-voltage side. During a LOW-to-HIGH transition the output one-shot accelerates the output transition by switching on the PMOS transistors (T1, T2) bypassing the 10 kΩ pull-up resistors and increasing current drive capability. The one-shot is activated once the input transition reaches approximately VCCI/2; it is de-activated approximately 50 ns after the output reaches VCCO/2. During the acceleration time the driver output resistance is between approximately 50 Ω and 70 Ω. To avoid signal contention and minimize dynamic ICC, the user should wait for the one-shot circuit to turn-off before applying a signal in the opposite direction. Pull-up resistors are included in the device for DC current sourcing capability.
14.3 Input driver requirements
As the NTS0104 is a switch type translator, properties of the input driver directly effect the output signal. The external open-drain or push-pull driver applied to an I/O determines the static current sinking capability of the system; the max data rate, HIGH-to-LOW output transition time (tTHL) and propagation delay (tPHL) are dependent upon the output impedance and edge-rate of the external driver. The limits provided for these parameters in the datasheet assume a driver with output impedance below 50 Ω is used.
14.4 Output load considerations
The maximum lumped capacitive load that can be driven is dependant upon the one-shot pulse duration. In cases with very heavy capacitive loading there is a risk that the output will not reach the positive rail within the one-shot pulse duration. To avoid excessive capacitive loading and to ensure correct triggering of the one-shot it's recommended to use short trace lengths and low capacitance connectors on NTS0104 PCB layouts. To ensure low impedance termination and avoid output signal oscillations and one-shot re-triggering, the length of the PCB trace should be such that the round trip delay of any reflection is within the one-shot pulse duration (approximately 50 ns).
14.5 Power up
During operation VCC(A) must never be higher than VCC(B), however during power-up VCC(A) ≥ VCC(B) does not damage the device, so either power supply can be ramped up first. There is no special power-up sequencing required. The NTS0104 includes circuitry that disables all output ports when either VCC(A) or VCC(B) is switched off.
14.6 Enable and disable
An output enable input (OE) is used to disable the device. Setting OE = LOW causes all I/Os to assume the high-impedance OFF-state. The disable time (tdis with no external load) indicates the delay between when OE goes LOW and when outputs actually become disabled. The enable time (ten) indicates the amount of time the user must allow for one one-shot circuitry to become operational after OE is taken HIGH. To ensure the high-impedance OFF-state during power-up or power-down, pin OE should be tied to GND through a pull-down resistor, the minimum value of the resistor is determined by the current-sourcing capability of the driver.
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14.7 Pull-up or pull-down resistors on I/Os lines
Each A port I/O has an internal 10 kΩ pull-up resistor to VCC(A), and each B port I/O has an internal 10 kΩ pull-up resistor to VCC(B). If a smaller value of pull-up resistor is required, an external resistor must be added parallel to the internal 10 kΩ, this will effect the VOL level. When OE goes LOW the internal pull-ups of the NTS0104 are disabled.
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15. Package outline
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
D
E
A X
c
y
HE
vMA
Z
14 8
Q A2 A1
pin 1 index
(A 3) θ Lp L
A
1
7
e
bp
wM
detail X
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25
0.01
bp 0.49 0.36
c 0.25 0.19
D (1) 8.75 8.55
E (1) 4.0 3.8
0.16 0.15
e 1.27
0.05
HE 6.2 5.8
L
1.05
Lp 1.0 0.4
Q 0.7 0.6
0.028 0.024
v
0.25 0.01
w 0.25
0.01
y 0.1
Z (1) 0.7 0.3
θ
o
0.010 0.057 inches 0.069 0.004 0.049
0.019 0.0100 0.35 0.014 0.0075 0.34
0.244 0.039 0.041 0.228 0.016
0.028 0.004 0.012
8 o 0
Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT108-1 REFERENCES IEC
076E06
JEDEC
MS-012
JEITA
EUROPEAN PROJECTION
ISSUE DATE
99-12-27 03-02-19
Fig 11. Package outline SOT108-1 (SO14)
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TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
D
E
A
X
c y HE vMA
Z
14
8
Q A2 pin 1 index A1 θ Lp L (A 3) A
1
e bp
7
wM detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 5.1 4.9 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.72 0.38 θ 8 o 0
o
Fig 12. Package outline SOT402-1 (TSSOP14)
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DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm
D
B
A
A A1 E c
terminal 1 index area
detail X
terminal 1 index area e 2 L
e1 b 6 vMCAB wM C y1 C
C y
1 Eh 14
7 e 8
13 Dh 0
9 X 2.5 scale 5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. 1 A1 0.05 0.00 b 0.30 0.18 c 0.2 D (1) 3.1 2.9 Dh 1.65 1.35 E (1) 2.6 2.4 Eh 1.15 0.85 e 0.5 e1 2 L 0.5 0.3 v 0.1 w 0.05 y 0.05 y1 0.1
Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION SOT762-1 REFERENCES IEC --JEDEC MO-241 JEITA --EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27
Fig 13. Package outline SOT762-1 (DHVQFN14)
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XQFN16: plastic, extremely thin quad flat package; no leads; 16 terminals; body 1.80 x 2.60 x 0.50 mm
SOT1161-1
X
D
B
A
terminal 1 index area
E
A
A1 A3
detail X
e1 e 5 L 4 9 e e2 b 8 v w CAB C y1 C
C y
1 terminal 1 index area 16 L1 13
12
0 Dimensions Unit(1) mm max nom min A 0.5 A1 0.05 A3 b D 1.9 1.8 1.7 E 2.7 2.6 2.5 e 0.4 e1 1.2 e2 1.2
1 scale L L1 v
2 mm
w
y
y1
0.25 0.127 0.20 0.00 0.15
0.45 0.55 0.40 0.50 0.35 0.45
0.1
0.05 0.05 0.05
Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. Outline version SOT1161-1 References IEC --JEDEC --JEITA --European projection
sot1161-1_po
Issue date 09-12-28 09-12-29
Fig 14. Package outline SOT1161-1 (XQFN16)
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XQFN12: plastic, extremely thin quad flat package; no leads; 12 terminals; body 1.70 x 2.00 x 0.50 mm
SOT1174-1
X
D terminal 1 index area
B
A
E
A A1 A3
detail X
b
∅v ∅w 7
CAB C
C y1 C y
5
e1
e 1 terminal 1 index area L 0 1 scale Dimensions Unit(1) mm max nom min A 0.5 A1 0.05 A3 b D 1.8 1.7 1.6 E 2.1 2.0 1.9 e 0.4 e1 1.6 L L1 v 0.1 w y y1 2 mm 11
L1
0.25 0.127 0.20 0.00 0.15
0.55 0.50 0.15 0.45
0.05 0.05 0.05
Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. Outline version SOT1174-1 References IEC --JEDEC MO-288 JEITA --European projection
sot1174-1_po
Issue date 10-04-07 10-04-21
Fig 15. Package outline SOT1174-1 (XQFN12)
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16. Abbreviations
Table 14. Acronym CDM CMOS DUT ESD GPIO HBM I2C MM SMBus UART Abbreviations Description Charged Device Model Complementary Metal Oxide Semiconductor Device Under Test ElectroStatic Discharge General Purpose Input Output Human Body Model Inter-Integrated Circuit Machine Model System Management Bus Universal Asynchronous Receiver Transmitter
17. Revision history
Table 15. Revision history Release date 20110427 Data sheet status Product data sheet Change notice Supersedes NTS0104 v.1 Document ID NTS0104 v.2 Modifications: NTS0104 v.1
• •
Added Table 8: total supply current (typical). SOT1174 changed to SOT1174-1. Product data sheet -
20101125
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18. Legal information
18.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
18.2 Definitions
Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
18.3 Disclaimers
Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be
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Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.
18.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
19. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
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20. Contents
1 2 3 4 5 6 7 7.1 7.2 8 9 10 11 12 13 14 14.1 14.2 14.3 14.4 14.5 14.6 14.7 15 16 17 18 18.1 18.2 18.3 18.4 19 20 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 Functional description . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Application information. . . . . . . . . . . . . . . . . . 15 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input driver requirements . . . . . . . . . . . . . . . . 16 Output load considerations . . . . . . . . . . . . . . . 16 Power up . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Enable and disable . . . . . . . . . . . . . . . . . . . . . 16 Pull-up or pull-down resistors on I/Os lines . . 17 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 18 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 23 Legal information. . . . . . . . . . . . . . . . . . . . . . . 24 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 24 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Contact information. . . . . . . . . . . . . . . . . . . . . 25 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.
© NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 27 April 2011 Document identifier: NTS0104