NX3DV2567GU,115

NX3DV2567 Low-ohmic four-pole double-throw analog switch Rev. 2 — 9 November 2011 Product data sheet 1. General description The NX3DV2567 is a four-pole double-throw analog switch (4PDT) optimized for switching WLAN-SIM supply, data and control signals. It has one digital select input (S) and four switches each with two independent input/outputs (nY0 and nY1) and a common input/output (nZ). Schmitt trigger action at S makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 1.4 V to 4.3 V. A low input voltage threshold allows pin S to be driven by lower level logic signals without significant increase in supply current ICC. This makes it possible for the NX3DV2567 to switch 4.3 V signals with a 1.8 V digital controller, eliminating the need for logic level translation. The NX3DV2567 allows signals with amplitude up to VCC to be transmitted from nZ to nY0 or nY1; or from nY0 or nY1 to nZ.. 2. Features and benefits  Wide supply voltage range from 1.4 V to 4.3 V  Very low ON resistance for supply path:  0.5  (typical) at VCC = 1.8 V  0.45  (typical) at VCC = 2.7 V  Low ON resistance for data path:  7  (typical) at VCC = 1.8 V  6  (typical) at VCC = 2.7 V  Low ON capacitance for data path  Wide 3 db bandwidth > 160 MHz  Break-before-make switching  High noise immunity  ESD protection:  HBM JESD22-A114F Class 3A exceeds 4000 V  HBM JESD22-A114F Class 3A I/O to GND exceeds 7000 V  CDM AEC-Q100-011 revision B exceeds 1000 V  CMOS low-power consumption  Latch-up performance exceeds 100 mA per JESD 78B Class II Level A  1.8 V control logic at VCC = 3.6 V  Control input accepts voltages above supply voltage  Very low supply current, even when input is below VCC  High current handling capability (350 mA continuous current under 3.3 V supply for supply path switch) NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch  Specified from 40 C to +85 C and from 40 C to +125 C 3. Applications  Cell phone, PDA, digital camera, printer and notebook  LCD monitor, TV and set-top box 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version NX3DV2567HR 40 C to +125 C HXQFN16U plastic thermal enhanced extremely thin quad flat package; no leads; 16 terminals; UTLP based; body 3 x 3 x 0.5 mm SOT1039-1 NX3DV2567GU 40 C to +125 C XQFN16 SOT1161-1 plastic, extremely thin quad flat package; no leads; 16 terminals; body 1.80 x 2.60 x 0.50 mm 5. Marking Table 2. Marking codes Type number Marking code NX3DV2567HR D60 NX3DV2567GU D60 NX3DV2567 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 9 November 2011 © NXP B.V. 2011. All rights reserved. 2 of 20 NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch 6. Functional diagram SUPPLY PATH SWITCH 1Y0 1Z 1Y1 DATA PATH SWITCHES 2Y0 2Z 2Y1 nY1 nZ 3Y0 3Z 3Y1 nY0 4Y0 4Z S 4Y1 S to other three switches 001aam596 001aam595 Fig 1. Logic symbol Fig 2. Logic diagram (one switch) 7. Pinning information 13 4Y0 4Y0 13 14 VCC VCC 14 terminal 1 index area 15 1Y1 1Y1 15 16 1Z 1Z terminal 1 index area 16 7.1 Pinning 1Y0 1 1Y0 1 12 4Z S 2 11 4Y1 2Y1 3 10 n.c. 2Z 4 9 3Y0 12 4Z S 2 9 3Y0 001aam597 Transparent top view Transparent top view 001aam598 Fig 3. Pin configuration SOT1039-1 (HXQFN16U) Product data sheet 3Z 8 8 3Z 2Z 4 3Y1 7 7 3Y1 10 n.c. GND 6 6 GND 2Y1 3 2Y0 5 5 2Y0 NX3DV2567 NX3DV2567 11 4Y1 NX3DV2567 Fig 4. Pin configuration SOT1161-1 (XQFN16) All information provided in this document is subject to legal disclaimers. Rev. 2 — 9 November 2011 © NXP B.V. 2011. All rights reserved. 3 of 20 NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch 7.2 Pin description Table 3. Pin description Symbol Pin Description 1Y0 1 independent input or output (supply switch) 2Y0, 3Y0, 4Y0 5, 9, 13 independent input or output (data switch) S 2 select input 1Y1 15 independent input or output (supply switch) 2Y1, 3Y1, 4Y1 3, 7, 11 independent input or output (data switch) 1Z 16 common output or input (supply switch) 2Z, 3Z, 4Z 4, 8, 12 common output or input (data switch) GND 6 ground (0 V) n.c. 10 not connected VCC 14 supply voltage 8. Functional description Table 4. Function table[1] Input S Channel on L nY0 H nY1 [1] H = HIGH voltage level; L = LOW voltage level. 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions select input S Min Max Unit 0.5 +4.6 V [1] 0.5 +4.6 V [2] 0.5 VCC + 0.5 V VI input voltage VSW switch voltage IIK input clamping current VI < 0.5 V 50 - mA ISK switch clamping current VI < 0.5 V or VI > VCC + 0.5 V - 50 mA ISW switch current supply path switch VSW > 0.5 V or VSW < VCC + 0.5 V; source or sink current - 350 mA VSW > 0.5 V or VSW < VCC + 0.5 V; pulsed at 1 ms duration, < 10 % duty cycle; peak current - 500 mA - 128 mA 65 +150 C data path switch VSW > 0.5 V or VSW < VCC + 0.5 V; source or sink current Tstg storage temperature NX3DV2567 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 9 November 2011 © NXP B.V. 2011. All rights reserved. 4 of 20 NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch Table 5. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Ptot Parameter Conditions total power dissipation Tamb = 40 C to +125 C [3][4] Min Max Unit - 250 mW [1] The minimum input voltage rating may be exceeded if the input current rating is observed. [2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed but may not exceed 4.6 V. [3] For HXQFN16U package: above 135 C the value of Ptot derates linearly with 16.9 mW/K. [4] For XQFN16 package: above 133 C the value of Ptot derates linearly with 14.5 mW/K. 10. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter Conditions VCC supply voltage VI input voltage VSW switch voltage Tamb ambient temperature t/V select input S [1] input transition rise and fall rate [2] VCC = 1.4 V to 4.3 V Min Max Unit 1.4 4.3 V 0 4.3 V 0 VCC V 40 +125 C - 200 ns/V [1] To avoid sinking GND current from terminal nZ when switch current flows in terminal nYn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no GND current will flow from terminal nYn. In this case, there is no limit for the voltage drop across the switch. [2] Applies to control signal levels. 11. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground 0 V). Symbol Parameter VIH VIL II HIGH-level input voltage LOW-level input voltage input leakage current NX3DV2567 Product data sheet Tamb = 25 C Conditions Tamb = 40 C to +125 C Unit Min Typ Max Min Max Max (85 C) (125 C) VCC = 1.4 V to 1.6 V 0.9 - - 0.9 - - V VCC = 1.65 V to 1.95 V 0.9 - - 0.9 - - V VCC = 2.3 V to 2.7 V 1.1 - - 1.1 - - V VCC = 2.7 V to 3.6 V 1.3 - - 1.3 - - V VCC = 3.6 V to 4.3 V 1.4 - - 1.4 - - V VCC = 1.4 V to 1.6 V - - 0.3 - 0.3 0.3 V VCC = 1.65 V to 1.95 V - - 0.4 - 0.4 0.3 V VCC = 2.3 V to 2.7 V - - 0.4 - 0.4 0.4 V VCC = 2.7 V to 3.6 V - - 0.5 - 0.5 0.5 V VCC = 3.6 V to 4.3 V - - 0.6 - 0.6 0.6 V select input S; VI = GND to 4.3 V; VCC = 1.4 V to 4.3 V - - - - 0.5 1 A All information provided in this document is subject to legal disclaimers. Rev. 2 — 9 November 2011 © NXP B.V. 2011. All rights reserved. 5 of 20 NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground 0 V). Symbol Parameter IS(OFF) IS(ON) ICC ICC OFF-state leakage current ON-state leakage current Tamb = 25 C Conditions Tamb = 40 C to +125 C Unit Min Typ Max Min Max Max (85 C) (125 C) VCC = 1.4 V to 3.6 V - - 5 - 50 500 nA VCC = 3.6 V to 4.3 V - - 10 - 50 500 nA VCC = 1.4 V to 3.6 V - - 5 - 50 500 nA VCC = 3.6 V to 4.3 V - - 10 - 50 500 nA VCC = 3.6 V - - 100 - 500 5000 nA VCC = 4.3 V nY0 and nY1 port; see Figure 5 nZ port; VCC = 1.4 V to 3.6 V; see Figure 6 supply current VI = VCC or GND; VSW = GND or VCC - - 150 - 800 6000 nA additional VSW = GND or VCC supply current VI = 2.6 V; VCC = 4.3 V - 2.0 4.0 - 7 7 A VI = 2.6 V; VCC = 3.6 V - 0.35 0.7 - 1 1 A VI = 1.8 V; VCC = 4.3 V - 7.0 10.0 - 15 15 A VI = 1.8 V; VCC = 3.6 V - 2.5 4.0 - 5 5 A VI = 1.8 V; VCC = 2.5 V - 50 200 - 300 500 nA - 1 - - - - pF CI input capacitance CS(OFF) OFF-state capacitance supply path switch - 35 - - - - pF data path switch - 3 - - - - pF ON-state capacitance supply path switch - 130 - - - - pF data path switch - 16 - - - - pF CS(ON) 11.1 Test circuits VCC VIL or VIH S nY0 1 nZ nY1 2 switch switch S 1 VIH 2 VIL IS VO VI GND 001aam599 VI = 0.3 V or VCC  0.3 V; VO = VCC  0.3 V or 0.3 V. Fig 5. Test circuit for measuring OFF-state leakage current NX3DV2567 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 9 November 2011 © NXP B.V. 2011. All rights reserved. 6 of 20 NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch VCC VIL or VIH IS S nY0 1 nZ nY1 2 switch S 1 VIH 2 VIL switch VO VI GND 001aam600 VI = 0.3 V or VCC  0.3 V; VO = VCC  0.3 V or 0.3 V. Fig 6. Test circuit for measuring ON-state leakage current 11.2 ON resistance Table 8. ON resistance At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 8 to Figure 13. Symbol Parameter Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit Conditions Min Typ[1] Max Min Max Supply path switch RON RON ON resistance VI = GND to VCC; ISW = 100 mA; see Figure 7 VCC = 1.8 V; VSW = 0 V, 1.8 V - 0.5 0.75 - 0.85  VCC = 2.7 V; VSW = 0 V, 2.3 V - 0.45 0.7 - 0.8  - 0.1 - - -  - 7.0 10.0 - 11.0  - 6.0 9.5 - 10.5  - 0.2 - - -  ON resistance VI = GND to VCC; ISW = 100 mA mismatch VCC = 2.7 V; VSW = 0 V between channels [2] Data path switches RON ON resistance VI = GND to VCC; ISW = 20 mA; see Figure 7 VCC = 1.8 V; VSW = 0 V, 1.8 V VCC = 2.7 V; VSW = 0 V, 2.3 V RON ON resistance VI = GND to VCC; ISW = 20 mA mismatch VCC = 2.7 V; VSW = 0 V between channels [1] Typical values are measured at Tamb = 25 C. [2] Measured at identical VCC, temperature and input voltage. NX3DV2567 Product data sheet [2] All information provided in this document is subject to legal disclaimers. Rev. 2 — 9 November 2011 © NXP B.V. 2011. All rights reserved. 7 of 20 NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch 11.3 ON resistance test circuit and graphs 001aam602 0.8 RON (Ω) (1) 0.6 VSW (2) 0.4 V switch VCC VIL or VIH S nY0 1 nZ nY1 2 S 1 VIL 2 VIH 0.2 switch VI ISW 0 GND 0 1 2 RON = VSW / ISW. 3 VI (V) 001aam601 (1) VCC = 1.8 V. (2) VCC = 2.7 V. Fig 7. Test circuit for measuring ON resistance 001aag566 1.0 RON (Ω) Fig 8. Typical ON resistance as a function of input voltage (supply path switch) 001aag568 1.0 RON (Ω) 0.8 0.8 (1) (2) (3) (4) 0.6 0.6 0.4 0.4 0.2 0.2 0 (1) (2) (3) (4) 0 0 1 2 3 0 VI (V) (1) Tamb = 125 C. (2) Tamb = 85 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (4) Tamb = 40 C. ON resistance as a function of input voltage; VCC = 1.8 V (supply path switch) NX3DV2567 Product data sheet 2 3 VI (V) (1) Tamb = 125 C. Fig 9. 1 Fig 10. ON resistance as a function of input voltage; VCC = 2.7 V (supply path switch) All information provided in this document is subject to legal disclaimers. Rev. 2 — 9 November 2011 © NXP B.V. 2011. All rights reserved. 8 of 20 NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch 001aam603 15 RON (Ω) 13 (1) 11 9 7 (2) 5 0 1 2 3 VI (V) (1) VCC = 1.8 V. (2) VCC = 2.7 V. Fig 11. Typical ON resistance as a function of input voltage (data path switch) 001aam604 15 RON (Ω) 001aam605 10 RON (Ω) 13 (1) (2) 8 11 (3) (1) 9 (2) 6 (4) (3) 7 (4) 5 4 0 0.4 0.8 1.2 1.6 2.0 0 VI (V) (1) Tamb = 125 C. (2) Tamb = 85 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (4) Tamb = 40 C. Fig 12. ON resistance as a function of input voltage; VCC = 1.8 V (data path switch) Product data sheet 2 3 VI (V) (1) Tamb = 125 C. NX3DV2567 1 Fig 13. ON resistance as a function of input voltage; VCC = 2.7 V (data path switch) All information provided in this document is subject to legal disclaimers. Rev. 2 — 9 November 2011 © NXP B.V. 2011. All rights reserved. 9 of 20 NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch 12. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 16. Symbol Parameter 25 C Conditions 40 C to +125 C Unit Min Typ[1] Max Min Max (85 C) Max (125 C) VCC = 1.4 V to 1.6 V - 41 90 - 120 120 ns VCC = 1.65 V to 1.95 V - 30 70 - 80 90 ns VCC = 2.3 V to 2.7 V - 20 45 - 50 55 ns VCC = 2.7 V to 3.6 V - 19 40 - 45 50 ns VCC = 3.6 V to 4.3 V - 19 40 - 45 50 ns - 24 70 - 80 90 ns Supply path switch ten tdis enable time disable time S to 1Z or 1Y0, 1Y1; see Figure 14 S to 1Z or 1Y0, 1Y1; see Figure 14 VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V - 15 55 - 60 65 ns VCC = 2.3 V to 2.7 V - 9 25 - 30 35 ns VCC = 2.7 V to 3.6 V - 8 20 - 25 30 ns - 8 20 - 25 30 ns - 20 - 9 - - ns VCC = 1.65 V to 1.95 V - 17 - 7 - - ns VCC = 2.3 V to 2.7 V - 13 - 4 - - ns VCC = 2.7 V to 3.6 V - 11 - 3 - - ns VCC = 3.6 V to 4.3 V - 11 - 2 - - ns VCC = 1.4 V to 1.6 V - 40 90 - 120 120 ns VCC = 1.65 V to 1.95 V - 29 70 - 80 90 ns VCC = 2.3 V to 2.7 V - 20 45 - 50 55 ns VCC = 2.7 V to 3.6 V - 19 40 - 45 50 ns VCC = 3.6 V to 4.3 V - 19 40 - 45 50 ns VCC = 1.4 V to 1.6 V - 21 70 - 80 90 ns VCC = 1.65 V to 1.95 V - 13 55 - 60 65 ns VCC = 2.3 V to 2.7 V - 8 25 - 30 35 ns VCC = 2.7 V to 3.6 V - 7 20 - 25 30 ns VCC = 3.6 V to 4.3 V - 7 20 - 25 30 ns VCC = 3.6 V to 4.3 V tb-m break-before-make see Figure 15 time VCC = 1.4 V to 1.6 V [2] Data path switch ten tdis enable time disable time NX3DV2567 Product data sheet S to nZ or nYn; see Figure 14 S to nZ or nYn; see Figure 14 All information provided in this document is subject to legal disclaimers. Rev. 2 — 9 November 2011 © NXP B.V. 2011. All rights reserved. 10 of 20 NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch Table 9. Dynamic characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 16. Symbol Parameter tb-m 25 C Conditions 40 C to +125 C Unit Min Typ[1] Max Min Max (85 C) Max (125 C) - 23 - 9 - - ns VCC = 1.65 V to 1.95 V - 19 - 7 - - ns VCC = 2.3 V to 2.7 V - 15 - 4 - - ns VCC = 2.7 V to 3.6 V - 13 - 3 - - ns VCC = 3.6 V to 4.3 V - 12 - 2 - - ns break-before-make see Figure 15 time VCC = 1.4 V to 1.6 V [2] [1] Typical values are measured at Tamb = 25 C and VCC = 1.5 V, 1.8 V, 2.5 V, 3.3 V and 4.3 V respectively. [2] Break-before-make guaranteed by design. 12.1 Waveform and test circuits VI S input VM GND ten tdis VOH nY1 connected to VEXT VX nZ output OFF to HIGH HIGH to OFF VX GND tdis VOH nY0 connected to VEXT nZ output HIGH to OFF OFF to HIGH ten VX VX GND 001aam606 Measurement points are given in Table 10. Logic level: VOH is typical output voltage level that occurs with the output load. Fig 14. Enable and disable times Table 10. Measurement points Supply voltage Input Output VCC VM VX 1.4 V to 4.3 V 0.5VCC 0.9VOH NX3DV2567 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 9 November 2011 © NXP B.V. 2011. All rights reserved. 11 of 20 NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch VCC G VI V VO RL S nY0 nZ nY1 CL VEXT = 1.5 V GND 001aam607 a. Test circuit VI 0.5VI 0.9VO 0.9VO VO tb-m 001aag572 b. Input and output measurement points Fig 15. Test circuit for measuring break-before-make timing VCC G VI V VO RL S nY0 1 nZ nY1 2 switch CL VEXT = 1.5 V GND 001aam608 Test data is given in Table 11. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. VEXT = External voltage for measuring switching times. Fig 16. Test circuit for measuring switching times Table 11. Test data Supply voltage Input VCC VI tr, tf CL RL 1.4 V to 4.3 V VCC  2.5 ns 35 pF 50  NX3DV2567 Product data sheet Load All information provided in this document is subject to legal disclaimers. Rev. 2 — 9 November 2011 © NXP B.V. 2011. All rights reserved. 12 of 20 NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch 12.2 Additional dynamic characteristics Table 12. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise specified); tr = tf  2.5 ns; Tamb = 25 C. Symbol Parameter Conditions Min Typ Max Unit Data path switch 3 dB frequency response RL = 50 ; see Figure 17 iso isolation (OFF-state) fi = 10 MHz; RL = 50 ; see Figure 18 Xtalk crosstalk between switches; fi = 10 MHz; RL = 50 ; see Figure 19 f(3dB) [1] VCC = 2.7 V to 3.6 V VCC = 2.7 V to 3.6 V charge injection - MHz - 60 - dB - 60 - dB - 10 - pC fi = 1 MHz; CL = 0.1 nF; RL = 1 M; Vgen = 0 V; Rgen = 0 ; see Figure 20 VCC = 2.7 V to 3.6 V [1] 330 [1] VCC = 2.7 V to 3.6 V Qinj [1] fi is biased at 0.5VCC. 12.3 Test circuits VCC VIL or VIH 0.5VCC S nY0 1 nZ nY1 2 RL switch fi switch S 1 VIL 2 VIH dB GND 001aam609 Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads 3 dB. Fig 17. Test circuit for measuring the frequency response when channel is in ON-state 0.5VCC 0.5VCC VCC RL VIL or VIH RL S nY0 1 nZ nY1 2 fi switch S 1 VIH 2 VIL switch dB GND 001aam610 Adjust fi voltage to obtain 0 dBm level at input. Fig 18. Test circuit for measuring isolation (OFF-state) NX3DV2567 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 9 November 2011 © NXP B.V. 2011. All rights reserved. 13 of 20 NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch 0.5VCC nY0 or nZ fi RL CHANNEL ON nZ or nY0 50 Ω VO1 V S VIL 0.5VCC RL nY0 or nZ nZ or nY0 CHANNEL OFF Ri 50 Ω V VO2 001aam611 20 log10 (VO2 / VO1) or 20 log10 (VO1 / VO2). Fig 19. Test circuit for measuring crosstalk between switches VCC S nY0 1 nZ nY1 2 switch Rgen G VI V VO RL CL Vgen GND 001aam612 a. Test circuit logic (S) off input on VO off ΔVO 001aam613 b. Input and output pulse definitions Definition: Qinj = VO  CL. VO = output voltage variation. Rgen = generator resistance. Vgen = generator voltage. Fig 20. Test circuit for measuring charge injection NX3DV2567 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 9 November 2011 © NXP B.V. 2011. All rights reserved. 14 of 20 NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch 13. Package outline HXQFN16U: plastic thermal enhanced extremely thin quad flat package; no leads; 16 terminals; UTLP based; body 3 x 3 x 0.5 mm A B D SOT1039-1 terminal 1 index area E A A1 detail X e1 e 1/2 e v w b L1 5 M M C C A B C y y1 C 8 L 9 4 e e2 Eh 1/2 e 1 12 terminal 1 index area 16 13 X Dh 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max A1 b D Dh E Eh e e1 e2 L L1 v w y y1 mm 0.5 0.05 0.00 0.35 0.25 3.1 2.9 1.95 1.75 3.1 2.9 1.95 1.75 0.5 1.5 1.5 0.35 0.25 0.1 0.0 0.1 0.05 0.05 0.1 REFERENCES OUTLINE VERSION IEC SOT1039-1 --- JEDEC JEITA --- EUROPEAN PROJECTION ISSUE DATE 07-11-14 07-12-01 Fig 21. Package outline SOT1039-1 (HXQFN16U) NX3DV2567 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 9 November 2011 © NXP B.V. 2011. All rights reserved. 15 of 20 NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch XQFN16: plastic, extremely thin quad flat package; no leads; 16 terminals; body 1.80 x 2.60 x 0.50 mm SOT1161-1 X A B D terminal 1 index area A E A1 A3 detail X e1 e 5 8 C C A B C v w b y1 C y L 4 9 e e2 1 12 terminal 1 index area 16 L1 13 0 1 scale Dimensions Unit(1) mm max nom min 2 mm A A1 0.5 0.05 A3 b 0.25 0.127 0.20 0.15 0.00 D E 1.9 1.8 1.7 2.7 2.6 2.5 e e1 0.4 1.2 L e2 1.2 L1 0.45 0.55 0.40 0.50 0.35 0.45 v 0.1 w y y1 0.05 0.05 0.05 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. References Outline version IEC JEDEC JEITA SOT1161-1 --- --- --- sot1161-1_po European projection Issue date 09-12-28 09-12-29 Fig 22. Package outline SOT1161-1 (XQFN16) NX3DV2567 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 9 November 2011 © NXP B.V. 2011. All rights reserved. 16 of 20 NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch 14. Abbreviations Table 13. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model PDA Personal Digital Assistant TTL Transistor-Transistor Logic 15. Revision history Table 14. Revision history Document ID Release date Data sheet status Change notice Supersedes NX3DV2567 v.2 20111109 Product data sheet - NX3DV2567 v.1 - - Modifications: NX3DV2567 v.1 NX3DV2567 Product data sheet • Legal pages updated. 20100928 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 9 November 2011 © NXP B.V. 2011. All rights reserved. 17 of 20 NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 16.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. NX3DV2567 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 9 November 2011 © NXP B.V. 2011. All rights reserved. 18 of 20 NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com NX3DV2567 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 9 November 2011 © NXP B.V. 2011. All rights reserved. 19 of 20 NX3DV2567 NXP Semiconductors Low-ohmic four-pole double-throw analog switch 18. Contents 1 2 3 4 5 6 7 7.1 7.2 8 9 10 11 11.1 11.2 11.3 12 12.1 12.2 12.3 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 7 ON resistance test circuit and graphs. . . . . . . . 8 Dynamic characteristics . . . . . . . . . . . . . . . . . 10 Waveform and test circuits . . . . . . . . . . . . . . . 11 Additional dynamic characteristics . . . . . . . . . 13 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 18 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Contact information. . . . . . . . . . . . . . . . . . . . . 19 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 9 November 2011 Document identifier: NX3DV2567