NX3L4051PW

NX3L4051 Single low-ohmic 8-channel analog switch Rev. 2 — 12 August 2010 Product data sheet 1. General description The NX3L4051 is an 8-channel analog switch, suitable for use as an analog or digital multiplexer/demultiplexer. The NX3L4051 has three digital select inputs (S1 to S3), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z). All eight switches share an enable input (E). A HIGH on E causes all switches into the high impedance OFF-state, independent of Sn. Schmitt trigger action at the select input (Sn and E) makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 1.4 V to 4.3 V. A low input voltage threshold allows pin Sn and E to be driven by lower level logic signals without a significant increase in supply current ICC. This makes it possible for the NX3L4051 to switch 4.3 V signals with a 1.8 V digital controller, eliminating the need for logic level translation. The NX3L4051 allows signals with amplitude up to VCC to be transmitted from Z to Yn or from Yn to Z. Its low ON resistance (0.5 ) and flatness (0.13 ) ensures minimal attenuation and distortion of transmitted signals. 2. Features and benefits  Wide supply voltage range from 1.4 V to 4.3 V  Very low ON resistance (peak):  1.7  (typical) at VCC = 1.4 V  1.0  (typical) at VCC = 1.65 V  0.6  (typical) at VCC = 2.3 V  0.5  (typical) at VCC = 2.7 V 0.5  (typical) at VCC = 4.3 V  Break-before-make switching  High noise immunity  ESD protection:  HBM JESD22-A114F Class 3A exceeds 7500 V  MM JESD22-A115-A exceeds 200 V  CDM AEC-Q100-011 revision B exceeds 1000 V  CMOS low-power consumption  Latch-up performance exceeds 100 mA per JESD 78B Class II Level A  1.8 V control logic at VCC = 3.6 V  Control input accepts voltages above supply voltage  Very low supply current, even when input is below VCC  High current handling capability (350 mA continuous current under 3.3 V supply)  Specified from 40 C to +85 C and from 40 C to +125 C NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch 3. Applications       Cell phone PDA Portable media player Analog multiplexing and demultiplexing Digital multiplexing and demultiplexing Signal gating 4. Ordering information Table 1. Ordering information Package Temperature range NX3L4051HR 40 C to +125 C Name Description Version SOT1039-1 HXQFN16U plastic thermal enhanced extremely thin quad flat package; no leads; 16 terminals; UTLP based; body 3  3  0.5 mm TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm Type number NX3L4051PW 40 C to +125 C SOT403-1 5. Marking Table 2. Marking codes Marking code M41 X3L4051 Type number NX3L4051HR NX3L4051PW NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 2 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch 6. Functional diagram VCC 16 13 Y0 S1 11 14 Y1 S2 10 15 Y2 12 Y3 S3 9 1-OF-8 DECODER LOGIC 13 S1 S2 S3 11 10 9 14 15 12 1 5 2 E 6 3 Z 001aal657 1 Y4 Y0 Y1 Y2 Y3 Y4 Y5 Y6 E6 5 Y5 2 Y6 4 Y7 3Z 4 Y7 8 GND 001aal658 Pin numbers are shown for TSSOP16 package only. Pin numbers are shown for TSSOP16 package only. Fig 1. Logic symbol Fig 2. Functional diagram NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 3 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch 7. Pinning information 7.1 Pinning terminal 1 index area VCC 14 Y6 16 15 Y4 13 Y2 Z Y7 Y5 E 1 2 12 11 Y1 Y0 Y3 S1 Y4 Y6 1 2 3 4 5 6 7 8 NX3L4051 16 VCC 15 Y2 14 Y1 13 Y0 12 Y3 11 S1 10 S2 9 001aal660 NX3L4051 3 4 5 6 7 8 10 9 Z Y7 Y5 E n.c. n.c. GND S3 S2 001aal659 GND S3 Transparent top view Fig 3. Pin configuration SOT1039-1 (HXQFN16U) Fig 4. Pin configuration SOT403-1 (TSSOP16) 7.2 Pin description Table 3. Symbol Pin description Pin SOT1039-1 Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 11, 12, 13, 10, 15, 3, 16, 2 Z E n.c. GND S1, S2, S3 VCC 1 4 5 6 9, 8, 7 14 SOT403-1 13, 14, 15, 12, 1, 5, 2, 4 3 6 7 8 11, 10, 9 16 independent input or output independent output or input enable input (active LOW) not connected ground (0 V) select input supply voltage Description NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 4 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch 8. Functional description Table 4. Input E L L L L L L L L H [1] Function table[1] Channel ON S3 L L L L H H H H X S2 L L H H L L H H X S1 L H L H L H L H X Y0 = Z Y1 = Z Y2 = Z Y3 = Z Y4 = Z Y5 = Z Y6 = Z Y7 = Z switches off H = HIGH voltage level; L = LOW voltage level; X = don’t care. 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC VI VSW IIK ISK ISW Parameter supply voltage input voltage switch voltage input clamping current switch clamping current switch current VI < 0.5 V VI < 0.5 V or VI > VCC + 0.5 V VSW > 0.5 V or VSW < VCC + 0.5 V; source or sink current VSW > 0.5 V or VSW < VCC + 0.5 V; pulsed at 1 ms duration, < 10 % duty cycle; peak current Tstg Ptot storage temperature total power dissipation Tamb = 40 C to +125 C HXQFN16U TSSOP16 [1] [2] [3] [4] The minimum input voltage rating may be exceeded if the input current rating is observed. The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed but may not exceed 4.6 V. For HXQFN16U package: above 135 C the value of Ptot derates linearly with 16.9 mW/K. For TSSOP16 package: above 60 C the value of Ptot derates linearly with 5.5 mW/K above. [3] [4] Conditions Sn and E [1] [2] Min 0.5 0.5 0.5 50 - Max +4.6 +4.6 50 350 500 Unit V V mA mA mA mA VCC + 0.5 V 65 - +150 250 500 C mW mW NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 5 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch 10. Recommended operating conditions Table 6. VCC VI VSW Tamb t/V [1] Recommended operating conditions Conditions Sn and E [1] Symbol Parameter supply voltage input voltage switch voltage ambient temperature input transition rise and fall rate Min 1.4 0 0 40 - Max 4.3 4.3 VCC +125 200 Unit V V V C ns/V Sn and E; VCC = 1.4 V to 4.3 V To avoid sinking GND current from terminal Z when switch current flows in terminal Yn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no GND current will flow from terminal Yn. In this case, there is no limit for the voltage drop across the switch. 11. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground 0 V). Symbol Parameter Conditions Min VIH HIGH-level input voltage VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 3.6 V to 4.3 V VIL LOW-level input voltage VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 3.6 V to 4.3 V II input leakage current OFF-state leakage current ON-state leakage current Sn and E; VI = GND to 4.3 V; VCC = 1.4 V to 4.3 V Yn ports; see Figure 5 VCC = 1.4 V to 3.6 V VCC = 3.6 V to 4.3 V Z port; VCC = 1.4 V to 3.6 V; see Figure 6 VCC = 1.4 V to 3.6 V VCC = 3.6 V to 4.3 V ICC supply current VI = VCC or GND; VSW = GND or VCC VCC = 3.6 V VCC = 4.3 V NX3L4051 Tamb = 25 C Typ Max 0.3 0.4 0.4 0.5 0.6 - Tamb = 40 C to +125 C Min 0.9 0.9 1.1 1.3 1.4 Max Max (85 C) (125 C) 0.3 0.4 0.4 0.5 0.6 0.5 0.3 0.3 0.4 0.5 0.6 1 Unit 0.9 0.9 1.1 1.3 1.4 - V V V V V V V V V V A IS(OFF) - - 5 10 - 50 50 500 500 nA nA IS(ON) - - 20 40 - 200 200 2000 2000 nA nA - - 100 150 - 500 800 5000 6000 nA nA All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 6 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground 0 V). Symbol Parameter Conditions Min ICC additional VSW = GND or VCC supply current VI = 2.6 V; VCC = 4.3 V VI = 2.6 V; VCC = 3.6 V VI = 1.8 V; VCC = 4.3 V VI = 1.8 V; VCC = 3.6 V VI = 1.8 V; VCC = 2.5 V CI CS(OFF) CS(ON) input capacitance OFF-state capacitance ON-state capacitance Sn and E Tamb = 25 C Typ Max Tamb = 40 C to +125 C Min Max Max (85 C) (125 C) 7 1 15 5 300 7 1 15 5 500 A A A A nA pF pF pF Unit - 2.0 0.35 7.0 2.5 50 1.0 35 350 4.0 0.7 10.0 4.0 200 - - 11.1 Test circuits VCC Sn Z E VI VO VIL or VIH Yn IS VIH GND 001aal661 VI = 0.3 V or VCC  0.3 V; VO = VCC  0.3 V or 0.3 V. Fig 5. Test circuit for measuring OFF-state leakage current VCC Sn Z E VI VO VIL or VIH IS Yn VIL GND 001aal662 VI = 0.3 V or VCC  0.3 V; VO = VCC  0.3 V or 0.3 V. Fig 6. Test circuit for measuring ON-state leakage current NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 7 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch 11.2 ON resistance Table 8. ON resistance[1] At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 8 to Figure 14. Symbol Parameter Conditions VI = GND to VCC; ISW = 100 mA; see Figure 7 VCC = 1.4 V VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 4.3 V RON ON resistance mismatch between channels VI = GND to VCC; ISW = 100 mA VCC = 1.4 V; VSW = 0.4 V VCC = 1.65 V; VSW = 0.5 V VCC = 2.3 V; VSW = 0.7 V VCC = 2.7 V; VSW = 0.8 V VCC = 4.3 V; VSW = 0.8 V RON(flat) ON resistance (flatness) VI = GND to VCC; ISW = 100 mA VCC = 1.4 V VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 4.3 V [1] [2] [3] [4] [4] [3] Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit Min Typ[2] Max Min Max RON(peak) ON resistance (peak) - 1.7 1.0 0.6 0.5 0.5 3.7 1.6 0.8 0.75 0.75 - 4.1 1.7 0.9 0.9 0.9      - 0.18 0.18 0.07 0.07 0.07 0.30 0.20 0.10 0.10 0.10 - 0.30 0.30 0.13 0.13 0.13      - 1.0 0.5 0.15 0.13 0.2 3.3 1.2 0.3 0.3 0.4 - 3.6 1.3 0.35 0.35 0.45      For NX3L4051PW (TSSOP16 package), all ON resistance values are up to 0.05  higher. Typical values are measured at Tamb = 25 C. Measured at identical VCC, temperature and input voltage. Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and temperature. NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 8 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch 11.3 ON resistance test circuit and graphs 1.6 RON (Ω) 1.2 VSW 001aag564 V 0.8 VCC (1) (2) VIL or VIH Sn 0.4 Z E Yn ISW (3) (4) (5) (6) VI VIL GND 001aal663 0 0 1 2 3 4 VI (V) 5 RON = VSW / ISW. (1) VCC = 1.5 V. (2) VCC = 1.8 V. (3) VCC = 2.5 V. (4) VCC = 2.7 V. (5) VCC = 3.3 V. (6) VCC = 4.3 V. Measured at Tamb = 25 C. Fig 7. Test circuit for measuring ON resistance Fig 8. Typical ON resistance as a function of input voltage NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 9 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch 1.6 RON (Ω) 1.2 001aag565 1.0 RON (Ω) 0.8 (1) (2) (3) (4) 001aag566 0.6 0.8 (1) (2) (3) (4) 0.4 0.4 0.2 0 0 1 2 VI (V) 3 0 0 1 2 VI (V) 3 (1) Tamb = 125 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (1) Tamb = 125 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (4) Tamb = 40 C. Fig 9. ON resistance as a function of input voltage; VCC = 1.5 V Fig 10. ON resistance as a function of input voltage; VCC = 1.8 V 1.0 RON (Ω) 0.8 001aag567 1.0 RON (Ω) 0.8 001aag568 0.6 (1) (2) (3) (4) 0.6 (1) (2) (3) (4) 0.4 0.4 0.2 0.2 0 0 1 2 VI (V) 3 0 0 1 2 VI (V) 3 (1) Tamb = 125 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (1) Tamb = 125 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (4) Tamb = 40 C. Fig 11. ON resistance as a function of input voltage; VCC = 2.5 V Fig 12. ON resistance as a function of input voltage; VCC = 2.7 V NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 10 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch 1.0 RON (Ω) 0.8 001aag569 1.0 RON (Ω) 0.8 001aaj896 0.6 (1) (2) (3) (4) 0.6 (1) (2) (3) (4) 0.4 0.4 0.2 0.2 0 0 1 2 3 VI (V) 4 0 0 1 2 3 4 VI (V) 5 (1) Tamb = 125 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (1) Tamb = 125 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (4) Tamb = 40 C. Fig 13. ON resistance as a function of input voltage; VCC = 3.3 V Fig 14. ON resistance as a function of input voltage; VCC = 4.3 V 12. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 17. Symbol Parameter Conditions Min ten enable time E, Sn to Z or Yn; see Figure 15 VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 3.6 V to 4.3 V tdis disable time E, Sn to Z or Yn; see Figure 15 VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 3.6 V to 4.3 V 25 15 9 8 8 80 65 30 25 25 90 70 35 30 30 105 75 40 35 35 ns ns ns ns ns 45 32 21 19 19 100 75 50 45 45 120 85 55 45 45 125 95 60 50 50 ns ns ns ns ns 25 C Typ[1] Max 40 C to +125 C Min Max (85 C) Max (125 C) Unit NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 11 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch Table 9. Dynamic characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 17. Symbol Parameter Conditions Min tb-m break-before-make see Figure 16 time VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 3.6 V to 4.3 V [1] [2] [2] 25 C Typ[1] Max 40 C to +125 C Min Max (85 C) Max (125 C) - Unit - 19 17 12 10 9 - 9 7 4 3 2 ns ns ns ns ns Typical values are measured at Tamb = 25 C and VCC = 1.5 V, 1.8 V, 2.5 V, 3.3 V and 4.3 V respectively. Break-before-make guaranteed by design. 12.1 Waveform and test circuits VI Sn, E input GND ten VOH output OFF to HIGH HIGH to OFF GND tdis VOH output HIGH to OFF OFF to HIGH GND VX ten VX VX tdis VX VM VM 001aal664 Measurement points are given in Table 10. Logic level: VOH is typical output voltage level that occurs with the output load. Fig 15. Enable and disable times Table 10. VCC 1.4 V to 4.3 V Measurement points Input VM 0.5VCC Output VX 0.9VOH Supply voltage NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 12 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch VCC VIL or VIH Sn Z E G VI Yn VEXT = 1.5 V V VO RL CL GND VIL 001aal665 a. Test circuit VI 0.5VI 0.9VO VO tb-m 0.9VO 001aag572 b. Input and output measurement points Fig 16. Test circuit for measuring break-before-make timing VCC VIL or VIH Sn Z E G VI Yn VEXT = 1.5 V V VO RL CL GND VIL 001aal666 Test data is given in Table 11. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. VEXT = External voltage for measuring switching times. VI may be connected to Sn or E. Fig 17. Test circuit for measuring switching times Table 11. VCC 1.4 V to 4.3 V Test data Input VI VCC tr, tf  2.5 ns Load CL 35 pF RL 50  Supply voltage NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 13 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch 12.2 Additional dynamic characteristics Table 12. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise specified); tr = tf  2.5 ns; Tamb = 25 C. Symbol Parameter THD total harmonic distortion Conditions fi = 20 Hz to 20 kHz; RL = 32 ; see Figure 18 VCC = 1.4 V; VI = 1 V (p-p) VCC = 1.65 V; VI = 1.2 V (p-p) VCC = 2.3 V; VI = 1.5 V (p-p) VCC = 2.7 V; VI = 2 V (p-p) VCC = 4.3 V; VI = 2 V (p-p) f(3dB) iso Vct 3 dB frequency response isolation (OFF-state) crosstalk voltage RL = 50 ; see Figure 19 VCC = 1.4 V to 4.3 V fi = 100 kHz; RL = 50 ; see Figure 20 VCC = 1.4 V to 4.3 V between digital inputs and switch; fi = 1 MHz; CL = 50 pF; RL = 50 ; see Figure 21 VCC = 1.4 V to 3.6 V VCC = 3.6 V to 4.3 V Xtalk crosstalk between switches; fi = 100 kHz; RL = 50 ; see Figure 22 VCC = 1.4 V to 4.3 V Qinj charge injection fi = 1 MHz; CL = 0.1 nF; RL = 1 M; Vgen = 0 V; Rgen = 0 ; see Figure 23 VCC = 1.5 V VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 4.3 V [1] fi is biased at 0.5VCC. [1] [1] [1] [1] Min - Typ 0.15 0.10 0.02 0.02 0.02 15 90 Max - Unit % % % % % MHz dB - 0.2 0.3 - V V - 90 - dB - 3 4 6 9 15 - pC pC pC pC pC 12.3 Test circuits VCC Sn Z E fi 0.5VCC RL VIL or VIH Yn D VIL GND 001aal667 Fig 18. Test circuit for measuring total harmonic distortion NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 14 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch VCC Sn Z E fi 0.5VCC RL VIL or VIH Yn dB VIL GND 001aal668 Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads 3 dB. Fig 19. Test circuit for measuring the frequency response when channel is in ON-state 0.5VCC VCC RL 0.5VCC RL VIL or VIH Sn Z E fi Yn dB VIH GND 001aal669 Adjust fi voltage to obtain 0 dBm level at input. Fig 20. Test circuit for measuring isolation (OFF-state) NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 15 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch 0.5VCC VCC RL 0.5VCC RL VIL or VIH Sn Z E Yn VI G logic input CL V VO GND 001aal670 a. Test circuit logic input (Sn, E) off on off VO Vct 001aal671 b. Input and output pulse definitions Fig 21. Test circuit for measuring crosstalk voltage between digital inputs and switch 0.5VCC VCC RL 0.5VCC RL VIL or VIH Sn Z E Y0 Yn fi dB VIH GND 001aal672 Fig 22. Test circuit for measuring crosstalk between switches NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 16 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch VCC Sn Z E Rgen Yn VIL G VI V VO RL CL Vgen GND 001aal673 a. Test circuit logic input (Sn, E) off on off VO VO 001aal674 b. Input and output pulse definitions Definition: Qinj = VO  CL. VO = output voltage variation. Rgen = generator resistance. Vgen = generator voltage. VI may be connected to Sn or E. Fig 23. Test circuit for measuring charge injection NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 17 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch 13. Package outline HXQFN16U: plastic thermal enhanced extremely thin quad flat package; no leads; 16 terminals; UTLP based; body 3 x 3 x 0.5 mm SOT1039-1 D B A terminal 1 index area E A A1 detail X e1 e 1/2 e L1 5 b 8 v w M M CAB C C y1 C y L 4 9 e Eh 1/2 e 1 12 e2 terminal 1 index area 16 13 Dh 0 2.5 scale DIMENSIONS (mm are the original dimensions) UNIT mm A max 0.5 A1 0.05 0.00 b 0.35 0.25 D 3.1 2.9 Dh 1.95 1.75 E 3.1 2.9 Eh 1.95 1.75 e 0.5 e1 1.5 e2 1.5 L 0.35 0.25 L1 0.1 0.0 v 0.1 w 0.05 y 0.05 5 mm X y1 0.1 OUTLINE VERSION SOT1039-1 REFERENCES IEC --JEDEC JEITA --- EUROPEAN PROJECTION ISSUE DATE 07-11-14 07-12-01 Fig 24. Package outline SOT1039-1 (HXQFN16U) NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 18 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 D E A X c y HE vMA Z 16 9 Q A2 pin 1 index A1 θ Lp L (A 3) A 1 e bp 8 wM detail X 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 5.1 4.9 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.40 0.06 θ 8o o 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 Fig 25. Package outline SOT403-1 (TSSOP16) NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 19 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch 14. Abbreviations Table 13. Acronym CDM CMOS ESD HBM MM PDA Abbreviations Description Charged Device Model Complementary Metal-Oxide Semiconductor ElectroStatic Discharge Human Body Model Machine Model Personal Digital Assistant 15. Revision history Table 14. Revision history Release date 20100812 20100415 Data sheet status Product data sheet Product data sheet Change notice Supersedes NX3L4051 v.1 Document ID NX3L4051 v.2 Modifications: NX3L4051 v.1 • Marking code corrected. NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 20 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch 16. Legal information 16.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 16.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 21 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com NX3L4051 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 2 — 12 August 2010 22 of 23 NXP Semiconductors NX3L4051 Single low-ohmic 8-channel analog switch 18. Contents 1 2 3 4 5 6 7 7.1 7.2 8 9 10 11 11.1 11.2 11.3 12 12.1 12.2 12.3 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 8 ON resistance test circuit and graphs. . . . . . . . 9 Dynamic characteristics . . . . . . . . . . . . . . . . . 11 Waveform and test circuits . . . . . . . . . . . . . . . 12 Additional dynamic characteristics . . . . . . . . . 14 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 18 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 20 Legal information. . . . . . . . . . . . . . . . . . . . . . . 21 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 21 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Contact information. . . . . . . . . . . . . . . . . . . . . 22 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 12 August 2010 Document identifier: NX3L4051