NXL0840

NXL0840 SCR logic level Rev. 01 — 26 February 2008 Product data sheet 1. Product profile 1.1 General description Passivated sensitive gate Silicon-Controlled Rectifier (SCR) in a SOT54 plastic package 1.2 Features I Direct interfacing to logic level ICs I Direct interfacing to low-power gate drive circuits I For operation on DC and rectified AC supplies 1.3 Applications I Christmas lights control I Protection and safety shutdown circuits e.g. lighting ballasts 1.4 Quick reference data I VDRM ≤ 400 V I ITSM ≤ 8 A (t = 10 ms) I IT(RMS) ≤ 0.8 A I IT(AV) ≤ 0.5 A 2. Pinning information Table 1. Pin 1 2 3 Pinning Description anode (A) gate (G) cathode (K) A G sym037 Simplified outline Graphic symbol K 321 SOT54 (TO-92) NXP Semiconductors NXL0840 SCR logic level 3. Ordering information Table 2. Ordering information Package Name NXL0840 TO-92 Description plastic single-ended leaded (through hole) package; 3 leads Version SOT54 Type number 4. Limiting values Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDRM IT(AV) IT(RMS) ITSM Parameter repetitive peak off-state voltage average on-state current RMS on-state current non-repetitive peak on-state current half sine wave; Tlead ≤ 83 °C; see Figure 1 all conduction angles; see Figure 4 and 5 half sine wave; Tj = 25 °C prior to surge; see Figure 2 and 3 t = 10 ms t = 8.3 ms I2t dIT/dt IGM VGM VRGM PGM PG(AV) Tstg Tj I2t for fusing tp = 10 ms ITM = 2 A; IG = 10 mA; dIG/dt = 100 mA/µs rate of rise of on-state current peak gate current peak gate voltage peak reverse gate voltage peak gate power average gate power storage temperature junction temperature over any 20 ms period −40 8 9 0.32 50 1 5 5 2 0.1 +150 125 A A A2s A/µs A V V W W °C °C Conditions Min Max 400 0.5 0.8 Unit V A A NXL0840_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 26 February 2008 2 of 11 NXP Semiconductors NXL0840 SCR logic level 0.8 Ptot (W) 0.6 2.2 2.8 0.4 4 a= 1.57 1.9 001aab446 77 Tlead(max) (°C) 89 101 conduction angle (degrees) 30 60 90 120 180 form factor a 4 2.8 2.2 1.9 1.57 0.5 IT(AV) (A) 113 α 0.2 0 0 0.1 0.2 0.3 0.4 125 0.6 α = conduction angle Fig 1. 10 ITSM (A) 8 Total power dissipation as a function of average on-state current; maximum values 001aab499 6 4 IT ITSM 2 t tp Tj(init) = 25 °C max 0 1 10 102 number of cycles 103 f = 50 Hz Fig 2. Non-repetitive peak on-state current as a function of the number of sinusoidal current cycles; maximum values NXL0840_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 26 February 2008 3 of 11 NXP Semiconductors NXL0840 SCR logic level 103 ITSM (A) 102 IT 001aab497 ITSM t tp Tj(init) = 25 °C max 10 1 10−5 10−4 10−3 tp (s) 10−2 tp ≤ 10 ms Fig 3. 2 IT(RMS) (A) 1.5 Non-repetitive peak on-state current as a function of pulse width; maximum values 001aab449 1 IT(RMS) (A) 0.8 001aab450 (1) 0.6 1 0.4 0.5 0.2 0 10−2 10−1 1 10 surge duration (s) 0 −50 0 50 100 150 Tlead (°C) f = 50 Hz Tlead = 83 °C (1) Tlead = 83 °C Fig 4. RMS on-state current as a function of surge duration; maximum values Fig 5. RMS on-state current as a function of lead temperature; maximum values NXL0840_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 26 February 2008 4 of 11 NXP Semiconductors NXL0840 SCR logic level 5. Thermal characteristics Table 4. Symbol Rth(j-lead) Rth(j-a) Thermal characteristics Parameter Conditions Min Typ 150 Max 60 Unit K/W K/W thermal resistance from junction to see Figure 6 lead thermal resistance from junction to printed circuit board ambient mounted; lead length 4 mm 102 Zth(j-lead) (K/W) 10 001aab451 1 P δ= tp T 10−1 tp T t 10−2 10−5 10−4 10−3 10−2 10−1 1 tp (s) 10 Fig 6. Transient thermal impedance from junction to lead as a function of pulse width NXL0840_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 26 February 2008 5 of 11 NXP Semiconductors NXL0840 SCR logic level 6. Characteristics Table 5. Characteristics Tj = 25 °C unless otherwise specified. Symbol Parameter Static characteristics IGT IL IH VT VGT gate trigger current latching current holding current on-state voltage gate trigger voltage VD = 12 V; IT = 10 mA; see Figure 8 VD = 12 V; IG = 0.5 mA; RGK = 1 kΩ; see Figure 10 VD = 12 V; IG = 0.5 mA; RGK = 1 kΩ; see Figure 11 IT = 1.2 A; see Figure 9 IT = 10 mA; see Figure 7 VD = 12 V VD = VDRM(max); Tj = 125 °C ID dVD/dt off-state current rate of rise of off-state voltage VD = VDRM(max); Tj = 125 °C; RGK = 1 kΩ VDM = 0.67 × VDRM(max); Tj = 125 °C; exponential waveform; see Figure 12 RGK = 1 kΩ gate open circuit 200 600 25 V/µs V/µs Dynamic characteristics 0.2 0.5 0.3 0.05 0.8 0.1 V V mA 50 2 2 1.25 200 6 5 1.7 µA mA mA V Conditions Min Typ Max Unit 1.6 VGT VGT(25°C) 1.2 001aab501 3 IGT IGT(25°C) 2 001aab502 0.8 1 0.4 −50 0 50 100 Tj (°C) 150 0 −50 0 50 100 Tj (°C) 150 Fig 7. Normalized gate trigger voltage as a function of junction temperature Fig 8. Normalized gate trigger current as a function of junction temperature NXL0840_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 26 February 2008 6 of 11 NXP Semiconductors NXL0840 SCR logic level 5 IT (A) 4 001aab454 3 IL IL(25°C) 2 001aab503 3 2 1 1 (1) (2) (3) 0 0.4 1.2 2 VT (V) 2.8 0 −50 0 50 100 Tj (°C) 150 Vo = 1.067 V Rs = 0.187 Ω (1) Tj = 125 °C; typical values (2) Tj = 125 °C; maximum values (3) Tj = 25 °C; maximum values RGK = 1 kΩ Fig 9. On-state current as a function of on-state voltage 3 001aab504 Fig 10. Normalized latching current as a function of junction temperature 104 dVD/dt (V/µs) 103 (1) 003aac213 IH IH(25°C) 2 1 102 (2) 0 −50 10 0 50 100 Tj (°C) 150 0 50 100 Tj (°C) 150 RGK = 1 kΩ (1) RGK = 1 kΩ (2) Gate open-circuit Fig 11. Normalized holding current as a function of junction temperature Fig 12. Critical rate of rise of off-state voltage as a function of junction temperature; typical values NXL0840_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 26 February 2008 7 of 11 NXP Semiconductors NXL0840 SCR logic level 7. Package outline Plastic single-ended leaded (through hole) package; 3 leads SOT54 c E d A L b 1 D 2 e1 e 3 b1 L1 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 5.2 5.0 b 0.48 0.40 b1 0.66 0.55 c 0.45 0.38 D 4.8 4.4 d 1.7 1.4 E 4.2 3.6 e 2.54 e1 1.27 L 14.5 12.7 L1(1) max. 2.5 Note 1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities. OUTLINE VERSION SOT54 REFERENCES IEC JEDEC TO-92 JEITA SC-43A EUROPEAN PROJECTION ISSUE DATE 04-06-28 04-11-16 Fig 13. Package outline SOT54 (TO-92) NXL0840_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 26 February 2008 8 of 11 NXP Semiconductors NXL0840 SCR logic level 8. Revision history Table 6. Revision history Release date 20080226 Data sheet status Product data sheet Change notice Supersedes Document ID NXL0840_1 NXL0840_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 26 February 2008 9 of 11 NXP Semiconductors NXL0840 SCR logic level 9. Legal information 9.1 Data sheet status Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 9.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com NXL0840_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 26 February 2008 10 of 11 NXP Semiconductors NXL0840 SCR logic level 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 11 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 9 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Contact information. . . . . . . . . . . . . . . . . . . . . 10 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 26 February 2008 Document identifier: NXL0840_1