PBLS2001S
20 V PNP BISS loadswitch
Rev. 02 — 24 August 2009 Product data sheet
1. Product profile
1.1 General description
PNP low VCEsat Breakthrough In Small Signal (BISS) transistor and NPN ResistorEquipped Transistor (RET) in a SOT96-1 (SO8) small Surface-Mounted Device (SMD) plastic package.
1.2 Features
I I I I I Low VCEsat (BISS) transistor and resistor-equipped transistor in one package Low threshold voltage (< 1 V) compared to MOSFET Low drive power required Space-saving solution Reduction of component count
1.3 Applications
I I I I Supply line switches Battery charger switches High-side switches for LEDs, drivers and backlights Portable equipment
1.4 Quick reference data
Table 1. Symbol VCEO IC RCEsat Quick reference data Parameter collector-emitter voltage collector current collector-emitter saturation resistance collector-emitter voltage output current bias resistor 1 (input) bias resistor ratio IC = −2 A; IB = −200 mA open base
[1]
Conditions open base
Min -
Typ 75
Max −20 −3 120
Unit V A mΩ
TR1; PNP low VCEsat (BISS) transistor
TR2; NPN resistor-equipped transistor VCEO IO R1 R2/R1
[1]
1.54 0.8
2.2 1
50 100 2.86 1.2
V mA kΩ
Pulse test: tp ≤ 300 µs; δ ≤ 0.02
NXP Semiconductors
PBLS2001S
20 V PNP BISS loadswitch
2. Pinning information
Table 2. Pin 1 2 3 4 5 6 7 8 Pinning Description input (base) TR2 GND (emitter) TR2 base TR1 emitter TR1 collector TR1 collector TR1 output (collector) TR2 output (collector) TR2
4
TR1
Simplified outline
8 5
Symbol
1
R1 R2
8
1
4
2 3
TR2
7 6
5
006aaa813
3. Ordering information
Table 3. Ordering information Name PBLS2001S SO8 Description plastic small outline package; 8 leads; body width 3.9 mm Version SOT96-1 Type number Package
4. Marking
Table 4. Marking codes Marking code LS2001S Type number PBLS2001S
PBLS2001S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
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NXP Semiconductors
PBLS2001S
20 V PNP BISS loadswitch
5. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCBO VCEO VEBO IC ICM IB IBM Ptot Parameter collector-base voltage collector-emitter voltage emitter-base voltage collector current peak collector current base current peak base current total power dissipation single pulse; tp ≤ 1 ms Tamb ≤ 25 °C
[1] [2] [3]
Conditions open emitter open base open collector single pulse; tp ≤ 1 ms
Min -
Max −20 −20 −5 −3 −5 −0.5 −1 0.55 0.87 1.43 50 50 10 +12 −10 100 100 0.2 0.7 1.0 1.5 150 +150 +150
Unit V V V A A A A W W W V V V V V mA mA W W W W °C °C °C
TR1; PNP low VCEsat (BISS) transistor
TR2; NPN resistor-equipped transistor VCBO VCEO VEBO VI collector-base voltage collector-emitter voltage emitter-base voltage input voltage positive negative IO ICM Ptot Per device Ptot total power dissipation Tamb ≤ 25 °C
[1] [2] [3]
open emitter open base open collector
output current peak collector current total power dissipation single pulse; tp ≤ 1 ms Tamb ≤ 25 °C
[1]
−65 −65
Tj Tamb Tstg
[1] [2] [3]
junction temperature ambient temperature storage temperature
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1cm2. Device mounted on a ceramic PCB, Al2O3, standard footprint.
PBLS2001S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
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NXP Semiconductors
PBLS2001S
20 V PNP BISS loadswitch
2.0 Ptot (W)
(1)
006aaa808
1.5
(2)
1.0
(3)
0.5
0 −75
−25
25
75
125 175 Tamb (°C)
(1) Ceramic PCB, Al2O3, standard footprint (2) FR4 PCB, mounting pad for collector 1cm2 (3) FR4 PCB, standard footprint
Fig 1.
Power derating curves
6. Thermal characteristics
Table 6. Symbol Per device Rth(j-a) thermal resistance from junction to ambient in free air
[1] [2] [3]
Thermal characteristics Parameter Conditions Min Typ Max 180 125 85 40 Unit K/W K/W K/W K/W
TR1; PNP low VCEsat (BISS) transistor Rth(j-sp)
[1] [2] [3]
thermal resistance from junction to solder point
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1cm2. Device mounted on a ceramic PCB, Al2O3, standard footprint.
PBLS2001S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
4 of 16
NXP Semiconductors
PBLS2001S
20 V PNP BISS loadswitch
103 Zth(j-a) (K/W) 102 duty cycle = 1.0 0.75 0.5 0.33 0.2 0.1 10 0.05 0.02 0.01 0 1
006aaa809
10−1 10−5
10−4
10−3
10−2
10−1
1
10
102 tp (s)
103
FR4 PCB, standard footprint
Fig 2.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
006aaa810
103 Zth(j-a) (K/W) 102 duty cycle =
1.0 0.75 0.5 0.33 0.2 0.1 0.05 0.02 0.01
10
1
0
10−1 10−5
10−4
10−3
10−2
10−1
1
10
102 tp (s)
103
FR4 PCB, mounting pad for collector 1cm2
Fig 3.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PBLS2001S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
5 of 16
NXP Semiconductors
PBLS2001S
20 V PNP BISS loadswitch
103 Zth(j-a) (K/W) duty cycle = 102 1.0 0.75 0.5 0.33 0.2 10 0.1 0.05 0.02 0.01 0 1 10−4
006aaa811
10−3
10−2
10−1
1
10
102 tp (s)
103
Ceramic PCB, Al2O3, standard footprint
Fig 4.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
7. Characteristics
Table 7. Characteristics Tamb = 25 °C unless otherwise specified Symbol Parameter ICBO Conditions Min 220
[1] [1] [1] [1] [1] [1] [1] [1] [1] [1] [1]
Typ 420 360 310 235 180 −45 −90 −160 −150 −220 80 75
Max −100 −50 −100 −100 −75 −140 −255 −240 −355 130 120
Unit nA µA nA nA
TR1; PNP low VCEsat (BISS) transistor collector-base cut-off VCB = −20 V; IE = 0 A current VCB = −20 V; IE = 0 A; Tj = 150 °C collector-emitter cut-off current emitter-base cut-off current DC current gain VCE = −20 V; VBE = 0 V VEB = −5 V; IC = 0 A VCE = −2 V; IC = −0.1 A VCE = −2 V; IC = −0.5 A VCE = −2 V; IC = −1 A VCE = −2 V; IC = −2 A VCE = −2 V; IC = −3 A VCEsat collector-emitter saturation voltage IC = −0.5 A; IB = −50 mA IC = −1 A; IB = −50 mA IC = −2 A; IB = −100 mA IC = −2 A; IB = −200 mA IC = −3 A; IB = −300 mA RCEsat collector-emitter IC = −2 A; IB = −100 mA saturation resistance I = −2 A; I = −200 mA C B
ICES IEBO hFE
220 200 150 100 -
mV mV mV mV mV mΩ mΩ
PBLS2001S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
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NXP Semiconductors
PBLS2001S
20 V PNP BISS loadswitch
Table 7. Characteristics …continued Tamb = 25 °C unless otherwise specified Symbol Parameter VBEsat VBEon td tr ton ts tf toff fT Cc base-emitter saturation voltage base-emitter turn-on voltage delay time rise time turn-on time storage time fall time turn-off time transition frequency IC = −100 mA; VCE = −5 V; f = 100 MHz Conditions IC = −2 A; IB = −100 mA IC = −3 A; IB = −300 mA VCE = −2 V; IC = −1 A IC = −2 A; IBon = −100 mA; IBoff = 100 mA
[1] [1] [1]
Min 100 -
Typ −0.95 −1 −0.8 7 34 41 175 30 205 -
Max −1.1 −1.2 −1.2 50
Unit V V V ns ns ns ns ns ns MHz pF
collector capacitance VCB = −10 V; IE = ie = 0 A; f = 1 MHz collector-base cut-off VCB = 50 V; IE = 0 A current collector-emitter cut-off current emitter-base cut-off current DC current gain collector-emitter saturation voltage VCE = 30 V; IB = 0 A VCE = 30 V; IB = 0 A; Tj = 150 °C VEB = 5 V; IC = 0 A VCE = 5 V; IC = 20 mA IC = 10 mA; IB = 0.5 mA
TR2; NPN resistor-equipped transistor ICBO ICEO 30 2 1.54 0.8 1.2 1.6 2.2 1 100 1 50 2 150 0.5 2.86 1.2 2.5 pF mV V V kΩ nA µA µA mA
IEBO hFE VCEsat VI(off) VI(on) R1 R2/R1 Cc
off-state input voltage VCE = 5 V; IC = 1 mA on-state input voltage VCE = 0.3 V; IC = 20 mA bias resistor 1 (input) bias resistor ratio collector capacitance VCB = 10 V; IE = ie = 0 A; f = 1 MHz
[1]
Pulse test: tp ≤ 300 µs; δ ≤ 0.02
PBLS2001S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
7 of 16
NXP Semiconductors
PBLS2001S
20 V PNP BISS loadswitch
800 hFE
(1)
006aaa800
−5 IC (A) −4 IB (mA) =
006aaa801
600 −3
−45.0 −40.5 −36.0 −31.5 −27.0 −22.5 −18.0 −13.5
(2)
400 −2
(3)
−9.0 −4.5
200
−1
0
−1
−10
−102
−103 IC (mA)
−104
0 0
−0.4
−0.8
−1.2
−1.6 −2.0 VCE (V)
VCE = −2 V (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −55 °C
Tamb = 25 °C
Fig 5.
TR1 (PNP): DC current gain as a function of collector current; typical values
006aaa802
Fig 6.
TR1 (PNP): Collector current as a function of collector-emitter voltage; typical values
006aaa803
−1.1 VBE (V) −0.9
(1)
−1.1 VBEsat (V) −0.9
(1)
−0.7
(2)
−0.7
(2)
(3)
−0.5
(3)
−0.5
−0.3
−0.3
−0.1
−1
−10
−102
−103 IC (mA)
−104
−0.1
−1
−10
−102
−103 IC (mA)
−104
VCE = −2 V (1) Tamb = −55 °C (2) Tamb = 25 °C (3) Tamb = 100 °C
IC/IB = 20 (1) Tamb = −55 °C (2) Tamb = 25 °C (3) Tamb = 100 °C
Fig 7.
TR1 (PNP): Base-emitter voltage as a function of collector current; typical values
Fig 8.
TR1 (PNP): Base-emitter saturation voltage as a function of collector current; typical values
PBLS2001S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
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NXP Semiconductors
PBLS2001S
20 V PNP BISS loadswitch
−1 VCEsat (V) −10−1
(1) (2) (3)
006aaa804
−1 VCEsat (V) −10−1
006aaa805
(1) (2)
−10−2
−10−2
(3)
−10−3
−1
−10
−102
−103 IC (mA)
−104
−10−3
−1
−10
−102
−103 IC (mA)
−104
IC/IB = 20 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −55 °C
Tamb = 25 °C (1) IC/IB = 100 (2) IC/IB = 50 (3) IC/IB = 10
Fig 9.
TR1 (PNP): Collector-emitter saturation voltage as a function of collector current; typical values
10
006aaa806
Fig 10. TR1 (PNP): Collector-emitter saturation voltage as a function of collector current; typical values
102 RCEsat (Ω) 10
006aaa807
RCEsat (Ω) 1
(1) (2) (3)
1
(1) (2) (3)
10−1 10−1
10−2
−1
−10
−102
−103 IC (mA)
−104
10−2
−1
−10
−102
−103 IC (mA)
−104
IC/IB = 20 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −55 °C
Tamb = 25 °C (1) IC/IB = 100 (2) IC/IB = 50 (3) IC/IB = 10
Fig 11. TR1 (PNP): Collector-emitter saturation resistance as a function of collector current; typical values
Fig 12. TR1 (PNP): Collector-emitter saturation resistance as a function of collector current; typical values
PBLS2001S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
9 of 16
NXP Semiconductors
PBLS2001S
20 V PNP BISS loadswitch
103 hFE
006aaa015
103
006aaa014
102
(1) (2) (3)
VCEsat (mV)
102
(1) (2) (3)
10
1 10−1
1
10 IC (mA)
102
10 1 10 IC (mA)
102
VCE = 5 V (1) Tamb = 150 °C (2) Tamb = 25 °C (3) Tamb = −40 °C
IC/IB = 20 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −40 °C
Fig 13. TR2 (NPN): DC current gain as a function of collector current; typical values
Fig 14. TR2 (NPN): Collector-emitter saturation voltage as a function of collector current; typical values
10
006aaa017
102 VI(on) (V) 10
006aaa016
VI(off) (V)
(1)
1
(1) (2) (3)
(2) (3)
1
10−1 10−1
1
10 IC (mA)
102
10−1 10−2
10−1
1 IC (mA)
10
VCE = 0.3 V (1) Tamb = −40 °C (2) Tamb = 25 °C (3) Tamb = 100 °C
VCE = 5 V (1) Tamb = −40 °C (2) Tamb = 25 °C (3) Tamb = 100 °C
Fig 15. TR2 (NPN): On-state input voltage as a function of collector current; typical values
Fig 16. TR2 (NPN): Off-state input voltage as a function of collector current; typical values
PBLS2001S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
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NXP Semiconductors
PBLS2001S
20 V PNP BISS loadswitch
8. Test information
− IB
90 % input pulse (idealized waveform)
− I Bon (100 %)
10 %
− I Boff
− IC
90 %
output pulse (idealized waveform)
− I C (100 %)
10 % t td t on tr ts t off tf
006aaa266
Fig 17. BISS transistor switching time definition
VBB VCC
RB (probe) oscilloscope 450 Ω VI R1 R2
RC Vo (probe) 450 Ω DUT oscilloscope
mgd624
IC = −2 A; IBon = −100 mA; IBoff = 100 mA; R1 = open; R2 = 25 Ω; RB = 70 Ω; RC = 5 Ω
Fig 18. Test circuit for switching times
PBLS2001S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
11 of 16
NXP Semiconductors
PBLS2001S
20 V PNP BISS loadswitch
9. Package outline
5.0 4.8
1.75
1.0 0.4 6.2 5.8 4.0 3.8
pin 1 index
1.27 Dimensions in mm
0.49 0.36
0.25 0.19 03-02-18
Fig 19. Package outline SOT96-1 (SO8)
10. Packing information
Table 8. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number PBLS2001S
[1]
Package SOT96-1
Description 8 mm pitch, 12 mm tape and reel
Packing quantity 1000 -115 2500 -118
For further information and the availability of packing methods, see Section 14.
PBLS2001S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
12 of 16
NXP Semiconductors
PBLS2001S
20 V PNP BISS loadswitch
11. Soldering
5.50 0.60 (8×)
1.30
4.00
6.60
7.00
1.27 (6×)
solder lands occupied area
placement accuracy ± 0.25
Dimensions in mm
sot096-1_fr
Fig 20. Reflow soldering footprint SOT96-1 (SO8)
1.20 (2×) 0.60 (6×) 0.3 (2×) enlarged solder land
1.30
4.00
6.60
7.00
1.27 (6×) 5.50 board direction
solder lands occupied area
solder resist
placement accurracy ± 0.25
Dimensions in mm
sot096-1_fw
Fig 21. Wave soldering footprint SOT96-1 (SO8)
PBLS2001S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
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NXP Semiconductors
PBLS2001S
20 V PNP BISS loadswitch
12. Revision history
Table 9. Revision history Release date 20090824 Data sheet status Product data sheet Change notice Supersedes PBLS2001S_1 Document ID PBLS2001S_2 Modifications:
•
This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions and disclaimers. No changes were made to the technical content. Product data sheet -
PBLS2001S_1
20060803
PBLS2001S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
14 of 16
NXP Semiconductors
PBLS2001S
20 V PNP BISS loadswitch
13. Legal information
13.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
13.2 Definitions
Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.
13.3 Disclaimers
General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
14. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
PBLS2001S_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 24 August 2009
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PBLS2001S
20 V PNP BISS loadswitch
15. Contents
1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Test information . . . . . . . . . . . . . . . . . . . . . . . . 11 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 Packing information. . . . . . . . . . . . . . . . . . . . . 12 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Contact information. . . . . . . . . . . . . . . . . . . . . 15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 24 August 2009 Document identifier: PBLS2001S_2