PBLS6003D
60 V, 1 A PNP loadswitch double transistor
30 August 2023
Product data sheet
1. General description
PNP low VCEsat transistor and NPN Resistor-Equipped Transistor (RET) in a SOT457 (SC-74)
small Surface Mounted Device (SMD) plastic package.
2. Features and benefits
•
•
•
•
•
•
Low VCEsat transistor and resistor-equipped transistor in one package
Low threshold voltage (< 1 V) compared to MOSFET
Low drive power required
Space-saving solution
Reduction of component count
AEC-Q101 qualified
3. Applications
•
•
•
•
Supply line switches
Battery charger switches
High-side switches for LEDs, drivers and backlights
Portable equipment
4. Quick reference data
Table 1. Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
open base
-
-
-60
V
-
-
-1
A
IC = -1 A; IB = -100 mA; Tamb = 25 °C;
pulsed; tp ≤ 300 µs; δfactor ≤ 0.02
-
255
340
mΩ
open base
-
-
50
V
TR1; PNP low VCEsat transistor
VCEO
collector-emitter
voltage
IC
collector current
RCEsat
collector-emitter
saturation resistance
[1]
TR2; NPN resistor-equipped transistor
VCEO
collector-emitter
voltage
IO
output current
-
-
100
mA
R1
bias resistor 1 (input)
7
10
13
kΩ
R2/R1
bias resistor ratio
0.8
1
1.2
[1]
Device mounted on a ceramic Printed-Circuit Board (PCB), Al2O3, standard footprint.
PBLS6003D
Nexperia
60 V, 1 A PNP loadswitch double transistor
5. Pinning information
Table 2. Pinning information
Pin
Symbol
Description
Simplified outline
1
E1
emitter TR1
2
B1
base TR1
3
O2
output (collector) TR2
4
GND2
GND (emitter) TR2
5
I2
input (base) TR2
6
C1
collector TR1
Graphic symbol
C1
6
5
I2
4
R1
1
2
GND2
3
R2
TR2
TR1
TSOP6 (SOT457)
E1
B1
O2
sym036
6. Ordering information
Table 3. Ordering information
Type number
Package
PBLS6003D
Name
Description
Version
TSOP6
plastic, surface-mounted package (SC-74; TSOP6); 6
leads
SOT457
7. Marking
Table 4. Marking codes
Type number
Marking code
PBLS6003D
F3
PBLS6003D
Product data sheet
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Nexperia
60 V, 1 A PNP loadswitch double transistor
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
TR1; PNP low VCEsat transistor
VCBO
collector-base voltage
open emitter
-
-80
V
VCEO
collector-emitter voltage
open base
-
-60
V
VEBO
emitter-base voltage
open collector
-
-5
V
IC
collector current
[1]
-
-700
mA
[2]
-
-850
mA
[3]
-
-1
A
-
-2
A
-
-300
mA
-
-1
A
[1]
-
250
mW
[2]
-
350
mW
[3]
-
400
mW
ICM
peak collector current
IB
base current
single pulse; tp ≤ 1 ms
IBM
peak base current
single pulse; tp ≤ 1 ms
Ptot
total power dissipation
Tamb ≤ 25 °C
TR2; NPN resistor-equipped transistor
VCBO
collector-base voltage
open emitter
-
50
V
VCEO
collector-emitter voltage
open base
-
50
V
VEBO
emitter-base voltage
open collector
-
10
V
VI
input voltage
-10
40
V
IO
output current
-
100
mA
ICM
peak collector current
-
100
mA
Ptot
total power dissipation
[1]
-
200
mW
[2]
-
200
mW
[3]
-
200
mW
[1]
-
400
mW
[2]
-
530
mW
[3]
-
600
mW
Tamb ≤ 25 °C
Per device
Ptot
total power dissipation
Tamb ≤ 25 °C
Tj
junction temperature
-
150
°C
Tamb
ambient temperature
-65
150
°C
Tstg
storage temperature
-65
150
°C
[1]
[2]
[3]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
2
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm .
Device mounted on a ceramic PCB, Al2O3, standard footprint.
PBLS6003D
Product data sheet
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PBLS6003D
Nexperia
60 V, 1 A PNP loadswitch double transistor
006aaa461
0.8
Ptot
(W)
(1)
0.6
(2)
(3)
0.4
0.2
0
0
40
80
120
160
Tamb (°C)
(1) Ceramic PCB, Al2O3, standard footprint
2
(2) FR4 PCB, mounting pad for collector 1 cm
(3) FR4 PCB, standard footprint
Fig. 1.
Power derating curves
9. Thermal characteristics
Table 6. Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
[1]
-
-
312
K/W
[2]
-
-
236
K/W
[3]
-
-
208
K/W
-
-
105
K/W
Per device
Rth(j-a)
thermal resistance from in free air
junction to ambient
TR1; PNP low VCEsat transistor
Rth(j-sp)
[1]
[2]
[3]
thermal resistance from
junction to solder point
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
2
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm .
Device mounted on a ceramic PCB, Al2O3, standard footprint.
PBLS6003D
Product data sheet
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PBLS6003D
Nexperia
60 V, 1 A PNP loadswitch double transistor
006aaa462
103
δ= 1
0.75
0.5
0.33
102
0.2
0.1
Zth(j-a)
(K/W)
0.05
0.02
0.01
10
0
1
10- 1
10- 5
10- 4
10- 3
10- 2
10- 1
1
10
102
tp (s)
103
FR4 PCB, standard footprint
Fig. 2.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
006aaa463
103
Zth(j-a)
(K/W)
δ=1
102
0.75
0.5
0.33
0.2
0.1
0.05
10
0.02
0.01
0
1
10- 5
10- 4
10- 3
10- 2
FR4 PCB, mounting pad for collector 1 cm
Fig. 3.
10- 1
1
10
102
2
tp (s)
103
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
PBLS6003D
Product data sheet
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PBLS6003D
Nexperia
60 V, 1 A PNP loadswitch double transistor
006aaa464
103
Zth(j-a)
(K/W) δ = 1
0.75
0.5
102
0.33
0.2
0.1
0.05
10
0.02
0.01
0
1
10- 5
10- 4
10- 3
10- 2
10- 1
1
102
10
tp (s)
103
Ceramic PCB, Al2O3, standard footprint
Fig. 4.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
10. Characteristics
Table 7. Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VCB = -60 V; IE = 0 A; Tamb = 25 °C
-
-
-100
nA
VCB = -60 V; IE = 0 A; Tj = 150 °C
-
-
-50
µA
TR1; PNP low VCEsat transistor
ICBO
collector-base cut-off
current
ICES
collector-emitter cut-off VCE = -60 V; VBE = 0 V; Tamb = 25 °C
current
-
-
-100
nA
IEBO
emitter-base cut-off
current
VEB = -5 V; IC = 0 A; Tamb = 25 °C
-
-
-100
nA
hFE
DC current gain
VCE = -5 V; IC = -1 mA; Tamb = 25 °C
200
350
-
VCE = -5 V; IC = -500 mA; pulsed; tp ≤
300 µs; δ ≤ 0.02; Tamb = 25 °C
150
230
-
VCE = -5 V; IC = -1 A; pulsed; tp ≤
300 µs; δ ≤ 0.02; TR1; PNP low VCEsat
transistor; Tamb = 25 °C
100
160
-
IC = -100 mA; IB = -1 mA; Tamb = 25 °C
-
-110
-175
mV
IC = -500 mA; IB = -50 mA; pulsed; tp ≤
300 µs; δ ≤ 0.02; Tamb = 25 °C
-
-135
-180
mV
IC = -1 A; IB = -100 mA; pulsed; tp ≤
300 µs; δ ≤ 0.02; Tamb = 25 °C
-
-255
-340
mV
IC = -1 A; IB = -100 mA; Tamb = 25 °C;
pulsed; tp ≤ 300 µs; δfactor ≤ 0.02
-
255
340
mΩ
VCEsat
collector-emitter
saturation voltage
RCEsat
collector-emitter
saturation resistance
VBEsat
base-emitter saturation IC = -1 A; IB = -50 mA; Tamb = 25 °C;
voltage
pulsed; tp ≤ 300 µs; δfactor ≤ 0.02
-
-0.95
-1.1
V
VBEon
base-emitter turn-on
voltage
-
-0.82
-0.9
V
PBLS6003D
Product data sheet
VCE = -5 V; IC = -1 A; Tamb = 25 °C;
pulsed; tp ≤ 300 µs; δfactor ≤ 0.02
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PBLS6003D
Nexperia
60 V, 1 A PNP loadswitch double transistor
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
td
delay time
-
11
-
ns
tr
rise time
-
30
-
ns
ton
turn-on time
-
41
-
ns
ts
storage time
IC = -0.5 A;
IBon = -25 mA;
IBoff = 25 mA;
Tamb = 25 °C
-
205
-
ns
tf
fall time
-
55
-
ns
toff
turn-off time
-
260
-
ns
Cc
collector capacitance
VCB = -10 V; IE = 0 A; ie = 0 A;
f = 1 MHz; Tamb = 25 °C
-
9
15
pF
fT
transition frequency
VCE = -10 V; IC = -50 mA; f = 100 MHz;
Tamb = 25 °C
150
185
-
MHz
TR2; NPN resistor-equipped transistor
ICBO
collector-base cut-off
current
VCB = 50 V; IE = 0 A; Tamb = 25 °C
-
-
100
nA
ICEO
collector-emitter cut-off VCE = 30 V; IB = 0 A; Tamb = 25 °C
current
VCE = 30 V; IB = 0 A; Tj = 150 °C
-
-
1
µA
-
-
50
µA
IEBO
emitter-base cut-off
current
VEB = 5 V; IC = 0 A; Tamb = 25 °C
-
-
400
µA
hFE
DC current gain
VCE = 5 V; IC = 5 mA; Tamb = 25 °C
30
-
-
VCEsat
collector-emitter
saturation voltage
IC = 10 mA; IB = 0.5 mA; Tamb = 25 °C
-
-
150
mV
VI(off)
off-state input voltage
VCE = 5 V; IC = 100 µA; Tamb = 25 °C
-
1.1
0.8
V
VI(on)
on-state input voltage
VCE = 0.3 V; IC = 10 mA; Tamb = 25 °C
2.5
1.8
-
V
R1
bias resistor 1 (input)
7
10
13
kΩ
R2/R1
bias resistor ratio
0.8
1
1.2
Cc
collector capacitance
-
-
2.5
VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz;
Tamb = 25 °C
006aaa474
600
pF
006aaa475
-1
(1)
hFE
VCEsat
(V)
400
(2)
- 10- 1
(3)
200
0
- 10- 1
-1
(1)
(2)
(3)
- 10
- 102
- 10- 2
- 10- 1
- 103
- 104
IC (mA)
VCE = -5 V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -55 °C
Fig. 5.
Product data sheet
- 10
- 102
- 103
- 104
IC (mA)
IC/IB = 20
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -55 °C
TR1 (PNP): DC current gain as a function of
collector current; typical values
PBLS6003D
-1
Fig. 6.
TR1 (PNP): Collector-emitter saturation voltage
as a function of collector current; typical values
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Nexperia
60 V, 1 A PNP loadswitch double transistor
006aaa476
- 1.0
006aaa477
- 1.1
VBEsat
(V)
VBE
(V)
- 0.8
- 0.9
(1)
(1)
- 0.7
(2)
- 0.6
- 0.5
(2)
(3)
(3)
- 0.4
- 0.3
- 0.2
- 10- 1
-1
- 10
- 102
- 0.1
- 10- 1
- 103
- 104
IC (mA)
VCE = −5 V
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 7.
006aaa478
IB (mA) = - 35.0
- 31.5
- 28.0
- 24.5
- 21.0
IC
(A)
- 1.6
- 103
- 104
IC (mA)
Fig. 8.
TR1 (PNP): Base-emitter saturation voltage as a
function of collector current; typical values
006aaa479
103
- 17.5
- 14.0
102
- 10.5
- 7.0
- 0.8
10
(1)
(2)
(3)
- 3.5
1
- 0.4
0
-1
-2
-3
-4
VCE (V)
10- 1
- 10- 1
-5
Tamb = 25 °C
Fig. 9.
- 102
RCEsat
(Ω)
- 1.2
0.0
- 10
IC/IB = 20
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
TR1 (PNP): Base-emitter voltage as a function
of collector current; typical values
- 2.0
-1
-1
- 10
- 102
- 103
- 104
IC (mA)
IC/IB = 20
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -55 °C
TR1 (PNP): Collector current as a function of
collector-emitter voltage; typical values
Fig. 10. TR1 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
PBLS6003D
Product data sheet
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PBLS6003D
Nexperia
60 V, 1 A PNP loadswitch double transistor
006aaa480
-1
006aaa481
103
RCEsat
(Ω)
VCEsat
(V)
102
- 10- 1
10
(1)
(2)
(3)
(1)
(2)
1
(3)
- 10- 2
- 10- 1
-1
- 10
- 102
10- 1
- 10- 1
- 103
- 104
IC (mA)
Tamb = 25 °C
(1) IC/IB = 100
(2) IC/IB = 50
(3) IC/IB = 10
-1
- 102
- 10
- 103
- 104
IC (mA)
Tamb = 25 °C
(1) IC/IB = 100
(2) IC/IB = 50
(3) IC/IB = 10
Fig. 11. TR1 (PNP): Collector-emitter saturation voltage Fig. 12. TR1 (PNP): Collector-emitter saturation
as a function of collector current; typical values
resistance as a function of collector current;
typical values
006aaa034
103
(1)
(2)
(3)
hFE
006aaa035
1
VCEsat
(V)
102
(1)
(2)
(3)
10- 1
10
1
10- 1
1
10
IC (mA)
10- 2
102
VCE = 5 V
(1) Tamb = 150 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
Product data sheet
10
IC (mA)
102
IC/IB = 20
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
Fig. 13. TR2 (NPN): DC current gain as a function of
collector current; typical values
PBLS6003D
1
Fig. 14. TR2 (NPN): Collector-emitter saturation voltage
as a function of collector current; typical values
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PBLS6003D
Nexperia
60 V, 1 A PNP loadswitch double transistor
006aaa036
10
VI(on)
(V)
006aaa037
10
VI(off)
(V)
(1)
(2)
(1)
(3)
1
1
(2)
(3)
10- 1
10- 1
1
10
IC (mA)
102
10- 1
10- 2
VCE = 0.3 V
(1) Tamb = - 40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
10- 1
1
IC (mA)
10
VCE = 5 V
(1) Tamb = - 40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 15. TR2 (NPN): On-state input voltage as a function Fig. 16. TR2 (NPN): Off-state input voltage as a function
of collector current; typical values
of collector current; typical values
PBLS6003D
Product data sheet
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PBLS6003D
Nexperia
60 V, 1 A PNP loadswitch double transistor
11. Test information
- IB
input pulse
(idealized waveform)
90 %
- I Bon (100 %)
10 %
- I Boff
output pulse
(idealized waveform)
- IC
90 %
- I C (100 %)
10 %
t
td
ts
tr
t on
tf
t off
006aaa266
Fig. 17. Transistor switching time definition
VBB
RB
VCC
RC
Vo
(probe)
oscilloscope
450 Ω
(probe)
450 Ω
R2
VI
oscilloscope
DUT
R1
mgd624
II = -5 A; IBon = 25 mA; IBoff = 25 mA; R1 = open; R2 = 100 Ω; RB = 300 Ω; RC = 20 Ω
Fig. 18. Test circuit for switching times
Quality information
This product has been qualified in accordance with the Automotive Electronics Council (AEC)
standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in
automotive applications.
PBLS6003D
Product data sheet
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PBLS6003D
Nexperia
60 V, 1 A PNP loadswitch double transistor
12. Package outline
3.1
2.7
6
3.0
2.5
1.7
1.3
1.1
0.9
5
4
2
3
0.6
0.2
pin 1 index
1
0.40
0.25
0.95
1.9
Dimensions in mm
0.26
0.10
18-03-11
Fig. 19. Package outline TSOP6 (SOT457)
13. Soldering
3.45
1.95
0.45 0.55
(6×) (6×)
0.95
solder lands
solder resist
3.3 2.825
0.95
solder paste
occupied area
0.7
(6×)
Dimensions in mm
0.8
(6×)
2.4
sot457_fr
Fig. 20. Reflow soldering footprint for TSOP6 (SOT457)
PBLS6003D
Product data sheet
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PBLS6003D
Nexperia
60 V, 1 A PNP loadswitch double transistor
5.3
1.5
(4×)
1.475
0.45
(2×)
5.05
1.475
solder lands
solder resist
occupied area
Dimensions in mm
preferred transport
direction during soldering
1.45
(6×)
2.85
sot457_fw
Fig. 21. Wave soldering footprint for TSOP6 (SOT457)
PBLS6003D
Product data sheet
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60 V, 1 A PNP loadswitch double transistor
14. Revision history
Table 8. Revision history
Data sheet ID
Release date
Data sheet status
Change notice
Supersedes
PBLS6003D v.3
20230830
Product data sheet
-
PBLS6003D_2
Modifications:
•
•
•
The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
Legal texts have been adapted to the new company name where appropriate.
Section "Packing information" removed.
PBLS6003D_2
20090907
Product data sheet
-
PBLS6003D_1
PBLS6003D_1
20050628
Product data sheet
-
-
PBLS6003D
Product data sheet
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60 V, 1 A PNP loadswitch double transistor
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
15. Legal information
Data sheet status
Document status
[1][2]
Product
status [3]
Definition
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification
This document contains data from
the preliminary specification.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Product [short]
data sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Please consult the most recently issued document before initiating or
completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
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PBLS6003D
Product data sheet
All information provided in this document is subject to legal disclaimers.
30 August 2023
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PBLS6003D
Nexperia
60 V, 1 A PNP loadswitch double transistor
Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Quick reference data....................................................1
5. Pinning information......................................................2
6. Ordering information....................................................2
7. Marking.......................................................................... 2
8. Limiting values............................................................. 3
9. Thermal characteristics............................................... 4
10. Characteristics............................................................ 6
11. Test information........................................................ 11
12. Package outline........................................................ 12
13. Soldering................................................................... 12
14. Revision history........................................................14
15. Legal information......................................................15
©
Nexperia B.V. 2023. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 30 August 2023
PBLS6003D
Product data sheet
All information provided in this document is subject to legal disclaimers.
30 August 2023
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Nexperia B.V. 2023. All rights reserved
16 / 16