0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
PBRP113ET

PBRP113ET

  • 厂商:

    NXP(恩智浦)

  • 封装:

  • 描述:

    PBRP113ET - PNP 800 mA, 40 V BISS RET; R1 = 1 kW, R2 = 1 kW - NXP Semiconductors

  • 数据手册
  • 价格&库存
PBRP113ET 数据手册
PBRP113ET PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ Rev. 01 — 17 December 2007 Product data sheet 1. Product profile 1.1 General description 800 mA PNP low VCEsat Breakthrough In Small Signal (BISS) Resistor-Equipped Transistor (RET) in a small SOT23 (TO-236AB) Surface-Mounted Device (SMD) plastic package. NPN complement: PBRN113ET. 1.2 Features I 800 mA repetitive peak output current I High current gain hFE I Built-in bias resistors I Simplifies circuit design I Low collector-emitter saturation voltage VCEsat I Reduces component count I Reduces pick and place costs I ±10 % resistor ratio tolerance 1.3 Applications I Digital application in automotive and industrial segments I Medium current peripheral driver I Switching loads 1.4 Quick reference data Table 1. Symbol VCEO IO IORM R1 R2/R1 [1] [2] [3] Quick reference data Parameter collector-emitter voltage output current repetitive peak output current tp ≤ 1 ms; δ ≤ 0.33 bias resistor 1 (input) bias resistor ratio Conditions open base [1][2] [3] Min 0.7 0.9 Typ 1 1 Max −40 −600 −800 1.3 1.1 Unit V mA mA kΩ Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for collector 1 cm2. Device mounted on a ceramic PCB, Al2O3, standard footprint. Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. NXP Semiconductors PBRP113ET PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ 2. Pinning information Table 2. Pin 1 2 3 Pinning Description input (base) GND (emitter) output (collector) 1 2 3 R1 Simplified outline Symbol 3 1 R2 2 sym003 3. Ordering information Table 3. Ordering information Package Name PBRP113ET Description plastic surface-mounted package; 3 leads Version SOT23 Type number 4. Marking Table 4. Marking codes Marking code[1] *7K Type number PBRP113ET [1] * = -: made in Hong Kong * = p: made in Hong Kong * = t: made in Malaysia * = W: made in China 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCBO VCEO VEBO VI Parameter collector-base voltage collector-emitter voltage emitter-base voltage input voltage positive negative IO IORM output current repetitive peak output current tp ≤ 1 ms; δ ≤ 0.33 [1][2] [3] Conditions open emitter open base open collector Min - Max −40 −40 −10 +10 −10 −600 −800 Unit V V V V V mA mA PBRP113ET_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 17 December 2007 2 of 12 NXP Semiconductors PBRP113ET PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ Table 5. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Ptot Parameter total power dissipation Conditions Tamb ≤ 25 °C [3] [1] [2] Min −55 −65 Max 250 370 570 150 +150 +150 Unit mW mW mW °C °C °C Tj Tamb Tstg [1] [2] [3] junction temperature ambient temperature storage temperature Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. Device mounted on a ceramic PCB, Al2O3, standard footprint. Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. 600 (1) 006aaa998 Ptot (mW) 400 (2) (3) 200 0 −75 −25 25 75 125 175 Tamb (°C) (1) Ceramic PCB, Al2O3 standard footprint (2) FR4 PCB, mounting pad for collector 1 cm2 (3) FR4 PCB, standard footprint Fig 1. Power derating curves for SOT23 (TO-236AB) PBRP113ET_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 17 December 2007 3 of 12 NXP Semiconductors PBRP113ET PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ 6. Thermal characteristics Table 6. Symbol Rth(j-a) Thermal characteristics Parameter thermal resistance from junction to ambient Conditions in free air [1] [2] [3] Min - Typ - Max 500 338 219 105 Unit K/W K/W K/W K/W Rth(j-sp) [1] [2] [3] thermal resistance from junction to solder point Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. Device mounted on a ceramic PCB, Al2O3, standard footprint. 103 Zth(j-a) (K/W) 102 δ=1 0.50 0.33 0.20 0.10 0.05 10 0.02 0.01 0.75 006aab000 1 0 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 tp (s) 103 FR4 PCB, standard footprint Fig 2. Transient thermal impedance from junction to ambient as a function of pulse duration for SOT23 (TO-236AB); typical values PBRP113ET_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 17 December 2007 4 of 12 NXP Semiconductors PBRP113ET PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ 103 Zth(j-a) (K/W) 102 δ=1 0.50 0.33 0.20 0.10 0.05 10 0.02 0.01 0 006aab001 0.75 1 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 tp (s) 103 FR4 PCB, mounting pad for collector 1 cm2 Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration for SOT23 (TO-236AB); typical values 103 Zth(j-a) (K/W) 102 006aab002 δ=1 0.50 0.75 0.33 0.20 0.10 10 0.05 0.02 0.01 1 0 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 tp (s) 103 Ceramic PCB, Al2O3 standard footprint Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration for SOT23 (TO-236AB); typical values PBRP113ET_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 17 December 2007 5 of 12 NXP Semiconductors PBRP113ET PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ 7. Characteristics Table 7. Characteristics Tamb = 25 °C unless otherwise specified. Symbol ICBO ICEO IEBO hFE Parameter collector-base cut-off current Conditions VCB = −30 V; IE = 0 A Min 40 [1] Typ 65 190 210 −35 −70 −200 −450 −1 −1.3 1 1 11 Max −100 −0.5 −4 −45 −100 −300 −750 −1.5 −1.8 1.3 1.1 - Unit nA µA mA collector-emitter cut-off VCE = −30 V; current IB = 0 A emitter-base cut-off current DC current gain VEB = −5 V; IC = 0 A VCE = −5 V; IC = −50 mA VCE = −5 V; IC = −300 mA VCE = −5 V; IC = −600 mA 130 140 - [1] VCEsat collector-emitter saturation voltage IC = −50 mA; IB = −2.5 mA IC = −200 mA; IB = −10 mA IC = −500 mA; IB = −10 mA IC = −600 mA; IB = −6 mA [1] mV mV mV mV V V kΩ pF −0.6 −1 0.7 0.9 [1] VI(off) VI(on) R1 R2/R1 Cc off-state input voltage on-state input voltage bias resistor 1 (input) bias resistor ratio collector capacitance VCE = −5 V; IC = −100 µA VCE = −0.3 V; IC = −20 mA VCB = −10 V; IE = ie = 0 A; f = 1 MHz - [1] Pulse test: tp ≤ 300 µs; δ ≤ 0.02. PBRP113ET_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 17 December 2007 6 of 12 NXP Semiconductors PBRP113ET PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ 103 hFE 102 (1) (2) (3) 006aab073 −10−1 006aab074 VCEsat (V) (1) 10 (2) (3) 1 10−1 −10−1 −1 −10 −102 IC (mA) −103 −10−2 −10 −102 IC (mA) −103 VCE = −5 V (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −40 °C IC/IB = 20 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −40 °C Fig 5. DC current gain as a function of collector current; typical values −1 006aab075 Fig 6. Collector-emitter saturation voltage as a function of collector current; typical values −1 006aab076 VCEsat (V) (1) (2) (3) VCEsat (V) −10−1 (1) (3) (2) −10−2 −10 −102 IC (mA) −103 −10−1 −10 −102 IC (mA) −103 IC/IB = 50 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −40 °C IC/IB = 100 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −40 °C Fig 7. Collector-emitter saturation voltage as a function of collector current; typical values Fig 8. Collector-emitter saturation voltage as a function of collector current; typical values PBRP113ET_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 17 December 2007 7 of 12 NXP Semiconductors PBRP113ET PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ −10 006aab077 −10 006aab078 VI(on) (V) (1) (2) VI(off) (V) (1) (2) (3) −1 (3) −1 −10−1 −10−1 −1 −10 −102 IC (mA) −103 −10−1 −10−1 −1 −10 IC (mA) −102 VCE = −0.3 V (1) Tamb = −40 °C (2) Tamb = 25 °C (3) Tamb = 100 °C VCE = −5 V (1) Tamb = −40 °C (2) Tamb = 25 °C (3) Tamb = 100 °C Fig 9. On-state input voltage as a function of collector current; typical values Fig 10. Off-state input voltage as a function of collector current; typical values 8. Package outline 3.0 2.8 3 1.1 0.9 0.45 0.15 2.5 1.4 2.1 1.2 1 2 1.9 Dimensions in mm 0.48 0.38 0.15 0.09 04-11-04 Fig 11. Package outline SOT23 (TO-236AB) PBRP113ET_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 17 December 2007 8 of 12 NXP Semiconductors PBRP113ET PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ 9. Packing information Table 8. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number PBRP113ET [1] Package SOT23 Description 4 mm pitch, 8 mm tape and reel Packing quantity 3000 -215 10000 -235 For further information and the availability of packing methods, see Section 13. 10. Soldering 2.90 2.50 0.85 3.00 0.85 1.30 2 1 solder lands 2.70 3 solder resist solder paste occupied area 0.60 (3x) Dimensions in mm 0.50 (3x) 0.60 (3x) 1.00 3.30 sot023 Fig 12. Reflow soldering footprint SOT23 (TO-236AB) 3.40 1.20 (2x) solder lands solder resist occupied area 2 1 3 4.60 4.00 1.20 Dimensions in mm 2.80 4.50 preferred transport direction during soldering sot023 Fig 13. Wave soldering footprint SOT23 (TO-236AB) PBRP113ET_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 17 December 2007 9 of 12 NXP Semiconductors PBRP113ET PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ 11. Revision history Table 9. Revision history Release date 20071217 Data sheet status Product data sheet Change notice Supersedes Document ID PBRP113ET_1 PBRP113ET_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 17 December 2007 10 of 12 NXP Semiconductors PBRP113ET PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ 12. Legal information 12.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 12.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 12.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 13. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com PBRP113ET_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 17 December 2007 11 of 12 NXP Semiconductors PBRP113ET PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ 14. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 11 12 12.1 12.2 12.3 12.4 13 14 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Packing information. . . . . . . . . . . . . . . . . . . . . . 9 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Contact information. . . . . . . . . . . . . . . . . . . . . 11 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 17 December 2007 Document identifier: PBRP113ET_1
PBRP113ET 价格&库存

很抱歉,暂时无法提供与“PBRP113ET”相匹配的价格&库存,您可以联系我们找货

免费人工找货
PBRP113ET,215

库存:0