PBSS4032SPN

PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor Rev. 1 — 14 July 2010 Product data sheet 1. Product profile 1.1 General description NPN/PNP low VCEsat Breakthrough In Small Signal (BISS) transistor in a SOT96-1 (SO8) medium power Surface-Mounted Device (SMD) plastic package. Table 1. Product overview Package NXP PBSS4032SPN SOT96-1 Name SO8 NPN/NPN complement PBSS4032SN PNP/PNP complement PBSS4032SP Type number 1.2 Features and benefits Low collector-emitter saturation voltage VCEsat Optimized switching time High collector current capability IC and ICM High collector current gain (hFE) at high IC High efficiency due to less heat generation Smaller required Printed-Circuit Board (PCB) area than for conventional transistors 1.3 Applications DC-to-DC conversion Battery-driven devices Power management Charging circuits 1.4 Quick reference data Table 2. Quick reference data Conditions open base single pulse; tp ≤ 1 ms IC = 4 A; IB = 0.4 A [1] Symbol Parameter TR1; NPN low VCEsat transistor VCEO IC ICM RCEsat collector-emitter voltage collector current peak collector current collector-emitter saturation resistance Min - Typ 45 Max 30 5.7 10 62.5 Unit V A A mΩ NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor Quick reference data …continued Conditions open base single pulse; tp ≤ 1 ms IC = −4 A; IB = −0.4 A [1] Table 2. Symbol Parameter TR2; PNP low VCEsat transistor VCEO IC ICM RCEsat collector-emitter voltage collector current peak collector current collector-emitter saturation resistance Min - Typ 65 Max −30 −4.8 −10 98 Unit V A A mΩ [1] Pulse test: tp ≤ 300 μs; δ ≤ 0.02. 2. Pinning information Table 3. Pin 1 2 3 4 5 6 7 8 Pinning Description emitter TR1 base TR1 emitter TR2 TR1 TR2 Simplified outline 8 5 Graphic symbol 8 7 6 5 base TR2 collector TR2 collector TR2 collector TR1 collector TR1 1 4 1 2 3 4 006aaa985 3. Ordering information Table 4. Ordering information Package Name PBSS4032SPN SO8 Description Version plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 Type number 4. Marking Table 5. Marking codes Marking code 4032SPN Type number PBSS4032SPN PBSS4032SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 14 July 2010 2 of 20 NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor 5. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol TR1 (NPN) IC TR2 (PNP) IC VCBO VCEO VEBO ICM IB Ptot collector current collector-base voltage collector-emitter voltage emitter-base voltage peak collector current base current total power dissipation Tamb ≤ 25 °C [1] [2] [3] Parameter collector current Conditions Min - Max 5.7 −4.8 30 30 5 10 1 0.73 1 1.7 0.86 1.4 2.3 150 +150 +150 Unit A A V V V A A W W W W W W °C °C °C Per transistor; for the PNP transistor with negative polarity open emitter open base open collector single pulse; tp ≤ 1 ms −55 −65 Per device Ptot total power dissipation Tamb ≤ 25 °C [1] [2] [3] Tj Tamb Tstg [1] [2] [3] junction temperature ambient temperature storage temperature Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. Device mounted on a ceramic PCB, Al2O3, standard footprint. PBSS4032SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 14 July 2010 3 of 20 NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor 3.0 Ptot (W) 2.0 006aac302 (1) (2) 1.0 (3) 0.0 −75 −25 25 75 125 175 Tamb (°C) (1) Ceramic PCB, Al2O3, standard footprint (2) FR4 PCB, mounting pad for collector 1 cm2 (3) FR4 PCB, standard footprint Fig 1. Per device: Power derating curves 6. Thermal characteristics Table 7. Symbol Rth(j-a) Thermal characteristics Parameter thermal resistance from junction to ambient Conditions in free air [1] [2] [3] Min - Typ - Max 170 125 75 40 Unit K/W K/W K/W K/W Per transistor Rth(j-sp) Per device Rth(j-a) thermal resistance from junction to solder point thermal resistance from junction to ambient in free air [1] [2] [3] - - 145 90 55 K/W K/W K/W [1] [2] [3] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. Device mounted on a ceramic PCB, Al2O3, standard footprint. PBSS4032SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 14 July 2010 4 of 20 NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor 103 Zth(j-a) (K/W) 102 duty cycle = 1 0.75 0.5 0.33 0.2 0.1 10 0.02 0.01 1 0 0.05 006aac303 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 tp (s) 103 FR4 PCB, standard footprint Fig 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration; typical values 006aac304 103 Zth(j-a) (K/W) duty cycle = 1 102 0.75 0.33 0.2 10 0.1 0.05 0.02 1 0 0.01 0.5 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 tp (s) 103 FR4 PCB, mounting pad for collector 1 cm2 Fig 3. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PBSS4032SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 14 July 2010 5 of 20 NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor 102 Zth(j-a) (K/W) 10 006aac305 duty cycle = 1 0.75 0.5 0.33 0.2 0.1 0.05 0.02 0.01 1 0 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 tp (s) 103 Ceramic PCB, Al2O3, standard footprint Fig 4. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PBSS4032SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 14 July 2010 6 of 20 NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor 7. Characteristics Table 8. Characteristics Tamb = 25 °C unless otherwise specified. Symbol Parameter ICBO collector-base cut-off current collector-emitter cut-off current emitter-base cut-off current DC current gain Conditions VCB = 30 V; IE = 0 A VCB = 30 V; IE = 0 A; Tj = 150 °C VCE = 24 V; VBE = 0 V VEB = 5 V; IC = 0 A VCE = 2 V IC = 500 mA IC = 1 A IC = 2 A IC = 4 A IC = 6 A VCEsat collector-emitter saturation voltage [1] [1] Min - Typ - Max 100 50 100 100 Unit nA μA nA nA TR1; NPN low VCEsat transistor ICES IEBO hFE 300 300 250 200 150 [1] 500 500 450 400 300 90 130 150 185 250 300 45 125 180 210 250 375 450 62.5 mV mV mV mV mV mV mΩ IC = 1 A; IB = 50 mA IC = 1 A; IB = 10 mA IC = 2 A; IB = 40 mA IC = 4 A; IB = 400 mA IC = 4 A; IB = 40 mA IC = 6 A; IB = 300 mA RCEsat VBEsat collector-emitter IC = 4 A; IB = 400 mA saturation resistance base-emitter saturation voltage IC = 1 A; IB = 100 mA IC = 4 A; IB = 400 mA VCE = 2 V; IC = 2 A VCC = 12.5 V; IC = 1 A; IBon = 0.05 A; IBoff = −0.05 A - [1] [1] 0.76 0.91 0.77 35 30 65 150 65 215 140 65 0.9 1.05 0.85 - V V V ns ns ns ns ns ns MHz pF VBEon td tr ton ts tf toff fT Cc base-emitter turn-on voltage delay time rise time turn-on time storage time fall time turn-off time transition frequency - VCE = 10 V; IC = 100 mA; f = 100 MHz - collector capacitance VCB = 10 V; IE = ie = 0 A; f = 1 MHz PBSS4032SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 14 July 2010 7 of 20 NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor Table 8. Characteristics …continued Tamb = 25 °C unless otherwise specified. Symbol Parameter TR2; PNP low VCEsat transistor ICBO collector-base cut-off current collector-emitter cut-off current emitter-base cut-off current DC current gain VCB = −30 V; IE = 0 A VCB = −30 V; IE = 0 A; Tj = 150 °C VCE = −24 V; VBE = 0 V VEB = −5 V; IC = 0 A VCE = −2 V IC = −500 mA IC = −1 A IC = −2 A IC = −4 A IC = −5 A VCEsat collector-emitter saturation voltage [1] [1] Conditions Min - Typ - Max −100 −50 −100 −100 Unit nA μA nA nA ICES IEBO hFE 200 200 150 60 40 [1] 380 330 250 100 60 −115 −170 −210 −260 −300 −340 65 −165 −240 −300 −390 −450 −510 98 mV mV mV mV mV mV mΩ IC = −1 A; IB = −50 mA IC = −1 A; IB = −10 mA IC = −2 A; IB = −40 mA IC = −4 A; IB = −400 mA IC = −4 A; IB = −200 mA IC = −5 A; IB = −250 mA RCEsat VBEsat collector-emitter IC = −4 A; IB = −400 mA saturation resistance base-emitter saturation voltage IC = −1 A; IB = −100 mA IC = −4 A; IB = −400 mA VCE = −2 V; IC = −2 A VCC = −12.5 V; IC = −1 A; IBon = −0.05 A; IBoff = 0.05 A - [1] [1] −0.8 −0.99 −0.81 30 60 90 140 80 220 115 85 −0.9 −1.1 −0.9 - V V V ns ns ns ns ns ns MHz pF VBEon td tr ton ts tf toff fT Cc base-emitter turn-on voltage delay time rise time turn-on time storage time fall time turn-off time transition frequency - VCE = −10 V; IC = −100 mA; f = 100 MHz - collector capacitance VCB = −10 V; IE = ie = 0 A; f = 1 MHz Pulse test: tp ≤ 300 μs; δ ≤ 0.02. [1] PBSS4032SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 14 July 2010 8 of 20 NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor 1000 hFE 800 (1) 006aac306 12.0 IB (mA) = 70 IC (A) 8.0 56 42 006aac307 63 49 35 21 600 (2) 28 14 400 (3) 4.0 7 200 0 10−1 1 10 102 103 104 IC (mA) 0.0 0.0 1.0 2.0 3.0 4.0 5.0 VCE (V) VCE = 2 V (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −55 °C Tamb = 25 °C Fig 5. TR1 (NPN): DC current gain as a function of collector current; typical values 1.2 006aac308 Fig 6. TR1 (NPN): Collector current as a function of collector-emitter voltage; typical values 1.2 006aac309 VBE (V) 0.8 (1) VBEsat (V) 1.0 0.8 (2) (1) (3) (2) 0.6 (3) 0.4 0.4 0.0 10−1 1 10 102 103 104 IC (mA) 0.2 10−1 1 10 102 103 104 IC (mA) VCE = 2 V (1) Tamb = −55 °C (2) Tamb = 25 °C (3) Tamb = 100 °C IC/IB = 20 (1) Tamb = −55 °C (2) Tamb = 25 °C (3) Tamb = 100 °C Fig 7. TR1 (NPN): Base-emitter voltage as a function of collector current; typical values Fig 8. TR1 (NPN): Base-emitter saturation voltage as a function of collector current; typical values PBSS4032SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 14 July 2010 9 of 20 NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor 1 006aac310 1 006aac311 VCEsat (V) VCEsat (V) 10−1 (1) 10−1 (1) (2) (2) (3) (3) 10−2 10−1 1 10 102 103 104 IC (mA) 10−2 10−1 1 10 102 103 104 IC (mA) IC/IB = 20 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −55 °C Tamb = 25 °C (1) IC/IB = 100 (2) IC/IB = 50 (3) IC/IB = 10 Fig 9. TR1 (NPN): Collector-emitter saturation voltage as a function of collector current; typical values 006aac312 Fig 10. TR1 (NPN): Collector-emitter saturation voltage as a function of collector current; typical values 103 RCEsat (Ω) 102 006aac313 103 RCEsat (Ω) 102 10 10 1 (1) (2) 1 (1) (2) 10−1 (3) 10−1 (3) 10−2 10−1 1 10 102 103 104 IC (mA) 10−2 10−1 1 10 102 103 104 IC (mA) IC/IB = 20 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −55 °C Tamb = 25 °C (1) IC/IB = 100 (2) IC/IB = 50 (3) IC/IB = 10 Fig 11. TR1 (NPN): Collector-emitter saturation resistance as a function of collector current; typical values Fig 12. TR1 (NPN): Collector-emitter saturation resistance as a function of collector current; typical values PBSS4032SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 14 July 2010 10 of 20 NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor 800 hFE (1) 006aac314 −12.0 IC (A) −8.0 IB (mA) = −600 −480 −360 −240 −120 006aac315 600 (2) −540 −420 −300 −180 −60 400 (3) −4.0 200 0 −10−1 −1 −10 −102 −103 −104 IC (mA) 0.0 0.0 −1.0 −2.0 −3.0 −4.0 −5.0 VCE (V) VCE = −2 V (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −55 °C Tamb = 25 °C Fig 13. TR2 (PNP): DC current gain as a function of collector current; typical values −1.4 VBE (V) −1.0 006aac316 Fig 14. TR2 (PNP): Collector current as a function of collector-emitter voltage; typical values −1.4 VBEsat (V) −1.0 (1) 006aac317 (1) −0.6 (2) (2) −0.6 (3) (3) −0.2 −10−1 −1 −10 −102 −103 −104 IC (mA) −0.2 −10−1 −1 −10 −102 −103 −104 IC (mA) VCE = −2 V (1) Tamb = −55 °C (2) Tamb = 25 °C (3) Tamb = 100 °C IC/IB = 20 (1) Tamb = −55 °C (2) Tamb = 25 °C (3) Tamb = 100 °C Fig 15. TR2 (PNP): Base-emitter voltage as a function of collector current; typical values Fig 16. TR2 (PNP): Base-emitter saturation voltage as a function of collector current; typical values PBSS4032SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 14 July 2010 11 of 20 NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor −1 006aac318 −1 006aac319 VCEsat (V) VCEsat (V) −10−1 (1) (2) (3) −10−1 (1) (2) (3) −10−2 −10−1 −1 −10 −102 −103 −104 IC (mA) −10−2 −10−1 −1 −10 −102 −103 −104 IC (mA) IC/IB = 20 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −55 °C Tamb = 25 °C (1) IC/IB = 100 (2) IC/IB = 50 (3) IC/IB = 10 Fig 17. TR2 (PNP): Collector-emitter saturation voltage as a function of collector current; typical values 103 RCEsat (Ω) 102 006aac320 Fig 18. TR2 (PNP): Collector-emitter saturation voltage as a function of collector current; typical values 103 RCEsat (Ω) 102 006aac321 10 10 1 (1) (2) 1 (1) (2) 10−1 (3) 10−1 (3) 10−2 −10−1 −1 −10 −102 −103 −104 IC (mA) 10−2 −10−1 −1 −10 −102 −103 −104 IC (mA) IC/IB = 20 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −55 °C Tamb = 25 °C (1) IC/IB = 100 (2) IC/IB = 50 (3) IC/IB = 10 Fig 19. TR2 (PNP): Collector-emitter saturation resistance as a function of collector current; typical values Fig 20. TR2 (PNP): Collector-emitter saturation resistance as a function of collector current; typical values PBSS4032SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 14 July 2010 12 of 20 NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor 8. Test information IB 90 % input pulse (idealized waveform) IBon (100 %) 10 % IBoff IC 90 % output pulse (idealized waveform) IC (100 %) 10 % t td ton tr ts toff tf 006aaa003 Fig 21. TR1 (NPN): BISS transistor switching time definition VBB VCC RB (probe) oscilloscope 450 Ω VI R1 R2 RC Vo (probe) 450 Ω DUT oscilloscope mlb826 VCC = 12.5 V; IC = 1 A; IBon = 0.05 A; IBoff = −0.05 A Fig 22. TR1 (NPN): Test circuit for switching times PBSS4032SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 14 July 2010 13 of 20 NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor − IB 90 % input pulse (idealized waveform) − I Bon (100 %) 10 % − I Boff − IC 90 % output pulse (idealized waveform) − I C (100 %) 10 % t td t on tr ts t off tf 006aaa266 Fig 23. TR2 (PNP): BISS transistor switching time definition VBB VCC RB (probe) oscilloscope 450 Ω VI R1 R2 RC Vo (probe) 450 Ω DUT oscilloscope mgd624 VCC = −12.5 V; IC = −1 A; IBon = −0.05 A; IBoff = 0.05 A Fig 24. TR2 (PNP): Test circuit for switching times PBSS4032SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 14 July 2010 14 of 20 NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor 9. Package outline 5.0 4.8 1.75 1.0 0.4 6.2 5.8 4.0 3.8 pin 1 index 1.27 Dimensions in mm 0.49 0.36 0.25 0.19 03-02-18 Fig 25. Package outline SOT96-1 (SO8) 10. Packing information Table 9. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number PBSS4032SPN [1] Package SOT96-1 Description 8 mm pitch, 12 mm tape and reel Packing quantity 1000 -115 2500 -118 For further information and the availability of packing methods, see Section 14. PBSS4032SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 14 July 2010 15 of 20 NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor 11. Soldering 5.50 0.60 (8×) 1.30 4.00 6.60 7.00 1.27 (6×) solder lands occupied area placement accuracy ± 0.25 Dimensions in mm sot096-1_fr Fig 26. Reflow soldering footprint SOT96-1 (SO8) 1.20 (2×) 0.60 (6×) 0.3 (2×) enlarged solder land 1.30 4.00 6.60 7.00 1.27 (6×) 5.50 board direction solder lands occupied area solder resist placement accurracy ± 0.25 Dimensions in mm sot096-1_fw Fig 27. Wave soldering footprint SOT96-1 (SO8) PBSS4032SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 14 July 2010 16 of 20 NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor 12. Revision history Table 10. Revision history Release date 20100714 Data sheet status Product data sheet Change notice Supersedes Document ID PBSS4032SPN v.1 PBSS4032SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 14 July 2010 17 of 20 NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor 13. Legal information 13.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 13.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. 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NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). 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Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. 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This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or PBSS4032SPN All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 1 — 14 July 2010 18 of 20 NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 13.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 14. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com PBSS4032SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 14 July 2010 19 of 20 NXP Semiconductors PBSS4032SPN 30 V NPN/PNP low VCEsat (BISS) transistor 15. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Test information . . . . . . . . . . . . . . . . . . . . . . . . 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15 Packing information . . . . . . . . . . . . . . . . . . . . 15 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 18 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Contact information. . . . . . . . . . . . . . . . . . . . . 19 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 14 July 2010 Document identifier: PBSS4032SPN