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PBSS5160DS

PBSS5160DS

  • 厂商:

    NXP(恩智浦)

  • 封装:

  • 描述:

    PBSS5160DS - 60 V, 1 A PNP/PNP low VCEsat (BISS) transistor - NXP Semiconductors

  • 数据手册
  • 价格&库存
PBSS5160DS 数据手册
PBSS5160DS 60 V, 1 A PNP/PNP low VCEsat (BISS) transistor Rev. 03 — 9 October 2008 Product data sheet 1. Product profile 1.1 General description PNP/PNP low VCEsat Breakthrough In Small Signal (BISS) transistor pair in a small SOT457 (SC-74) Surface-Mounted Device (SMD) plastic package. NPN complement: PBSS4160DS. 1.2 Features I I I I I Low collector-emitter saturation voltage VCEsat High collector current capability IC and ICM High collector current gain (hFE) at high IC High efficiency due to less heat generation Smaller required Printed-Circuit Board (PCB) area than for conventional transistors 1.3 Applications I Dual low power switches (e.g. motors, fans) I Automotive applications 1.4 Quick reference data Table 1. Symbol VCEO IC ICM RCEsat [1] [2] Quick reference data Parameter collector-emitter voltage collector current peak collector current collector-emitter saturation resistance single pulse; tp ≤ 1 ms IC = −1 A; IB = −100 mA [2] Conditions open base [1] Min - Typ 250 Max −60 −1 −2 330 Unit V A A mΩ Device mounted on a ceramic PCB, Al2O3, standard footprint. Pulse test: tp ≤ 300 µs; δ ≤ 0.02. NXP Semiconductors PBSS5160DS 60 V, 1 A PNP/PNP low VCEsat (BISS) transistor 2. Pinning information Table 2. Pin 1 2 3 4 5 6 Pinning Description emitter TR1 base TR1 collector TR2 emitter TR2 base TR2 collector TR1 1 2 sym018 Simplified outline 6 5 4 Graphic symbol 6 5 4 TR2 1 2 3 TR1 3 3. Ordering information Table 3. Ordering information Package Name PBSS5160DS SC-74 Description plastic surface-mounted package (TSOP6); 6 leads Version SOT457 Type number 4. Marking Table 4. Marking codes Marking code A5 Type number PBSS5160DS 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCBO VCEO VEBO IC Parameter collector-base voltage collector-emitter voltage emitter-base voltage collector current Conditions open emitter open base open collector [1] [2] [3] Min - Max −80 −60 −5 −0.77 −0.9 −1 −2 −300 −1 Unit V V V A A A A mA A Per transistor ICM IB IBM peak collector current base current peak base current single pulse; tp ≤ 1 ms single pulse; tp ≤ 1 ms PBSS5160DS_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 9 October 2008 2 of 14 NXP Semiconductors PBSS5160DS 60 V, 1 A PNP/PNP low VCEsat (BISS) transistor Table 5. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Ptot Parameter total power dissipation Conditions Tamb ≤ 25 °C [1] [2] [3] Min −65 −65 Max 290 370 450 420 560 700 150 +150 +150 Unit mW mW mW mW mW mW °C °C °C Per device Ptot total power dissipation Tamb ≤ 25 °C [1] [2] [3] Tj Tamb Tstg [1] [2] [3] junction temperature ambient temperature storage temperature Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. Device mounted on a ceramic PCB, Al2O3, standard footprint. 800 Ptot (mW) 600 (1) 006aaa493 (2) (3) 400 200 0 0 40 80 120 160 Tamb (°C) (1) Ceramic PCB, Al2O3, standard footprint (2) FR4 PCB, mounting pad for collector 1 cm2 (3) FR4 PCB, standard footprint Fig 1. Power derating curves PBSS5160DS_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 9 October 2008 3 of 14 NXP Semiconductors PBSS5160DS 60 V, 1 A PNP/PNP low VCEsat (BISS) transistor 6. Thermal characteristics Table 6. Symbol Rth(j-a) Thermal characteristics Parameter thermal resistance from junction to ambient Conditions in free air [1] [2] [3] Min - Typ - Max 431 338 278 105 Unit K/W K/W K/W K/W Per transistor Rth(j-sp) Per device Rth(j-a) thermal resistance from junction to solder point thermal resistance from junction to ambient in free air [1] [2] [3] - - 298 223 179 K/W K/W K/W [1] [2] [3] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. Device mounted on a ceramic PCB, Al2O3, standard footprint. 103 Zth(j-a) (K/W) 102 0.20 0.10 0.05 10 0.02 0.01 δ=1 0.75 0.50 0.33 006aaa494 0 1 10−5 10−4 10−3 10−2 10−1 1 10 102 tp (s) 103 FR4 PCB, standard footprint Fig 2. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PBSS5160DS_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 9 October 2008 4 of 14 NXP Semiconductors PBSS5160DS 60 V, 1 A PNP/PNP low VCEsat (BISS) transistor 103 Zth(j-a) (K/W) 102 0.20 0.10 0.05 10 0.02 0.01 δ=1 0.75 0.50 0.33 006aaa495 0 1 10−5 10−4 10−3 10−2 10−1 1 10 102 tp (s) 103 FR4 PCB, mounting pad for collector 1 cm2 Fig 3. 103 Zth(j-a) (K/W) 102 Transient thermal impedance from junction to ambient as a function of pulse duration; typical values 006aaa496 δ=1 0.75 0.50 0.20 0.10 0.05 0.33 10 0.02 0.01 0 1 10−5 10−4 10−3 10−2 10−1 1 10 102 tp (s) 103 Ceramic PCB, Al2O3, standard footprint Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PBSS5160DS_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 9 October 2008 5 of 14 NXP Semiconductors PBSS5160DS 60 V, 1 A PNP/PNP low VCEsat (BISS) transistor 7. Characteristics Table 7. Characteristics Tamb = 25 °C unless otherwise specified. Symbol ICBO Parameter collector-base cut-off current Conditions VCB = −60 V; IE = 0 A VCB = −60 V; IE = 0 A; Tj = 150 °C Min 200 [1] [1] Typ 350 250 160 −110 −120 −250 Max −100 −50 −100 −100 −165 −175 −330 Unit nA µA nA nA Per transistor ICES IEBO hFE collector-emitter cut-off VCE = −60 V; VBE = 0 V current emitter-base cut-off current DC current gain VEB = −5 V; IC = 0 A VCE = −5 V; IC = −1 mA VCE = −5 V; IC = −500 mA VCE = −5 V; IC = −1 A 150 100 - VCEsat collector-emitter saturation voltage IC = −100 mA; IB = −1 mA IC = −500 mA; IB = −50 mA IC = −1 A; IB = −100 mA [1] [1] mV mV mV V mΩ V ns ns ns ns ns ns MHz pF - VBEsat RCEsat VBEon td tr ton ts tf toff fT Cc [1] base-emitter saturation IC = −1 A; IB = −50 mA voltage collector-emitter saturation resistance base-emitter turn-on voltage delay time rise time turn-on time storage time fall time turn-off time transition frequency collector capacitance VCE = −10 V; IC = −50 mA; f = 100 MHz VCB = −10 V; IE = ie = 0 A; f = 1 MHz IC = −1 A; IB = −100 mA IC = −1 A; VCE = −5 V IC = −0.5 A; IBon = −25 mA; IBoff = 25 mA −0.95 −1.1 250 330 [1] [1] −0.82 −0.9 11 30 41 205 55 260 185 9 15 150 - Pulse test: tp ≤ 300 µs; δ ≤ 0.02. PBSS5160DS_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 9 October 2008 6 of 14 NXP Semiconductors PBSS5160DS 60 V, 1 A PNP/PNP low VCEsat (BISS) transistor 600 (1) 006aaa474 −2.0 IC (A) −1.6 006aaa478 hFE IB (mA) = −35.0 −31.5 −28.0 −24.5 −21.0 −17.5 −14.0 −10.5 −7.0 400 (2) −1.2 −0.8 200 (3) −3.5 −0.4 0 −10−1 −1 −10 −102 −103 −104 IC (mA) 0.0 0 −1 −2 −3 −4 −5 VCE (V) VCE = −5 V (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −55 °C Tamb = 25 °C Fig 5. DC current gain as a function of collector current; typical values 006aaa476 Fig 6. Collector current as a function of collector-emitter voltage; typical values 006aaa477 −1.0 VBE (V) −0.8 (1) −1.1 VBEsat (V) −0.9 (1) −0.7 −0.6 (2) (2) −0.5 (3) (3) −0.4 −0.3 −0.2 −10−1 −1 −10 −102 −103 −104 IC (mA) −0.1 −10−1 −1 −10 −102 −103 −104 IC (mA) VCE = −5 V (1) Tamb = −55 °C (2) Tamb = 25 °C (3) Tamb = 100 °C IC/IB = 20 (1) Tamb = −55 °C (2) Tamb = 25 °C (3) Tamb = 100 °C Fig 7. Base-emitter voltage as a function of collector current; typical values Fig 8. Base-emitter saturation voltage as a function of collector current; typical values PBSS5160DS_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 9 October 2008 7 of 14 NXP Semiconductors PBSS5160DS 60 V, 1 A PNP/PNP low VCEsat (BISS) transistor −1 006aaa489 −1 006aaa490 VCEsat (V) VCEsat (V) −10−1 −10−1 (1) (1) (2) (3) (2) (3) −10−2 −10−1 −1 −10 −102 −103 −104 IC (mA) −10−2 −10−1 −1 −10 −102 −103 −104 IC (mA) IC/IB = 20 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −55 °C Tamb = 25 °C (1) IC/IB = 100 (2) IC/IB = 50 (3) IC/IB = 10 Fig 9. Collector-emitter saturation voltage as a function of collector current; typical values 006aaa491 Fig 10. Collector-emitter saturation voltage as a function of collector current; typical values 103 RCEsat (Ω) 102 006aaa492 103 RCEsat (Ω) 102 10 10 (1) 1 (1) (2) (3) (2) 1 (3) 10−1 −10−1 −1 −10 −102 −103 −104 IC (mA) 10−1 −10−1 −1 −10 −102 −103 −104 IC (mA) IC/IB = 20 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −55 °C Tamb = 25 °C (1) IC/IB = 100 (2) IC/IB = 50 (3) IC/IB = 10 Fig 11. Collector-emitter saturation resistance as a function of collector current; typical values Fig 12. Collector-emitter saturation resistance as a function of collector current; typical values PBSS5160DS_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 9 October 2008 8 of 14 NXP Semiconductors PBSS5160DS 60 V, 1 A PNP/PNP low VCEsat (BISS) transistor 8. Test information − IB 90 % input pulse (idealized waveform) − I Bon (100 %) 10 % − I Boff − IC 90 % output pulse (idealized waveform) − I C (100 %) 10 % t td t on tr ts t off tf 006aaa266 Fig 13. BISS transistor switching time definition VBB VCC RB (probe) oscilloscope 450 Ω VI R1 R2 RC Vo (probe) 450 Ω DUT oscilloscope mgd624 IC = −0.5 A; IBon = −25 mA; IBoff = 25 mA; R1 = open; R2 = 100 Ω; RB = 300 Ω; RC = 20 Ω Fig 14. Test circuit for switching times PBSS5160DS_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 9 October 2008 9 of 14 NXP Semiconductors PBSS5160DS 60 V, 1 A PNP/PNP low VCEsat (BISS) transistor 9. Package outline 3.1 2.7 6 5 4 0.6 0.2 1.1 0.9 3.0 2.5 1.7 1.3 pin 1 index 1 0.95 1.9 Dimensions in mm 2 3 0.40 0.25 0.26 0.10 04-11-08 Fig 15. Package outline SOT457 (SC-74) 10. Packing information Table 8. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number Package Description 4 mm pitch, 8 mm tape and reel; T1 4 mm pitch, 8 mm tape and reel; T2 [1] [2] [3] [2] [3] Packing quantity 3000 10000 -135 -165 -115 -125 PBSS5160DS SOT457 For further information and the availability of packing methods, see Section 14. T1: normal taping T2: reverse taping PBSS5160DS_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 9 October 2008 10 of 14 NXP Semiconductors PBSS5160DS 60 V, 1 A PNP/PNP low VCEsat (BISS) transistor 11. Soldering 3.45 1.95 0.95 3.3 2.825 0.95 0.45 0.55 (6×) (6×) solder lands solder resist solder paste occupied area 0.7 (6×) 0.8 (6×) 2.4 Dimensions in mm sot457_fr Fig 16. Reflow soldering footprint SOT457 (SC-74) 5.3 1.5 (4×) solder lands 1.475 5.05 1.475 Dimensions in mm preferred transport direction during soldering 1.45 (6×) 2.85 sot457_fw 0.45 (2×) solder resist occupied area Fig 17. Wave soldering footprint SOT457 (SC-74) PBSS5160DS_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 9 October 2008 11 of 14 NXP Semiconductors PBSS5160DS 60 V, 1 A PNP/PNP low VCEsat (BISS) transistor 12. Revision history Table 9. Revision history Release date 20081009 Data sheet status Product data sheet Change notice Supersedes PBSS5160DS_2 Document ID PBSS5160DS_3 Modifications: • • • • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Figure 9: amended Section 13 “Legal information”: updated Product data sheet Objective data sheet PBSS5160DS_1 - PBSS5160DS_2 PBSS5160DS_1 20050628 20040716 PBSS5160DS_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 9 October 2008 12 of 14 NXP Semiconductors PBSS5160DS 60 V, 1 A PNP/PNP low VCEsat (BISS) transistor 13. Legal information 13.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 13.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 13.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental 13.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 14. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com PBSS5160DS_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 9 October 2008 13 of 14 NXP Semiconductors PBSS5160DS 60 V, 1 A PNP/PNP low VCEsat (BISS) transistor 15. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Packing information. . . . . . . . . . . . . . . . . . . . . 10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Contact information. . . . . . . . . . . . . . . . . . . . . 13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 9 October 2008 Document identifier: PBSS5160DS_3
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