PBSS5350SS

PBSS5350SS 50 V, 2.7 A PNP/PNP low VCEsat (BISS) transistor Rev. 01 — 3 April 2007 Product data sheet 1. Product profile 1.1 General description PNP/PNP double low VCEsat Breakthrough In Small Signal (BISS) transistor in a medium power Surface-Mounted Device (SMD) plastic package. Table 1. Product overview Package NXP PBSS5350SS SOT96-1 Name SO8 NPN/PNP complement PBSS4350SPN NPN/NPN complement PBSS4350SS Type number 1.2 Features I I I I I Low collector-emitter saturation voltage VCEsat High collector current capability IC and ICM High collector current gain (hFE) at high IC High efficiency due to less heat generation Smaller required Printed-Circuit Board (PCB) area than for conventional transistors 1.3 Applications I Dual low power switches (e.g. motors, fans) I Automotive 1.4 Quick reference data Table 2. Quick reference data Conditions open base single pulse; tp ≤ 1 ms IC = −2 A; IB = −200 mA [1] Symbol Parameter Per transistor VCEO IC ICM RCEsat [1] Min - Typ 95 Max −50 −2.7 −5 140 Unit V A A mΩ collector-emitter voltage collector current peak collector current collector-emitter saturation resistance Pulse test: tp ≤ 300 µs; δ ≤ 0.02. NXP Semiconductors PBSS5350SS 50 V, 2.7 A PNP/PNP low VCEsat (BISS) transistor 2. Pinning information Table 3. Pin 1 2 3 4 5 6 7 8 Pinning Description emitter TR1 base TR1 emitter TR2 TR1 TR2 Simplified outline 8 5 Symbol 8 7 6 5 base TR2 collector TR2 collector TR2 collector TR1 collector TR1 1 4 1 2 3 4 006aaa976 3. Ordering information Table 4. Ordering information Package Name PBSS5350SS SO8 Description plastic small outline package; 8 leads; body width 3.9 mm Version SOT96-1 Type number 4. Marking Table 5. Marking codes Marking code 5350SS Type number PBSS5350SS 5. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCBO VCEO VEBO IC ICM IB Ptot Parameter collector-base voltage collector-emitter voltage emitter-base voltage collector current peak collector current base current total power dissipation Tamb ≤ 25 °C [1] [2] [3] Conditions open emitter open base open collector single pulse; tp ≤ 1 ms Min - Max −50 −50 −5 −2.7 −5 −0.5 0.55 0.87 1.43 Unit V V V A A A W W W Per transistor PBSS5350SS_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 3 April 2007 2 of 14 NXP Semiconductors PBSS5350SS 50 V, 2.7 A PNP/PNP low VCEsat (BISS) transistor Table 6. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Per device Ptot total power dissipation Tamb ≤ 25 °C [1] [2] [3] Parameter Conditions Min −65 −65 Max 0.75 1.2 2 150 +150 +150 Unit W W W °C °C °C Tj Tamb Tstg [1] [2] [3] junction temperature ambient temperature storage temperature Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. Device mounted on a ceramic PCB, Al2O3, standard footprint. 2.5 Ptot (W) 2.0 006aaa967 (1) 1.5 (2) 1.0 (3) 0.5 0 −75 −25 25 75 125 175 Tamb (°C) (1) Ceramic PCB, Al2O3, standard footprint (2) FR4 PCB, mounting pad for collector 1 cm2 (3) FR4 PCB, standard footprint Fig 1. Per device: Power derating curves PBSS5350SS_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 3 April 2007 3 of 14 NXP Semiconductors PBSS5350SS 50 V, 2.7 A PNP/PNP low VCEsat (BISS) transistor 6. Thermal characteristics Table 7. Symbol Rth(j-a) Thermal characteristics Parameter thermal resistance from junction to ambient Conditions in free air [1] [2] [3] Min - Typ - Max 227 144 87 40 Unit K/W K/W K/W K/W Per transistor Rth(j-sp) Per device Rth(j-a) thermal resistance from junction to solder point thermal resistance from junction to ambient in free air [1] [2] [3] - - 167 104 63 K/W K/W K/W [1] [2] [3] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. Device mounted on a ceramic PCB, Al2O3, standard footprint. 103 Zth(j-a) (K/W) 102 duty cycle = 1.0 0.75 0.5 0.33 0.2 0.1 10 0.05 0.02 0.01 0 1 006aaa809 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 tp (s) 103 FR4 PCB, standard footprint Fig 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PBSS5350SS_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 3 April 2007 4 of 14 NXP Semiconductors PBSS5350SS 50 V, 2.7 A PNP/PNP low VCEsat (BISS) transistor 103 Zth(j-a) (K/W) 102 duty cycle = 006aaa810 1.0 0.75 0.5 0.33 0.2 0.1 0.05 0.02 0.01 10 1 0 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 tp (s) 103 FR4 PCB, mounting pad for collector 1 cm2 Fig 3. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration; typical values 103 Zth(j-a) (K/W) duty cycle = 102 1.0 0.75 0.5 0.33 0.2 10 0.1 0.05 0.02 0.01 0 1 10−4 006aaa811 10−3 10−2 10−1 1 10 102 tp (s) 103 Ceramic PCB, Al2O3, standard footprint Fig 4. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PBSS5350SS_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 3 April 2007 5 of 14 NXP Semiconductors PBSS5350SS 50 V, 2.7 A PNP/PNP low VCEsat (BISS) transistor 7. Characteristics Table 8. Characteristics Tamb = 25 °C unless otherwise specified. Symbol Parameter Per transistor ICBO collector-base cut-off VCB = −50 V; IE = 0 A current VCB = −50 V; IE = 0 A; Tj = 150 °C collector-emitter cut-off current emitter-base cut-off current DC current gain VCE = −50 V; VBE = 0 V VEB = −5 V; IC = 0 A VCE = −2 V; IC = −100 mA VCE = −2 V; IC = −500 mA VCE = −2 V; IC = −1 A VCE = −2 V; IC = −2 A VCE = −2 V; IC = −2.7 A VCEsat collector-emitter saturation voltage IC = −0.5 A; IB = −50 mA IC = −1 A; IB = −50 mA IC = −2 A; IB = −100 mA IC = −2 A; IB = −200 mA IC = −2.7 A; IB = −270 mA RCEsat VBEsat collector-emitter IC = −2 A; IB = −200 mA saturation resistance base-emitter saturation voltage IC = −2 A; IB = −100 mA IC = −2.7 A; IB = −270 mA VBEon td tr ton ts tf toff Cc [1] [1] [1] [1] [1] [1] [1] [1] Conditions Min 200 200 180 130 95 - Typ 340 290 250 180 135 −60 −125 −225 −190 −255 95 Max −100 −50 −100 −100 −90 −180 −320 −280 −370 140 Unit nA µA nA nA ICES IEBO hFE mV mV mV mV mV mΩ [1] - −0.95 −1 −0.8 9 54 63 190 50 240 25 −1.1 −1.2 −1.2 35 V V V ns ns ns ns ns ns pF base-emitter turn-on VCE = −2 V; IC = −1 A voltage delay time rise time turn-on time storage time fall time turn-off time collector capacitance VCB = −10 V; IE = ie = 0 A; f = 1 MHz VCC = −10 V; IC = −2 A; IBon = −100 mA; IBoff = 100 mA Pulse test: tp ≤ 300 µs; δ ≤ 0.02. PBSS5350SS_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 3 April 2007 6 of 14 NXP Semiconductors PBSS5350SS 50 V, 2.7 A PNP/PNP low VCEsat (BISS) transistor 600 hFE 006aaa977 −5 IC (A) 006aaa978 (1) −4 400 (2) −3 IB (mA) = −140 −126 −112 −98 −84 −70 −56 −42 −28 −14 −2 200 (3) −1 0 −10−1 −1 −10 −102 −103 −104 IC (mA) 0 0 −0.4 −0.8 −1.2 −1.6 −2.0 VCE (V) VCE = −2 V (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −55 °C Tamb = 25 °C Fig 5. DC current gain as a function of collector current; typical values −1.2 VBE (V) −0.8 006aaa979 Fig 6. Collector current as a function of collector-emitter voltage; typical values −1.4 VBEsat (V) −1.0 006aaa980 (1) (2) (1) −0.4 (3) −0.6 (2) (3) 0 −10−1 −1 −10 −102 −103 −104 IC (mA) −0.2 −10−1 −1 −10 −102 −103 −104 IC (mA) VCE = −2 V (1) Tamb = −55 °C (2) Tamb = 25 °C (3) Tamb = 100 °C IC/IB = 20 (1) Tamb = −55 °C (2) Tamb = 25 °C (3) Tamb = 100 °C Fig 7. Base-emitter voltage as a function of collector current; typical values Fig 8. Base-emitter saturation voltage as a function of collector current; typical values PBSS5350SS_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 3 April 2007 7 of 14 NXP Semiconductors PBSS5350SS 50 V, 2.7 A PNP/PNP low VCEsat (BISS) transistor −1 VCEsat (V) −10−1 (1) (2) (3) 006aaa981 −1 VCEsat (V) −10−1 (1) (2) 006aaa982 −10−2 −10−2 (3) −10−3 −10−1 −1 −10 −102 −103 −104 IC (mA) −10−3 −10−1 −1 −10 −102 −103 −104 IC (mA) IC/IB = 20 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −55 °C Tamb = 25 °C (1) IC/IB = 100 (2) IC/IB = 50 (3) IC/IB = 10 Fig 9. Collector-emitter saturation voltage as a function of collector current; typical values 103 RCEsat (Ω) 102 006aaa983 Fig 10. Collector-emitter saturation voltage as a function of collector current; typical values 103 RCEsat (Ω) 102 (1) (2) (3) 006aaa984 10 10 1 (1) (2) (3) 1 10−1 10−1 10−2 −10−1 −1 −10 −102 −103 −104 IC (mA) 10−2 −10−1 −1 −10 −102 −103 −104 IC (mA) IC/IB = 20 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −55 °C Tamb = 25 °C (1) IC/IB = 100 (2) IC/IB = 50 (3) IC/IB = 10 Fig 11. Collector-emitter saturation resistance as a function of collector current; typical values Fig 12. Collector-emitter saturation resistance as a function of collector current; typical values PBSS5350SS_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 3 April 2007 8 of 14 NXP Semiconductors PBSS5350SS 50 V, 2.7 A PNP/PNP low VCEsat (BISS) transistor 8. Test information − IB 90 % input pulse (idealized waveform) − I Bon (100 %) 10 % − I Boff − IC 90 % output pulse (idealized waveform) − I C (100 %) 10 % t td t on tr ts t off tf 006aaa266 Fig 13. BISS transistor switching time definition VBB VCC RB (probe) oscilloscope 450 Ω VI R1 R2 RC Vo (probe) 450 Ω DUT oscilloscope mgd624 VCC = −10 V; IC = −2 A; IBon = −100 mA; IBoff = 100 mA Fig 14. Test circuit for switching times PBSS5350SS_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 3 April 2007 9 of 14 NXP Semiconductors PBSS5350SS 50 V, 2.7 A PNP/PNP low VCEsat (BISS) transistor 9. Package outline 5.0 4.8 1.75 1.0 0.4 6.2 5.8 4.0 3.8 pin 1 index 1.27 Dimensions in mm 0.49 0.36 0.25 0.19 03-02-18 Fig 15. Package outline SOT96-1 (SO8) 10. Packing information Table 9. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number PBSS5350SS [1] Package SOT96-1 Description 8 mm pitch, 12 mm tape and reel Packing quantity 1000 -115 2500 -118 For further information and the availability of packing methods, see Section 14. PBSS5350SS_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 3 April 2007 10 of 14 NXP Semiconductors PBSS5350SS 50 V, 2.7 A PNP/PNP low VCEsat (BISS) transistor 11. Soldering 5.50 0.60 (8×) 1.30 4.00 6.60 7.00 1.27 (6×) solder lands occupied area placement accuracy ± 0.25 Dimensions in mm sot096-1_fr Fig 16. Reflow soldering footprint SOT96-1 (SO8) 1.20 (2×) 0.60 (6×) 0.3 (2×) enlarged solder land 1.30 4.00 6.60 7.00 1.27 (6×) 5.50 board direction solder lands occupied area solder resist placement accurracy ± 0.25 Dimensions in mm sot096-1_fw Fig 17. Wave soldering footprint SOT96-1 (SO8) PBSS5350SS_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 3 April 2007 11 of 14 NXP Semiconductors PBSS5350SS 50 V, 2.7 A PNP/PNP low VCEsat (BISS) transistor 12. Revision history Table 10. Revision history Release date 20070403 Data sheet status Product data sheet Change notice Supersedes Document ID PBSS5350SS_1 PBSS5350SS_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 3 April 2007 12 of 14 NXP Semiconductors PBSS5350SS 50 V, 2.7 A PNP/PNP low VCEsat (BISS) transistor 13. Legal information 13.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 13.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 13.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or 13.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 14. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com PBSS5350SS_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 3 April 2007 13 of 14 NXP Semiconductors PBSS5350SS 50 V, 2.7 A PNP/PNP low VCEsat (BISS) transistor 15. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Packing information. . . . . . . . . . . . . . . . . . . . . 10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Contact information. . . . . . . . . . . . . . . . . . . . . 13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 3 April 2007 Document identifier: PBSS5350SS_1