UM11711
PCAL6524EV-ARD evaluation board
Rev. 1.0 — 19 January 2022
User manual
Document information
Information
Content
Keywords
PCAL6524, I C-bus, 24-bit I/O bus, Arduino port, EVK
Abstract
The PCAL6524EV-ARD evaluation board is a daughter card equipped with
Arduino port, designated for easy test and design of PCAL6524 IC, 24-bit port
2
expander, controlled through FM+ I C 2-wire bus, with RESET. The board
is fully compliant with IMXRT1050 EVK, LPCXpresso55S69 (LPC55S69EVK) and i.MX 8M Mini LPDDR4 EVK (8MMINILPD4-EVK, 8MMINID4-EVK),
including GUI software control. The board can be attached to any device
equipped with Arduino port.
2
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NXP Semiconductors
PCAL6524EV-ARD evaluation board
Revision history
Rev
Date
v.1.0
20220119
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Description
Initial version
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IMPORTANT NOTICE
For engineering development or evaluation purposes only
NXP provides the product under the following conditions:
This evaluation kit is for use of ENGINEERING DEVELOPMENT OR
EVALUATION PURPOSES ONLY. It is provided as a sample IC presoldered to a printed-circuit board to make it easier to access inputs,
outputs and supply terminals. This evaluation board may be used with any
development system or other source of I/O signals by connecting it to the
host MCU computer board via off-the-shelf cables. This evaluation board
is not a Reference Design and is not intended to represent a final design
recommendation for any particular application. Final device in an application
heavily depends on proper printed-circuit board layout and heat sinking
design as well as attention to supply filtering, transient suppression, and I/O
signal quality.
The product provided may not be complete in terms of required design,
marketing, and or manufacturing related protective considerations, including
product safety measures typically found in the end device incorporating the
product. Due to the open construction of the product, it is the responsibility of
the user to take all appropriate precautions for electric discharge. In order to
minimize risks associated with the customers’ applications, adequate design
and operating safeguards must be provided by the customer to minimize
inherent or procedural hazards. For any safety concerns, contact NXP sales
and technical support services.
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1
Introduction
This document describes the PCAL6524EV-ARD evaluation board. The evaluation board
2
is built around the PCAL6524, ultra-low voltage translating 24-bit I C-bus/SMBus I/O
expander with interrupt output, reset, and configuration registers, produced by NXP
Semiconductors. The evaluation board serves as a daughter card that can be connected
through an Arduino port to various Arduino compatible (including original Arduino Uno
R3) EVK / mother boards for testing and measuring the characteristics of the PCAL6524
Device Under Test (DUT).
The PCAL6524EV-ARD daughter card communicates through the Arduino port with the
2
2
host device via the Fast-mode I C-bus. Alongside the I C-bus, three additional digital
lines allows the motherboard to control the DUT through the same Arduino port.
Power is delivered from the motherboard (EVK) through the Arduino port also.
The I/O pins of the DUT are organized in three ports. Each port (P0, P1 and P2) is 8bit wide, so the PCAL6524 manages a total amount of 24 I/O lines. The port P0 and P1
controls an on-board four-digit LED display through the MAX V CPLD (Intel/Altera). The
board contains also four on-board LEDs and four switches, connected to P2 port of the
DUT. All I/O lines are shared with two connectors for external access to the I/O pins (J6
and J7, see the schematic diagram of the PCAL6524EV-ARD evaluation board).
Additionally, a Graphical User Interface (Windows platform) is provided to facilitate the
evaluation of the daughterboard. The GUI is used with the following NXP evaluation
boards: IMXRT1050 EVK Board, LPCXpresso55S69 Development Board and i.MX 8M
Mini LPDDR4 EVK Board.
2
Finding kit resources and information on the NXP web site
NXP Semiconductors provides online resources for evaluation board and its supported
device(s) on http://www.nxp.com.
The information page for PCAL6524EV-ARD evaluation board is at http://http://
www.nxp.com/PCAL6524EV-ARD. The information page provides overview information,
documentation, software and tools, parametrics, ordering information and a Getting
Started tab. The Getting Started tab provides quick-reference information applicable
to using the PCAL6524EV-ARD evaluation board, including the downloadable assets
referenced in this document.
2.1 Collaborate in the NXP community
The NXP community is for sharing ideas and tips, ask and answer technical questions,
and receive input on just about any embedded design topic.
The NXP community is at http://community.nxp.com.
3
Getting ready
Working with the PCAL6524EV-ARD requires the kit contents, additional hardware, and a
Windows PC workstation with installed software.
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3.1 Kit contents
• Assembled and tested evaluation board in an antistatic bag
• Quick Start Guide
3.2 Assumptions
2
Familiarity with the I C-bus is helpful but not required.
3.3 Static handling requirements
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care
should be taken during transport and handling. You must use a ground strap
or touch the PC case or other grounded source before unpacking or handling
the hardware.
3.4 Minimum system requirements
This evaluation board requires a Windows PC workstation. Meeting these minimum
specifications should produce great results when working with this evaluation board.
• Computer with Windows 10
• One USB port (either 3.0 or 2.0 or 1.1 compatible)
• One of three EVK boards (MIMXRT1050-EVK, LPC55S69-EVK, 8MMINILPD4-EVK)
along with the associated firmware / GUI software
• USB cable for power and data connection between PC and EVK board (if not included
in the EVK package)
4
Getting to know the hardware
4.1 PCAL6524EV-ARD features
•
•
•
•
•
•
•
•
I/O connectors for external access to IC input-output pins
Four user switches connected to I/O pins of the IC
Four user LEDs connected to I/O pins of the IC
On-board LED display controlled from the I/O pins of the IC
Equipped with Arduino Uno R3 port for direct connection with Arduino devices
Fully compliant with IMXRT1050 EVK board, including GUI (Windows 10)
Fully compliant with LPCXpresso55S69 dev. board, including GUI (Windows 10)
Compliant with i.MX Mini LPDDR4 EVK board, including GUI (Windows 10)
Note: For i.MX Mini LPDDR4 EVK Board is necessary to use IMX8MMINI-IARD
interposer board between the EVK and PCAL6524EV-ARD daughterboard (see
IMX8MMINI-IARD User Manual).
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4.2 Kit featured components
Figure 1 identifies the main components on the board. The main elements are called out
in the picture. The Arduino port connectors (J1, J2, J3, J4) are located on the bottom side
of the board.
Figure 1. PCAL6524EV-ARD board, top view (up) and bottom view (down)
4.3 Block diagram
Figure 2 shows a block diagram of the PCAL6524EV-ARD daughterboard. Alongside the
DUT (U1), the board includes a series of peripherals that assures the operation of the
2
board. U1 is linked to Arduino interface (J1 to J4) through two busses: the I C-bus and
the control bus.
The port P0 and P1 (8-bit wide each) controls the four-digit LED display (D9 to D12)
located on the board, through the MAX V CPLD which acts as display decoder/driver. Al
sixteen I/O lines are shared with the 16 BIT I/O PORT (J6).
The port P2 (8-bit wide) is shared with the on-board user LEDs D5 to D8, user switches
SW1 to SW4, and the 8 BIT I/O PORT (J7). The first four LSB I/O lines of the port P2
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drives the user LEDs, while the last four MSB lines are configured as inputs and are
controlled by the user switches.
The board contains two LDO voltage regulators, for 3.3 V (U3) and 1.8 V (U4), power
rails.
Figure 2. PCAL6524EV-ARD block diagram
4.4 Schematic diagram
The schematic diagram of PCAL6524EV-ARD is available at URL: http://www.nxp.com/
PCAL6524EV-ARD.
4.5 Arduino port
J1, J2, J3, and J4 are the mated pin headers of Arduino Uno R3 connectors, with the
same electrical function and placed on the board, so that the daughterboard can be
directly inserted in the Arduino port. The daughter card uses only five signal lines.
Table 1 details the pin chart of connectors, and the lines used in the circuit (see also the
SPF-46658.pdf schematic file).
Table 1. The pin chart of Arduino connectors and their usage
Ref Des
#
J1 (Power)
1
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Arduino label
NC
PCAL6524EV-ARD function
Not used
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Table 1. The pin chart of Arduino connectors and their usage...continued
Ref Des
#
2
J2 (analog, digital, I C)
J4 (digital, UART, PWM)
J3 (mixed)
Arduino label
PCAL6524EV-ARD function
2
IOREF
Not used
3
RESET
Not used
4
3.3V
Not used
5
5V
Power supply
6
GND
Power supply return
7
GND
Power supply return
8
Vin
Not used
1
A0
Not used
2
A1
Not used
3
A2
Not used
4
A3
Not used
5
A4 / SDA
I C – SDA
6
A5 / SCL
I C – SCL
1
D0 / RX
Not used
2
D1 / TX
Not used
3
D2
MAX_CLR
4
D3 / PWM
MAX_OE
5
D4
MAX_CTRL_2
6
D5 / PWM
MAX_CTRL_1
7
D6 / PWM
MAX_CTRL_0
8
D7
MAX_CLK
1
D8
RESET (control bus)
2
D9 / PWM
ADDR (control bus)
3
D10 / SS / PWM
INT (control bus)
4
D11 / MOSI / PWM
Not used
5
D12 / MISO
Not used
6
D13 / SCK
Not used
7
GND
Power supply return
8
AREF
Not used
9
A4 / SDA
Not used
10
A5 / SCL
Not used
2
2
The circuit is supplied with 5V from Arduino port through J1 and J3. Pin no. 5 of J1 is 5V
power supply, while pin no. 6, 7 of J1, and pin no. 7 of J3 represents the power supply
return (ground).
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2
4.6 I C-bus
2
The PCAL6524EV-ARD board communicates with the host through an I C-bus (pin
A3 – SCL, pin A2 – SDA). The communication provides internal configuration of the I/
O expander, reads the logic levels of the I/O pins configured as inputs, and sets the
logic level on the I/O pins configured as outputs. The internal configuration of the DUT
includes: direction of the digital I/O lines (input or output), polarity inversion, pull-up /
pull-down resistor enable, output strength, output configuration (push-pull or open2
drain), input latch configuration, interrupt register. The transaction speed of the I C-bus
is compliant with Standard-mode (100kHz), Fast-mode (400kHz), and Fast-mode plus
2
(1MHz). For more details about I C description and bus transactions, see PCAL6524
2
datasheet (NXP Semiconductors). The pull-up resistors of the I C-bus are R43 and R44
(see SPF-46658.pdf schematic file).
4.7 Control bus
The control bus manages RESET, ADDR, and INT pins of the PCAL6524 IC. The
RESET pin is digital input and is controlled by the system host. Its role is to reset the I/
O expander when a time-out or other improper operation occurs. Asserting a low level of
this line forces a reset operation of the internal control section of the IC (puts the internal
2
registers in their default state and force a re-initialization of the I C state machine, in
the same manner as power-on sequence). The RESET pin is controlled by the EVK
motherboard through J3-1 (ARDUINO port).
The ADDR pin is digital input and represents a programmable hardware address
package which can be asserted low or high, to assign two different slave addresses. The
input is controlled by the EVK through J3-2 (Arduino port).
The INT pin is an open-drain interrupt output, activated when any input state differs from
its corresponding input port register state, indicating to the host system that an input
state has changed. The line is monitored by the EVK through J3-3 ARDUINO port and
locally by the LED (D4) located on the daughterboard. The LED D4 can be deactivated
by removing JP1 jumper. When D4 is inactive (JP1 removed) the open-drain is polarized
through R42. R42 also has the role to compensate the voltage drop of D4 assuring 3.3V
high level in high state of the interrupt line (see SPF-46658.pdf schematic file).
4.8 I/O bus
The PCAL6524 IC contains 24 configurable I/O pins, organized in three ports, P0, P1,
and P2. All three ports are 8-bit wide. P0 and P1 are allocated to the four-digit LED
display (through MAX V CPLD, U2). The on-board LEDs (D5 to D8) and user switches
SW1 to SW4 are connected to port P2. All I/O lines of the PCAL6524 IC are linked to
the I/O port connectors for external access of the I/O lines (see the schematic file of the
PCAL6524EV-ARD daughterboard). Table 2 shows the allocation of the PCAL6524 I/O
lines (U1).
Table 2. I/O allocation
PCAL6524
(U1) pin
Direction
CPLD
(U2) pin
LED
Switch
16 BIT – I/O PORT (J6)
8 BIT – I/O PORT (J7)
P0_0
I/O
IO_9
-
-
3
-
P0_1
I/O
IO_10
-
-
4
-
P0_2
I/O
IO_11
-
-
5
-
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Table 2. I/O allocation...continued
PCAL6524
(U1) pin
Direction
CPLD
(U2) pin
LED
Switch
16 BIT – I/O PORT (J6)
8 BIT – I/O PORT (J7)
P0_3
I/O
IO_12
-
-
6
-
P0_4
I/O
IO_13
-
-
7
-
P0_5
I/O
IO_14
-
-
8
-
P0_6
I/O
IO_15
-
-
9
-
P0_7
I/O
IO_16
-
-
10
-
P1_0
I/O
IO_17
-
-
11
-
P1_1
I/O
IO_18
-
-
12
-
P1_2
I/O
IO_19
-
-
13
-
P1_3
I/O
IO_22
-
-
14
-
P1_4
I/O
IO_23
-
-
15
-
P1_5
I/O
IO_24
-
-
16
-
P1_6
I/O
IO_25
-
-
17
-
P1_7
I/O
IO_26
-
-
18
-
P2_0
Output
-
D5
-
-
2
P2_1
Output
-
D6
-
-
3
P2_2
Output
-
D7
-
-
4
P2_3
Output
-
D8
-
-
5
P2_4
Output
-
-
SW1
-
6
P2_5
Output
-
-
SW2
-
7
P2_6
Output
-
-
SW3
-
8
P2_7
Output
-
-
SW4
-
9
The on- board LEDs can be disabled by placing JP2 jumper in 2-3 position (OPTION
1, see SPF-46658.pdf file). This feature is useful when the user uses the board with
external device connected to J7 I/O port. The switches are connected to the bus through
620-ohm series resistors (R49 – R52), to avoid bus conflict (short-circuit if the line is set
accidentally as output and the switch is pressed).
4.9 CPLD
The PCAL6524EV-ARD board contains a MAX V series CPLD from Intel/Altera (U2,
5M80ZE64C5N). The role of this IC is decoder / driver for the on-board four-digit LED
display (D9 to D12). The CPLD works as signal bridge between the ports P0 and P1
of the PCAL6524 IC and the LED displays. Additionally, a six-line control bus is linked
between the MAX V IC and the Arduino port. For details, see SPF-46658.pdf schematic
file of PCAL6524EV-ARD daughterboard. The internal firmware of the MAX V CPLD is
controlled from the GUI application through the control bus. The CPLD control bus sets
the operation modes of MAX V CPLD. The MAX_CLK line is not used (IO_5/CLK0 pin of
U2 is masked). Table 3 details the operation modes and the corresponding logic states of
CPLD control bus.
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Table 3. CPLD control bus
Bus line
Direct Write
Count
Idle
MAX_CLK
Not used
Not used
Not used
MAX_CLR
0
0
1
MAX_OE
0
1
0
MAX_CTRL_0
X
Controls the indication
[3]
of digit 4 (D9).
MAX_CTRL_1
MAX_CTRL_2
[1]
[2]
[3]
Controls the speed
[2]
of counting
[1]
X
[1]
X
Controls the direction
[2]
of counting
Controls the counting status
[1]
0
[2]
X
[1]
Don’t care
See Section 4.9.2 and Table 4
See Section 4.9.1
4.9.1 Direct write
When this mode is activated, the user can write decimal values from the GUI directly
to the on-board LED display on the PCAL6524EV-ARD board. For the Digit 1, 2, and 3
(D10, D11, and D12), the user can write decimal numbers from 0 to 9. For Digit 4 (D9),
the user can set the letter “U” or “d” (the initials of “Up” and “down”). Note that the digit
4 indication is controlled by the MAX_CTRL_1 control line (not through the one of I/O
line of the PCAL6524 IC). The dots of the digits can be set separately. See Table 4 and
Figure 3 for details.
Table 4. MAX V data bus
PCAL6534 pin
Direct write
Count
Idle
P0_0
P0_1
P0_2
Write decimal numbers from the GUI to Read the current data from
Digit 1 (D12). The PCAL6524 pins are Digit 1 (D12). The PCAL6524
configured as outputs.
pins are configured as inputs.
P0_3
P0_4
P0_5
P0_6
Write decimal numbers from the GUI to Read the current data from
Digit 2 (D11). The PCAL6524 pins are
Digit 2 (D11). The PCAL6524
configured as outputs.
pins are configured as inputs.
P0_7
P1_0
P1_1
P1_2
Write decimal numbers from the GUI to
Digit 3 (D10). The PCAL6524 pins are Read the current data from
configured as outputs.
Digit 3 (D10). The PCAL6524
pins are configured as inputs.
No action. The MAX V
corresponding pins are in high
Z.
P1_3
P1_4
Set ON/OFF the dot of Digit 1 (D12)
P1_5
Set ON/OFF the dot of Digit 2 (D11)
P1_6
Set ON/OFF the dot of Digit 3 (D10)
P1_7
Set ON/OFF the dot of Digit 4 (D9)
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The PCAL6524 pins are
configured as inputs. The
lines are set in high state in
MAX V.
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4.9.2 Count mode
In this mode, an internal counter clocked by the RC oscillator of MAX V counts up and
down, at low speed (clock frequency: 7.6 Hz), or high speed (clock frequency: 61 Hz).
The counting status, direction, and speed are set by the MAX_CTRL_# lines of the
control bus. See Table 5 for MAX_CTRL lines. The current value of the counter is send
to ports P0 and P1 of the DUT IC (configured as inputs) and displayed in the GUI. The
range of the counter value is from 000 to 999.
Table 5. MAX_CTRL_# control lines in Count mode
Bus line
Function
MAX_CTRL_0
Speed
MAX_CTRL_1
Direction
MAX_CTRL_2
Status
State
Description
0
Low speed (7.5 Hz)
1
High speed (60 Hz)
0
down
1
up
0
Counter is ON
1
Counter is OFF (the counting is stopped)
4.9.3 Idle mode
In this mode, the internal counter is stopped, the LED display is OFF, except the Digit 4
(D9) which is displaying “-“ (minus) sign (see Figure 3).
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Count mode - counting up
Count mode - counting down
Idle mode
Figure 3. PCAL6524EV-ARD on-board LED display
4.10 Jumpers and test points
The board contains two jumpers and several test points. Table 6 and Figure 4 detail
the jumper locations and their default configurations. Table 7 describes the test points
located on the PCAL6524EV-ARD board.
Table 6. PCAL6524EV-ARD jumpers
Ref Des
Label
Default
JP1
INT MONITOR - ON / OFF
OFF
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Description
OFF: Disable the interrupt monitor LED (D4)
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Table 6. PCAL6524EV-ARD jumpers...continued
Ref Des
Label
Default
Description
ON: Enable the interrupt monitor LED (D4)
JP2
USER LED – ON / OFF
1-2
1-2: Enable the user LEDs (D5 – D8)
2-3: Disable the user LEDs (D5 – D8)
Figure 4. PCAL6524EV-ARD jumper locations
Table 7. PCAL6524EV-ARD test points
Ref Des
Test point / jumper label
TP1
5V
TP2
3.3V
3.3 V power rail
TP3
1.8V
1.8 V power rail
TP4
GND
Ground
TP5
GND
Ground
TP6
RST
RESET input of PCAL6524 IC
TP7
SDA
SDA line (I C-bus)
TP8
SCL
SCL line (I C-bus)
TP9
ADDR
5
Description
5 V power rail
2
2
ADDR input of PCAL6524 IC
Installing and configuring software tools
PCAL6524EV_ARD evaluation board is designed and built as a daughterboard able to
work in conjunction with a motherboard equipped with an Arduino port. The board was
built to be fully compatible with the following NXP Evaluation (EVK) boards:
• IMXRT1050 EVK Board;
• LPCXpresso55S69 Development Board;
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• i.MX 8M Mini LPDDR4 EVK Board;
Each mentioned above evaluation / development board benefits by firmware support
which can be downloaded from NXP company site (www.nxp.com/). Before starting,
the EVK motherboard must be programmed with the corresponding firmware package.
Additionally, a GUI application (Windows 10) is available for download from the NXP
site, allowing rapid testing and operation of PCAL6524EV-ARD daughterboard through
the one of above mentioned EVK. The GUI application is common for all three EVKs
and for the PCAL6xxx I/O expander development card family, manufactured by NXP
(PCAL6408A, PCAL6416A, PCAL6524 and PCAL6534 ICs). For details regarding
installation of the EVK firmware and GUI host software on PC please download
EVK_Firmware_And_GUI_Install_Guide_For_Arduino_Boards.pdf instruction file from
NXP site (www.nxp.com/). Once the software is installed, the first step is to select the
correct combination EVK – PCAL6524EV-ARD daughter card, and then the board can be
controlled from the GUI interface. See Section 6 and Section 7 for more details regarding
the operation of PCAL6524EV-ARD from GUI software.
6
Configuring the hardware
6.1 Using the PCAL6524EV-ARD with an IMXRT1050 EVK board
Figure 5 shows the required hardware for operation of the PCAL6524EV-ARD
daughterboard with IMXRT1050 EVK. The following items are necessary:
•
•
•
•
One IMXRT1050-EVK board
One PCAL6524EV-ARD daughterboard
One USB-A / USB Micro-B cable
A PC with Windows 10 operating system
The IMXRT1050 EVK motherboard can be powered by one of the three methods:
• Connecting an external 5VDC power supply to the barrel power connector (J2) on the
board
• Connecting a USB cable from the PC to the Micro-B USB connector (J9) on the board
• Connecting a USB cable from the PC to the USB connector (J28) on the board. When
the PC is connected in this fashion, the USB port can simultaneously act as a debug
interface. Therefore, by using a single USB cable connected to J28, the EVK can be
powered and at the same time linked to the PC for data exchange.
The older USB ports (from PC) are not able to deliver the necessary current (500mA),
before establishing the communication, use an external power supply (connected to J2).
From J1 on the EVK board (see Figure 5) the user can select the power configuration for
the motherboard. For further details, refer to the IMXRT1050 EVK Board Hardware User
Guide.
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Figure 5. PCAL6524EV-ARD daughterboard and IMXRT1050 EVK board, before starting
To configure the hardware and workstation, complete the following procedure:
1. Configure the suitable power configuration of EVK (J1). If using J28 for power supply,
the J1 jumper shall be placed in position 5-6. If using an external power supply
(connected to J2), the jumper J1 will be placed in position 1-2.
2. Insert the PCAL6524EV-ARD daughter card on the Arduino connector of the EVK
(see Figure 5).
3. Using USB connector J28, connect the EVK board to an USB port of the computer.
4. Install the IMXRT1050 target firmware (download from NXP site and see UM11581,
Arduino Arduino shields GUI and firmware installation manual for step-by-step
instructions).
5. Install GUI application (see UM11581, Arduino shields GUI and firmware installation
manual).
6. Open the GUI application to operate the device from the PC. For details regarding
GUI operation see Section 7.
Figure 6 shows the boards during the operation.
Figure 6. The assembly PCAL6524EV-ARD daughterboard / IMXRT1050 EVK board operation
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6.2 Using the PCAL6524EV-ARD with an LPCXpresso55S69 development
board
Figure 7 shows the required hardware for operation of the PCAL6524EV-ARD and
LPCXpresso55S69 EVK board. This configuration consists of:
•
•
•
•
One LPCXpresso55S69 EVK board
One PCAL6524EV-ARD daughterboard
One USB-A / USB Micro-B cable
A PC with Windows 10 operating system
The LPCXpresso55S69 development board is equipped with four USB Micro-B
connectors: P5, P6, P9 and P10. The board can be powered through any USB port.
Using P6 USB connector to connect the board to the PC simplifies the start-up operation
because P6 is designated for debugging and the USB cable thus accomplishes two tasks
at the same time: powering the board, and serving as a data link between the EVK board
and PC. For more details regarding power-up and operation of the LPCXpresso55S69
development board, see the LPCXpresso55S69/LPCXpresso55S28 Development Board
User Manual here.
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Figure 7. PCAL6524EV-ARD daughterboard and LPCXpresso55S69 motherboard, before starting
The following steps describe how to assemble, program, and operate the configuration
shown in Figure 7.
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1. Insert the PCAL6524EV-ARD daughter card to P16 – P19 connectors located
on LPCXpresso55S69 development board (see the marked pins of P16 – P19,
Figure 7);
2. Connect the development board using port P6 USB port of PC;
3. Install the LPCXpresso55S69 target firmware (download from NXP site and read the
EVK_Firmware_And_GUI_Install_Guide_For_Arduino_Boards.pdf instruction file);
4. Install GUI application on PC (see the instruction file called out in the previous step);
5. Open the GUI application to operate the device from the PC. For details regarding
GUI operation see Section 7.
Figure 8 shows the two boards in operation.
Figure 8. PCAL6524EV-ARD daughterboard/LPCXpresso55S69 motherboard operation
6.3 Using the PCAL6524EV-ARD with an i.MX 8M Mini LPDDR4 EVK
board
When an i.MX 8M Mini LPDDR4 EVK board is used with the PCAL6524EV-ARD board, a
third board (IMX8MMINI-IARD interposer board) must be used, especially designed and
built as EVK – daughterboard interconnection. The EVK board i.MX 8M Mini LPDDR4
is not equipped with an Arduino port; instead it has a 2 x 20 pin expansion connector
(J1003, see i.MX 8M Mini LPDDR4 EVK user manual). J1003 is a multipurpose port,
2
containing various digital I/O lines, including specialized I C and SPI buses. Starting from
the expansion connector pin chart, an Arduino port interposer board was developed,
with the role of signal-to-signal bridge between the 2 x 20 connector pins on the i.MX
8M Mini LPDDR4 EVK and the mated connectors of the Arduino port present on the
PCAL6524EV-ARD daughterboard.
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To operate the setup, along with the EVK and the daughterboard, a third board must be
included in the setup assembly. Figure 9 shows the necessary boards and how these
boards are connected. The configuration consists of:
•
•
•
•
•
•
One i.MX 8M Mini LPDDR4 EVK board
One PCAL6524EV-ARD daughterboard
One IMX8MMINI-IARD interposer board
One USB-A / USB-C cable
One USB-A / USB Micro-B cable
A PC with Windows 10 operating system
It is recommended to attach the PCAL6524EV-ARD to the Arduino connectors of the
IMX8MMINI-IARD interposer board first, and then the resulting assembly to the i.MX 8M
Mini LPDDR4 EVK. This can be done by plugging J1 connector located on the interposer
board to J1003 connector on the EVK.
To power-up the EVK, an USB-C type cable connected to PORT 2 of the EVK is used.
The power switch SW101 on the EVK board must be set to ON position to power-up
the setup. Data communication is achieved by routing a separate USB (Micro-B type)
cable from an USB port on the PC to debug port (J901) on the EVK (see Figure 9 and
Figure 10).
The user may find details regarding power-up and operation of the setup assembly in
8MMINILPDDR4-EVK user manual and IMX8MMINI-IARD User Manual. The files can be
downloaded from www.nxp.com/.
Figure 9. The assembly PCAL6524EV-ARD daughterboard, IMX8MMINI-IARD interposer board, and i.MX 8M Mini
LPDDR4 EVK, before starting
To configure and operate the setup, follow the below steps:
1. Insert the PCAL6524EV-ARD onto the IMX8MMINI-IARD interposer board Arduino
connectors (located on the top side);
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2. Attach IMXMMINI-IARD connector plug J1 (located on the bottom of the board) into
J1003 expansion board located on the top side of i.MX 8M Mini LPDDR4 EVK (see
Figure 9);
3. Power-up the EVK board using an USB Type C cable attached to PORT 2;
4. Connect the EVK to the PC, using an USB Micro-B cable, attached to J901 debug
port;
5. Place SW101 in ON position to power-up the boards;
6. Install the MIMXRT1050 target firmware (download UM11581, Arduino shields GUI
and firmware installation manual from NXP site);
7. Install GUI application on the PC (see the instruction file referred in the above step);
8. Open the GUI application to operate the device from the PC. For details regarding
GUI operation see Section 7;
Figure 10. PCAL6524EV-ARD daughterboard / i.MX 8M Mini LPDDR4 EVK board operation
6.4 Using PCAL6524EV-ARD with another device
The PCAL6524EV-ARD daughterboard can be operated with other EVK board, which
has an Arduino port. There are two options to connect the board: using other EVK
equipped with an Arduino port, and an EVK without Arduino port. In the first case, a
firmware shall be developed according with PCAL6524EV specifications, and then
simply attach PCAL6524EV-ARD daughterboard to the EVK, to operate the board. In the
second case, using the pin chart of Arduino connectors (Table 1), make the necessary
2
electrical connections (for power, I C-bus and control lines), and develop the desired
firmware, assuring that is compliant with IC specifications. Use PCAL6524 datasheet to
read details about internal registers of the DUT IC and data exchange between internal
controller and the EVK. Assure for correct electrical connections and avoid data conflicts
on the signal lines, to prevent IC damage.
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7
GUI description
A GUI application is available for the three EVK boards from NXP Semiconductors. The
application is common for all EVKs and the development boards of the entire family of IO
expanders produced by NXP Semiconductors (PCAL6408A-ARD, PCAL6416AEV-ARD,
PCAL6524EV-ARD, and PCAL6534EV-ARD).
This section describes the GUI application and how the user can control the
PCAL6524EV-ARD daughterboard from the graphical interface. First, install the GUI
package and software on the PC (Windows 10). For more details, see UM11581.
Once installation is complete, assure that one of the mentioned three EVKs with attached
PCAL6524EV-ARD daughterboard is connected to a PC and powered-on. Open
NXP_(PCAL65x4,PCAL64xxA) GUI application. An interface will appear as is shown in
Figure 11:
The GUI application starts with Settings tab (marked with red arrow). The left side of the
window displays Board settings. The section provides the following settings:
• Select EVK: displays the list of EVKs. Selecting a wrong EVK board causes the
connection to fail and a pop-up window with the message: “Unable to Connect with
EVK” appears on the screen.
• Select COM port: displays port selected for the communication. The port is
automatically selected by the system (in the picture is COM 3).
• Select Board: allows the user to select the correct daughterboard (the application can
support four different boards). In Figure 10, the selected board is PCAL6524. Selecting
a wrong daughterboard causes the connection to fail and a pop-up window with the
message: “Unable to Connect with Daughter Card” appears on the screen.
In the right side of the window is located Device setting section. The following settings
are provided:
2
• I2C Frequency: displays the I C-bus clock frequency (100 kHz, 400 kHz, and 1 MHz).
With the Set button the value is written in the internal register of PCAL6524 IC.
• Address Selection: allows the user to select the hardware address of PCAL6524 IC.
• Reset Chip: reset the internal register of PCAL6524.
Assuming the correct parameters are chosen, clicking the Connect button establishes
the connection with the EVK. In the bottom side of the GUI window a status bar shows in
real time the status connection between PC and the EVK.
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Figure 11. Graphical interface at start-up (“Settings” tab activated by default)
In the tab bar, from left to right the first tab is CPLD. Clicking on CPLD tab, a new window
appears as it is shown in Figure 12. The user can select one of three modes:
• Count mode: when activated, three additional parameters (speed, direction and
counting status) can be set. For details regarding Count Mode and its additional
settings see Section 4.9. Use the Write button to send the configuration to the
daughterboard. The four-digit display in the upper (blue) area indicates the current
value of the physical LED display (D9 to D12) located on the PCAL6524EV-ARD
daughterboard.
• Direct Write Mode: in this mode the user can set the value indicated by the LED
display on the PCAL6524EV-ARD daughterboard. The values “Up” and “Down” can be
chosen for LCD 1 (D9), while the other three digits can be set with numbers from 0 to 9.
The dot for each digit can be set to be on/off individually. Clicking on Write button the
values will be written in the daughterboard.
• Idle Mode: In this mode the display is off, except LCD 1 (D9) which indicates the “-“
sign.
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Figure 12. Graphical interface – “CPLD” tab activated
Clicking on SWITCH tab, a new window appears (see Figure 13). In the left side of the
window, the parameters of the I/O connected to on-board switches (SW1 to SW4) can be
set. The parameters are:
•
•
•
•
•
•
•
Latch: enable / disable the corresponding latch of the input.
Pull Up/Down Enable: enable / disable the internal pull-up or pull-down resistor.
Pull UP/Down Selection: select the internal pull-up or pull-down resistor.
Interrupt Mask: enable / disable the interrupt mask for the input;
Polarity Inversion: enable / disable the polarity inversion function for the input;
Interrupt Edge: select the trigger type of the interrupt (level or edge);
Interrupt Clear: clear the interrupt register;
The Write button sets the internal registers of the DUT with the selected value in the GUI.
The on-board switches (SW1 to SW4) does not have pull-up resistors, the user should
select and activate the internal pull-up resistors from the GUI. In the right side of the
window, the Read button, bring back the current values of the registers on the graphical
user interface.
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Figure 13. Graphical interface – “SWITCH” tab activated
The LED tab, allows the user to control the on-board user LEDs D5 to D8. (see
Figure 14). In the yellow area of the window, the parameters of the I/O connected to onboard user LEDs can be set. The parameters are:
• Value: set the status of the on-board user LED (the logic state of the output).
• Output drive strength: sets the drive strength of the output.
The Write button sets the internal registers of the DUT with the selected value in the GUI.
In the upper side of the window (the blue region) the LED1 to LED4 indicators displays
the current state of the on-board LEDs (D5 to D8).
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PCAL6524EV-ARD evaluation board
Figure 14. Graphical interface – “LED” tab activated
The Debug tab (Figure 15) displays the current value of the internal registers of the IC,
every time when Read button is clicked. To find details about internal registry see the
PCAL6524 datasheet (https://www.nxp.com/docs/en/data-sheet/PCAL6524.pdf).
Figure 15. Graphical interface – “Debug” tab activated
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8
Abbreviations
Table 8. Abbreviations
Acronym
Description
CPLD
Complex Programmable Logic Device
DUT
Device Under Test
ESD
Electro Static Discharge
EVK
Evaluation Board
GUI
Graphical User Interface
2
I C-bus
Inter-Integrated Circuit bus
IC
Integrated Circuit
I/O
Input / Output
LED
Light Emitting Diode
PC
Personal Computer
USB
Universal Serial Bus
9
References
2
1. PCAL6524, Ultra low-voltage translating 24-bit FM+ I C-bus/SMBus I/O expander
with Agile I/O features, interrupt output and reset
Product data sheet; NXP Semiconductors;
2. MIMxrt1050 EVK Board Hardware User’s Guide
User manual; NXP Semiconductors;
3. i.MX RT1050 Crossover Processors Data Sheet for Consumer Products
Data sheet; NXP Semiconductors;
4. UM11158 – LPCXpresso55S69 Development Board
User manual; NXP Semiconductors;
5. LPC556x 32-bit ARM Cortex-M33; M33 coprocessor, TrustZone, PowerQuad,
CASPER, 320KB SRAM; 640 KB flash, USB HS, Flexcomm Interface, SDIO, 32-bit
counter/timers, SCTimer/PWM, PLU, 16-bit 1.0 Msamples/sec ADC, Comparator,
Temperature Sensor, AES, PUF, SHA, CRC, RNG
Product data sheet; NXP Semiconductors;
6. i.MX 8M Mini LPDDR4 EVK Board Hardware User’s Guide
User guide; NXP Semiconductors;
7. i.MX 8M Mini Application Processor Datasheet for Consumer Products
Data sheet; NXP Semiconductors;
8. i.MX 8M Mini Application Processor Reference Manual
Reference manual; NXP Semiconductors;
9. Arduino Uno R3 Reference Manual
Reference manual; NXP Semiconductors;
10. IMX8MMINI-IARD interposer board User Manual
User manual; NXP Semiconductors;
11. NXP EVK Firmware and GUI Installation Guide for Arduino Series Boards
User manual; NXP Semiconductors;
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10 Legal information
10.1 Definitions
Draft — A draft status on a document indicates that the content is still
under internal review and subject to formal approval, which may result
in modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included in a draft version of a document and shall have no
liability for the consequences of use of such information.
10.2 Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, NXP Semiconductors does not give
any representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability
towards customer for the products described herein shall be limited in
accordance with the Terms and conditions of commercial sale of NXP
Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to
make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their
applications and products using NXP Semiconductors products, and NXP
Semiconductors accepts no liability for any assistance with applications or
customer product design. It is customer’s sole responsibility to determine
whether the NXP Semiconductors product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default
in the customer’s applications or products, or the application or use by
customer’s third party customer(s). Customer is responsible for doing all
necessary testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications
and the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
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Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Evaluation products — This product is provided on an “as is” and “with all
faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates
and their suppliers expressly disclaim all warranties, whether express,
implied or statutory, including but not limited to the implied warranties of noninfringement, merchantability and fitness for a particular purpose. The entire
risk as to the quality, or arising out of the use or performance, of this product
remains with customer.
In no event shall NXP Semiconductors, its affiliates or their suppliers
be liable to customer for any special, indirect, consequential, punitive
or incidental damages (including without limitation damages for loss of
business, business interruption, loss of use, loss of data or information, and
the like) arising out the use of or inability to use the product, whether or not
based on tort (including negligence), strict liability, breach of contract, breach
of warranty or any other theory, even if advised of the possibility of such
damages.
Notwithstanding any damages that customer might incur for any reason
whatsoever (including without limitation, all damages referenced above and
all direct or general damages), the entire liability of NXP Semiconductors,
its affiliates and their suppliers and customer’s exclusive remedy for all of
the foregoing shall be limited to actual damages incurred by customer based
on reasonable reliance up to the greater of the amount actually paid by
customer for the product or five dollars (US$5.00). The foregoing limitations,
exclusions and disclaimers shall apply to the maximum extent permitted by
applicable law, even if any remedy fails of its essential purpose.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Security — Customer understands that all NXP products may be subject to
unidentified vulnerabilities or may support established security standards or
specifications with known limitations. Customer is responsible for the design
and operation of its applications and products throughout their lifecycles
to reduce the effect of these vulnerabilities on customer’s applications
and products. Customer’s responsibility also extends to other open and/or
proprietary technologies supported by NXP products for use in customer’s
applications. NXP accepts no liability for any vulnerability. Customer should
regularly check security updates from NXP and follow up appropriately.
Customer shall select products with security features that best meet rules,
regulations, and standards of the intended application and make the
ultimate design decisions regarding its products and is solely responsible
for compliance with all legal, regulatory, and security related requirements
concerning its products, regardless of any information or support that may be
provided by NXP.
NXP has a Product Security Incident Response Team (PSIRT) (reachable
at PSIRT@nxp.com) that manages the investigation, reporting, and solution
release to security vulnerabilities of NXP products.
10.3 Trademarks
Notice: All referenced brands, product names, service names, and
trademarks are the property of their respective owners.
NXP — wordmark and logo are trademarks of NXP B.V.
All information provided in this document is subject to legal disclaimers.
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Tables
Tab. 1.
Tab. 2.
Tab. 3.
Tab. 4.
The pin chart of Arduino connectors and
their usage ........................................................ 7
I/O allocation ..................................................... 9
CPLD control bus ............................................11
MAX V data bus ..............................................11
Tab. 5.
Tab. 6.
Tab. 7.
Tab. 8.
MAX_CTRL_# control lines in Count mode ..... 12
PCAL6524EV-ARD jumpers ............................13
PCAL6524EV-ARD test points ........................ 14
Abbreviations ...................................................27
Fig. 9.
The assembly PCAL6524EV-ARD
daughterboard, IMX8MMINI-IARD
interposer board, and i.MX 8M Mini
LPDDR4 EVK, before starting .........................20
PCAL6524EV-ARD daughterboard / i.MX
8M Mini LPDDR4 EVK board operation .......... 21
Graphical interface at start-up (“Settings”
tab activated by default) ..................................23
Graphical interface – “CPLD” tab activated ..... 24
Graphical interface – “SWITCH” tab
activated .......................................................... 25
Graphical interface – “LED” tab activated ........26
Graphical interface – “Debug” tab activated .... 26
Figures
Fig. 1.
Fig. 2.
Fig. 3.
Fig. 4.
Fig. 5.
Fig. 6.
Fig. 7.
Fig. 8.
PCAL6524EV-ARD board, top view (up)
and bottom view (down) ....................................6
PCAL6524EV-ARD block diagram .................... 7
PCAL6524EV-ARD on-board LED display ...... 13
PCAL6524EV-ARD jumper locations .............. 14
PCAL6524EV-ARD daughterboard and
IMXRT1050 EVK board, before starting .......... 16
The assembly PCAL6524EV-ARD
daughterboard / IMXRT1050 EVK board
operation ..........................................................16
PCAL6524EV-ARD daughterboard and
LPCXpresso55S69 motherboard, before
starting .............................................................18
PCAL6524EV-ARD daughterboard/
LPCXpresso55S69 motherboard operation .....19
UM11711
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Fig. 10.
Fig. 11.
Fig. 12.
Fig. 13.
Fig. 14.
Fig. 15.
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Contents
1
2
2.1
3
3.1
3.2
3.3
3.4
4
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
4.9.1
4.9.2
4.9.3
4.10
5
6
6.1
6.2
6.3
6.4
7
8
9
10
Introduction ......................................................... 4
Finding kit resources and information on
the NXP web site ................................................ 4
Collaborate in the NXP community ....................4
Getting ready .......................................................4
Kit contents ........................................................5
Assumptions ...................................................... 5
Static handling requirements ............................. 5
Minimum system requirements ..........................5
Getting to know the hardware ........................... 5
PCAL6524EV-ARD features .............................. 5
Kit featured components ....................................6
Block diagram ....................................................6
Schematic diagram ............................................ 7
Arduino port ....................................................... 7
I2C-bus .............................................................. 9
Control bus ........................................................ 9
I/O bus ............................................................... 9
CPLD ............................................................... 10
Direct write .......................................................11
Count mode ..................................................... 12
Idle mode .........................................................12
Jumpers and test points .................................. 13
Installing and configuring software tools ....... 14
Configuring the hardware ................................ 15
Using the PCAL6524EV-ARD with an
IMXRT1050 EVK board ................................... 15
Using the PCAL6524EV-ARD with an
LPCXpresso55S69 development board ...........17
Using the PCAL6524EV-ARD with an i.MX
8M Mini LPDDR4 EVK board .......................... 19
Using PCAL6524EV-ARD with another
device ...............................................................21
GUI description ................................................. 22
Abbreviations .................................................... 27
References ......................................................... 27
Legal information .............................................. 28
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 'Legal information'.
© NXP B.V. 2022.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 19 January 2022
Document identifier: UM11711
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