PCF8545
Universal LCD driver for multiplex rates up to 1:8
Rev. 1 — 13 November 2013
Product data sheet
1. General description
The PCF8545 is a peripheral device which interfaces to almost any Liquid Crystal Display
(LCD)1 with low multiplex rates. It generates the drive signals for any multiplexed LCD
containing up to eight backplanes, and up to 320 elements. The PCF8545 is compatible
with most microcontrollers and communicates via the two-line bidirectional I2C-bus
(PCF8545A) or a three line unidirectional SPI-bus (PCF8545B). Communication
overheads are minimized using a display RAM with auto-incremented addressing.
For a selection of NXP LCD segment drivers, see Table 40 on page 61.
2. Features and benefits
Single-chip 320 elements LCD controller and driver
Wide range for digital power supply: from 1.8 V to 5.5 V
LCD supply range from 2.5 V up to 5.5 V
LCD and logic supplies may be separated
Low power consumption
Selectable backplane drive configuration: 4, 6, or 8 backplane multiplexing
Selectable display bias configuration
320-bit RAM for display data storage
400 kHz I2C-bus interface (PCF8545A)
5 MHz SPI-bus interface (PCF8545B)
Programmable frame frequency in the range of 60 Hz to 300 Hz in steps of 10 Hz;
factory calibrated
320 segments driven allowing:
up to 40 7-segment alphanumeric characters
up to 20 14-segment alphanumeric characters
any graphics of up to 320 elements
Manufactured in silicon gate CMOS process
3. Applications
Industrial and consumer products
1.
The definition of the abbreviations and acronyms used in this data sheet can be found in Section 21.
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
4. Ordering information
Table 1.
Ordering information
Type number
Interface Package
type
Name
PCF8545ATT
I2C-bus
TSSOP56 plastic thin shrink small outline
SOT364-1
package; 56 leads; body width 6.1 mm
PCF8545BTT
SPI-bus
TSSOP56 plastic thin shrink small outline
SOT364-1
package; 56 leads; body width 6.1 mm
Description
Version
4.1 Ordering options
Table 2.
Ordering options
Product type number
Sales item (12NC)
Orderable part
number
IC
revision
Delivery form
PCF8545ATT/A
935302987118
PCF8545ATT/AJ
1
tape and reel, 13 inch
PCF8545BTT/A
935302988118
PCF8545BTT/AJ
1
tape and reel, 13 inch
5. Marking
Table 3.
Marking codes
Type number
PCF8545
Product data sheet
Marking code
PCF8545ATT/A
PCF8545ATT
PCF8545BTT/A
PCF8545BTT
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Rev. 1 — 13 November 2013
© NXP B.V. 2013. All rights reserved.
2 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
6. Block diagram
9''
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In this example, the bias system is set to 1⁄3. The transfer is terminated by CE returning to logic 1. After the last bit is
transmitted, the state of the SDI line is not important.
Fig 34. SPI-bus example
PCF8545
Product data sheet
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Rev. 1 — 13 November 2013
© NXP B.V. 2013. All rights reserved.
43 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
10. Internal circuitry
9''
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966
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Fig 35. Device protection diagram for PCF8545A
9''
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Fig 36. Device protection diagram for PCF8545B
11. Safety notes
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling
electrostatic sensitive devices.
Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or
equivalent standards.
CAUTION
Static voltages across the liquid crystal display can build up when the LCD supply voltage
(VLCD) is on while the IC supply voltage (VDD) is off, or vice versa. This may cause unwanted
display artifacts. To avoid such artifacts, VLCD and VDD must be applied or removed together.
PCF8545
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 November 2013
© NXP B.V. 2013. All rights reserved.
44 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
12. Limiting values
Table 32. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
VDD
Conditions
Min
Max
Unit
supply voltage
0.5
+6.5
V
IDD
supply current
50
+50
mA
VLCD
LCD supply voltage
0.5
+6.5
V
IDD(LCD)
LCD supply current
50
+50
mA
VI
input voltage
0.5
+6.5
V
0.5
+6.5
V
10
+10
mA
on pins S0 to S39,
BP0 to BP7
0.5
+6.5
V
on pin SDA
0.5
+6.5
V
10
+10
mA
PCF8545ATT
on pins SDA,
OSCCLK, SCL, A0,
RESET
PCF8545BTT
on pins CE,
OSCCLK, SCL,
SDI, RESET
II
input current
VO
output voltage
IO
output current
ISS
ground supply current
50
+50
mA
Ptot
total power dissipation
-
400
mW
P/out
power dissipation per output
VESD
electrostatic discharge voltage
-
100
mW
HBM
[1]
-
3500
V
CDM
[2]
-
1250
V
Ilu
latch-up current
[3]
-
200
mA
Tstg
storage temperature
[4]
65
+150
C
Tamb
ambient temperature
40
+85
C
operating device
[1]
Pass level; Human Body Model (HBM), according to Ref. 6 “JESD22-A114”.
[2]
Pass level; Charge Device Model (CDM), according to Ref. 7 “JESD22-C101”.
[3]
Pass level; latch-up testing according to Ref. 8 “JESD78” at maximum ambient temperature (Tamb(max)).
[4]
According to the store and transport requirements (see Ref. 12 “UM10569”) the devices have to be stored at a temperature of +8 C to
+45 C and a humidity of 25 % to 75 %.
PCF8545
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 November 2013
© NXP B.V. 2013. All rights reserved.
45 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
13. Static characteristics
Table 33. Static characteristics
VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 5.5 V; Tamb = 40 C to +85 C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
1.8
2.5
-
5.5
V
-
5.5
[1]
V
-
0.5
2
A
external 9.6 kHz clock
[2]
-
10
25
A
internal oscillator
[2]
-
30
60
A
power-down, see
Figure 38
[1][3]
-
7
15
A
[4]
-
55
140
A
VSS 0.5
-
VDD + 0.5
V
Supplies
VDD
supply voltage
VLCD
LCD supply voltage
VLCD VDD
IDD(pd)
power-down mode supply current
IDD
supply current
IDD(LCD)
see Figure 37
LCD supply current
display active, see
Figure 39
Logic
VI
input voltage
VIL
LOW-level input voltage
on pins OSCCLK,
A0 and RESET
-
-
0.3VDD
V
VIH
HIGH-level input voltage
on pins OSCCLK,
A0 and RESET
0.7VDD
-
-
V
VO
output voltage
0.5
-
VDD + 0.5
V
VOH
HIGH-level output voltage
driving load of 50 A
on pins OSCCLK
0.8VDD
-
-
V
VOL
LOW-level output voltage
driving load of 50 A
on pins OSCCLK
-
-
0.2VDD
V
IOH
HIGH-level output current
output source current;
VOH = VDD 0.4 V
VDD = 1.8 V
0.7
1.6
-
mA
VDD 3.3 V
1.5
4.0
-
mA
VDD = 1.8 V
3
4
-
mA
VDD 3.3 V
5
10
-
mA
1
-
+1
A
on pin OSCCLK
IOL
LOW-level output current
output sink current;
VOL = 0.4 V
on pin OSCCLK
IL
leakage current
PCF8545
Product data sheet
Vi = VDD or VSS; on
pin OSCCLK
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Rev. 1 — 13 November 2013
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46 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
Table 33. Static characteristics …continued
VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 5.5 V; Tamb = 40 C to +85 C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
I2C-bus[5]
On pins SCL and SDA
VI
input voltage
VSS 0.5
-
5.5
V
VIL
LOW-level input voltage
-
-
0.3VDD
V
VIH
HIGH-level input voltage
0.7VDD
-
-
V
VO
output voltage
0.5
-
+5.5
V
IL
leakage current
VI = VDD or VSS
1
-
+1
A
LOW-level output current
output sink current
VDD = 1.8 V
3
5.5
-
mA
VDD = 3.3 V
5
9
-
mA
on pin SCL
VSS 0.5
-
5.5
V
on pins CE and SDI
VSS 0.5
-
VDD + 0.5
V
On pin SDA
IOL
SPI-bus
input voltage
VI
On pins SCL, CE and SDI
VIL
LOW-level input voltage
-
-
0.3VDD
V
VIH
HIGH-level input voltage
0.7VDD
-
-
V
IL
leakage current
1
-
+1
A
VI = VDD or VSS
LCD outputs
VO
output voltage variation
on pins BP0 to BP7
[6]
-
2.5
+10
mV
on pins S0 to S43
[7]
-
2.5
+10
mV
VLCD = 5.5 V;
on pins BP0 to BP7
[8]
-
0.9
5.0
k
VLCD = 5.5 V;
on pins S0 to S43
[8]
-
1.5
6.0
k
output resistance
RO
[1]
Power-down mode is enabled; I2C-bus or SPI-bus inactive.
[2]
1:8 multiplex drive mode; 1⁄4 bias; display enabled; LCD outputs are open circuit; RAM is all written with logic 1; inputs at VSS or VDD;
default display prescale factor; I2C-bus or SPI-bus inactive.
[3]
Strongly linked to VLCD voltage. See Figure 38.
[4]
1:8 multiplex drive mode; 1⁄4 bias; display enabled; LCD outputs are open circuit; RAM is all written with logic 1; default display prescale
factor.
[5]
The I2C-bus interface of PCF8545 is 5 V tolerant.
[6]
Variation between any two backplanes on a given voltage level; static measured.
[7]
Variation between any two segments on a given voltage level; static measured.
[8]
Outputs measured one at a time.
PCF8545
Product data sheet
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Rev. 1 — 13 November 2013
© NXP B.V. 2013. All rights reserved.
47 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
DDD
,''
$
7DPE &
1:8 multiplex drive mode; 1⁄4 bias; internal oscillator; display enabled; LCD outputs are open circuit;
RAM is all written with logic 1; inputs at VSS or VDD; default display prescale factor; I2C-bus or
SPI-bus inactive. Typical is defined at VDD = 3.3 V, 25 C.
Fig 37. Typical IDD with respect to temperature
DDD
,'' /&'
$
9/&' 9
7DPE &
Power-down mode is enabled; I2C-bus or SPI-bus inactive. Typical is defined at 25 C.
Fig 38. Typical IDD(LCD) in power-down mode with respect to temperature
PCF8545
Product data sheet
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Rev. 1 — 13 November 2013
© NXP B.V. 2013. All rights reserved.
48 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
DDD
,'' /&'
$
9/&' 9
7DPE &
1:8 multiplex drive mode; 1⁄4 bias; display enabled; LCD outputs are open circuit; RAM is all written
with logic 1; default display prescale factor. Typical is defined at 25 C.
Fig 39. Typical IDD(LCD) when display is active with respect to temperature
PCF8545
Product data sheet
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Rev. 1 — 13 November 2013
© NXP B.V. 2013. All rights reserved.
49 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
14. Dynamic characteristics
Table 34. Dynamic characteristics
VDD = 1.8 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 5.5 V; Tamb = 40 C to +85 C; unless otherwise specified.
Symbol
Parameter
Conditions
[1]
Min
Typ
Max
Unit
7800
9600
11040
Hz
fclk
clock frequency
output on pin
OSCCLK; VDD = 3.3 V
fclk(ext)
external clock frequency
EFR = 0
-
-
250000
Hz
t(RESET_N)
RESET_N pulse width
LOW time
400
-
-
ns
External clock source used on pin OSCCLK
tclk(H)
clock HIGH time
33
-
-
s
tclk(L)
clock LOW time
33
-
-
s
[1]
Frequency present on OSCCLK with default display frequency division factor.
DDD
IFON
N+]
9'' 9
(1) 40 C.
(2) 25 C.
(3) 85 C.
Fig 40. Typical clock frequency with respect to VDD and temperature
WFON +
IFON H[W
WFON /
9''
26&&/.
9''
DDD
External clock source used on pin OSCCLK.
Fig 41. Driver timing waveforms
PCF8545
Product data sheet
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Rev. 1 — 13 November 2013
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50 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
W5(6(7 /
5(6(7
9''
DDD
Fig 42. RESET timing
Table 35. Timing characteristics: I2C-bus
VDD = 1.8 V to 5.5 V; VSS = 0 V; Tamb = 40 C to +85 C; unless otherwise specified. All timing values are valid within the
operating supply voltage and temperature range and referenced to VIL and VIH with an input voltage swing of VSS to VDD.
Timing waveforms see Figure 43.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
-
-
400
kHz
Pin SCL
[1]
fSCL
SCL clock frequency
tLOW
LOW period of the SCL clock
1.3
-
-
s
tHIGH
HIGH period of the SCL clock
0.6
-
-
s
tSU;DAT
data set-up time
100
-
-
ns
tHD;DAT
data hold time
0
-
-
ns
Pin SDA
Pins SCL and SDA
tBUF
bus free time between a STOP
and START condition
1.3
-
-
s
tSU;STO
set-up time for STOP condition
0.6
-
-
s
tHD;STA
hold time (repeated) START
condition
0.6
-
-
s
tSU;STA
set-up time for a repeated START
condition
0.6
-
-
s
tr
rise time of both SDA and SCL
signals
fSCL = 400 kHz
-
-
0.3
s
fSCL = 100 kHz
-
-
1.0
s
-
-
0.3
s
tf
fall time of both SDA and SCL
signals
tVD;ACK
data valid acknowledge time
[2]
0.6
-
-
s
tVD;DAT
data valid time
[3]
0.6
-
-
s
Cb
capacitive load for each bus line
-
-
400
pF
-
-
50
ns
[4]
pulse width of spikes that must be
suppressed by the input filter
tSP
[1]
The minimum SCL clock frequency is limited by the bus time-out feature, which resets the serial bus interface if either the SDA or SCL
is held LOW for a minimum of 25 ms. The bus time-out feature must be disabled for DC operation.
[2]
tVD;ACK = time for acknowledgement signal from SCL LOW to SDA output LOW.
[3]
tVD;DAT = minimum time for valid SDA output following SCL LOW.
[4]
Input filters on the SDA and SCL inputs suppress noise spikes of less than 50 ns.
PCF8545
Product data sheet
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Rev. 1 — 13 November 2013
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51 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
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Fig 43. I2C-bus timing waveforms
Table 36. Timing characteristics: SPI-bus
VDD = 1.8 V to 5.5 V; VSS = 0 V; Tamb = 40 C to +85 C. All timing values are valid within the operating supply voltage and
temperature range and referenced to VIL and VIH with an input voltage swing of VSS to VDD. Timing waveforms see Figure 44.
Symbol
Parameter
Conditions
VDD < 2.7 V
VDD 2.7 V
Min
Max
Min
Max
Unit
fclk(SCL)
SCL clock frequency
-
2
-
5
MHz
tSCL
SCL time
500
-
200
-
ns
tclk(H)
clock HIGH time
200
-
80
-
ns
tclk(L)
clock LOW time
200
-
80
-
ns
tr
rise time
for SCL signal
-
100
-
100
ns
tf
fall time
for SCL signal
-
100
-
100
ns
tsu(CE_N)
CE_N set-up time
150
-
80
-
ns
th(CE_N)
CE_N hold time
0
-
0
-
ns
trec(CE_N)
CE_N recovery time
100
-
100
-
ns
tsu
set-up time
set-up time for
SDI data
10
-
5
-
ns
th
hold time
hold time for SDI
data
25
-
10
-
ns
PCF8545
Product data sheet
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Rev. 1 — 13 November 2013
© NXP B.V. 2013. All rights reserved.
52 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
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Fig 44. SPI-bus timing
PCF8545
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 November 2013
© NXP B.V. 2013. All rights reserved.
53 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
15. Package outline
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Fig 45. Package outline SOT364-1 (TSSOP56)
PCF8545
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 November 2013
© NXP B.V. 2013. All rights reserved.
54 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
16. Handling information
All input and output pins are protected against ElectroStatic Discharge (ESD) under
normal handling. When handling Metal-Oxide Semiconductor (MOS) devices ensure that
all normal precautions are taken as described in JESD625-A, IEC 61340-5 or equivalent
standards.
PCF8545
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 November 2013
© NXP B.V. 2013. All rights reserved.
55 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
17. Packing information
17.1 Tape and reel information
7239,(:
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3
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SLQ
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DDD
Fig 46. Tape and reel details for PCF8545ATT and PCF8545BTT
Table 37.
Carrier tape dimensions of PCF8545ATT and PCF8545BTT
Symbol
Description
Value
Unit
Compartments
A0
pocket width in x direction
8.65 to 8.9
mm
B0
pocket width in y direction
14.4 to 15.8
mm
K0
pocket depth
1.5 to 1.8
mm
P1
pocket hole pitch
12
mm
D1
pocket hole diameter
1.5 to 2.05
mm
Overall dimensions
PCF8545
Product data sheet
W
tape width
24
mm
D0
sprocket hole diameter
1.5 to 1.55
mm
P0
sprocket hole pitch
4
mm
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PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
18. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
18.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
18.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
•
•
•
•
•
•
Board specifications, including the board finish, solder masks and vias
Package footprints, including solder thieves and orientation
The moisture sensitivity level of the packages
Package placement
Inspection and repair
Lead-free soldering versus SnPb soldering
18.3 Wave soldering
Key characteristics in wave soldering are:
• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities
PCF8545
Product data sheet
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PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
18.4 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 47) than a SnPb process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 38 and 39
Table 38.
SnPb eutectic process (from J-STD-020D)
Package thickness (mm)
Package reflow temperature (C)
Volume (mm3)
< 350
350
< 2.5
235
220
2.5
220
220
Table 39.
Lead-free process (from J-STD-020D)
Package thickness (mm)
Package reflow temperature (C)
Volume (mm3)
< 350
350 to 2000
> 2000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 47.
PCF8545
Product data sheet
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58 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
temperature
maximum peak temperature
= MSL limit, damage level
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 47. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
PCF8545
Product data sheet
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59 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
19. Footprint information for reflow soldering
)RRWSULQWLQIRUPDWLRQIRUUHIORZVROGHULQJRI76623SDFNDJH
627
+[
*[
3
+\
*\
%\
$\
&
' [
'
3
*HQHULFIRRWSULQWSDWWHUQ
5HIHUWRWKHSDFNDJHRXWOLQHGUDZLQJIRUDFWXDOOD\RXW
VROGHUODQG
RFFXSLHGDUHD
',0(16,216LQPP
3
3
$\
%\
&
'
'
*[
*\
+[
+\
VRWBIU
Fig 48. Footprint information for reflow soldering of SOT364-1 (TSSOP56) package
PCF8545
Product data sheet
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Rev. 1 — 13 November 2013
© NXP B.V. 2013. All rights reserved.
60 of 72
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx
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xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
NXP Semiconductors
Product data sheet
PCF8545
20. Appendix
20.1 LCD segment driver selection
Table 40.
Selection of LCD segment drivers
Type name
Number of elements at MUX
VDD (V)
VLCD (V)
ffr (Hz)
1:1 1:2 1:3 1:4 1:6 1:8 1:9
VLCD (V) VLCD (V)
Tamb (C)
charge temperature
pump
compensat.
Interface
Package
AECQ100
PCA8561AHN[5]
18
36
54
72
-
-
-
1.8 to 5.5 1.8 to 5.5 32 to 256[1]
N
N
40 to 105 I2C
HVQFN32 Y
PCA8561BHN[5]
18
36
54
72
-
-
-
1.8 to 5.5 1.8 to 5.5 32 to 256[1]
N
N
40 to 105 SPI
HVQFN32 Y
PCF8566TS
24
48
72
96
-
-
-
2.5 to 6
N
N
40 to 85
I2C
VSO40
N
40 to 85
I2C
TSSOP48 N
I2C
TSSOP48 Y
PCF85162T
32
64
96
128 -
-
-
2.5 to 6
69
1.8 to 5.5 2.5 to 6.5 82
N
N
32
64
96
128 -
-
-
1.8 to 5.5 2.5 to 8
110
N
N
40 to 95
PCA85262ATT
32
64
96
128 -
-
-
1.8 to 5.5 2.5 to 8
200
N
N
40 to 105 I2C
TSSOP48 Y
TSSOP48 N
TSSOP48 N
PCF8551ATT[5]
PCF8551BTT[5]
36
36
72
72
108 144 108 144 -
-
-
1.8 to 5.5 1.8 to 5.5 32 to
128[1]
N
N
40 to 85
I2C
1.8 to 5.5 1.8 to 5.5 32 to
128[1]
N
N
40 to 85
SPI
256[1]
I2C
TSSOP48 Y
PCA8551ATT[5]
36
72
108 144 -
-
-
1.8 to 5.5 1.8 to 5.5 32 to
N
N
40 to 105
PCA8551BTT[5]
36
72
108 144 -
-
-
1.8 to 5.5 1.8 to 5.5 32 to 256[1]
N
N
40 to 105 SPI
TSSOP48 Y
PCF85176T
40
80
120 160 -
-
-
1.8 to 5.5 2.5 to 6.5 82
N
N
40 to 85
I2C
TSSOP56 N
N
40 to 95
I2C
TSSOP56 Y
N
N
40 to 105
I2C
TSSOP56 Y
N
N
40 to 85
I2C
TQFP64
N
N
40 to 95
I2C
TQFP64
Y
TSSOP56 N
PCA85176T
40
80
120 160 -
-
-
1.8 to 5.5 2.5 to 8
110
PCA85276ATT
40
80
120 160 -
-
-
1.8 to 5.5 2.5 to 8
PCF85176H
40
80
120 160 -
-
-
1.8 to 5.5 2.5 to 6.5 82
PCA85176H
PCF8553ATT[5]
40
40
80
80
120 160 120 160 -
-
-
1.8 to 5.5 2.5 to 8
N
200
82
N
1.8 to 5.5 1.8 to 5.5 32 to
128[1]
N
N
40 to 85
I2C
128[1]
40
80
120 160 -
-
-
1.8 to 5.5 1.8 to 5.5 32 to
N
N
40 to 85
SPI
TSSOP56 N
PCA8553ATT[5]
40
80
120 160 -
-
-
1.8 to 5.5 1.8 to 5.5 32 to 256[1]
N
N
40 to 105 I2C
TSSOP56 Y
-
1.8 to 5.5 1.8 to 5.5 32 to
256[1]
N
N
40 to 105 SPI
TSSOP56 Y
1.8 to 5.5 2.5 to 9
60 to
300[1]
N
N
40 to 95
I2C
TSSOP56 Y
300[1]
N
N
40 to 95
SPI
TSSOP56 Y
Y
Y[3]
40 to 95
I2C
TQFP64
Y
Y
Y[3]
40 to 95
SPI
TQFP64
Y
N
40 to 85
I2C
LQFP80
N
N
40 to 95
I2C
LQFP80
Y
PCA8553BTT[5]
PCA8546ATT[5]
40
-
80
-
120 160 -
176 -
-
-
61 of 72
© NXP B.V. 2013. All rights reserved.
PCA8546BTT[5]
-
-
-
176 -
-
-
1.8 to 5.5 2.5 to 9
60 to
PCA8547AHT[5]
44
88
-
176 -
-
-
1.8 to 5.5 2.5 to 9
60 to 300[1]
1.8 to 5.5 2.5 to 9
300[1]
PCA8547BHT[5]
PCF85134HL
PCA85134H
44
60
60
88
-
176 -
120 180 240 120 180 240 -
-
-
60 to
1.8 to 5.5 2.5 to 6.5 82
1.8 to 5.5 2.5 to 8
82
N
N
PCF8545
PCF8553BTT[5]
Universal LCD driver for multiplex rates up to 1:8
Rev. 1 — 13 November 2013
All information provided in this document is subject to legal disclaimers.
PCA85162T
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx
xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
Selection of LCD segment drivers …continued
Type name
Number of elements at MUX
VDD (V)
VLCD (V)
ffr (Hz)
VLCD (V) VLCD (V)
Tamb (C)
charge temperature
pump
compensat.
60 to 300[1]
Y
Y
1:1 1:2 1:3 1:4 1:6 1:8 1:9
40 to 105 I2C
LQFP80
Y
120 -
240 -
PCF8545ATT[5]
-
-
-
176 252 320 -
1.8 to 5.5 2.5 to 5.5 60 to 300[1]
N
N
40 to 85
I2C
TSSOP56 N
PCF8545BTT[5]
-
-
-
176 252 320 -
1.8 to 5.5 2.5 to 5.5 60 to 300[1]
N
N
40 to 85
SPI
TSSOP56 N
176 252 320 -
60 to
300[1]
N
N
40 to 85
I2C
TSSOP56 N
300[1]
-
-
2.5 to 5.5 2.5 to 9
AECQ100
60
-
-
Package
PCA8543AHL
PCF8536AT[4]
-
Interface
1.8 to 5.5 2.5 to 9
PCF8536BT[4]
-
-
-
176 252 320 -
1.8 to 5.5 2.5 to 9
60 to
N
N
40 to 85
SPI
TSSOP56 N
PCA8536AT[4]
-
-
-
176 252 320 -
1.8 to 5.5 2.5 to 9
60 to 300[1]
N
N
40 to 95
I2C
TSSOP56 Y
1.8 to 5.5 2.5 to 9
60 to
300[1]
N
N
40 to 95
SPI
TSSOP56 Y
60 to
300[1]
Y
Y[3]
40 to 85
I2C
TQFP64
300[1]
PCA8536BT[4]
PCF8537AH
44
88
-
176 252 320 176 276 352 -
1.8 to 5.5 2.5 to 9
N
44
88
-
176 276 352 -
1.8 to 5.5 2.5 to 9
60 to
Y
40 to 85
SPI
TQFP64
N
PCA8537AH
44
88
-
176 276 352 -
1.8 to 5.5 2.5 to 9
60 to 300[1]
Y
Y[3]
40 to 95
I2C
TQFP64
Y
PCA8537BH
44
88
-
176 276 352 -
1.8 to 5.5 2.5 to 9
60 to 300[1]
Y
Y[3]
40 to 95
SPI
TQFP64
Y
2.5 to 5.5 2.5 to 9
60 to
300[1]
Y
Y[3]
40 to 105
I2C
LQFP80
Y
60 to
300[1]
Y
Y[3]
40 to 105
I2C
bare die
Y
-
1.8 to 5.5 1.8 to 5.5 32 to 128[1]
N
N
40 to 85
I2C, SPI
bare die
N
-
256[1]
N
40 to 105
I2C,
bare die
Y
N
40 to 85
I2C
bare die
N
I2C
60
120 -
PCA9620U
60
120 -
PCF8552DUG[5]
36
72
PCA8552DUG[5]
PCF8576DU
36
40
72
80
240 320 480 240 320 480 -
108 144 108 144 120 160 -
-
-
2.5 to 5.5 2.5 to 9
1.8 to 5.5 1.8 to 5.5 32 to
1.8 to 5.5 2.5 to 6.5 77
N
N
SPI
PCF8576EUG
40
80
120 160 -
-
-
1.8 to 5.5 2.5 to 6.5 77
N
N
40 to 85
bare die
N
PCA8576FUG[5]
40
80
120 160 -
-
-
1.8 to 5.5 2.5 to 8
N
N
40 to 105 I2C
bare die
Y
N
40 to 85
I2C
bare die
N
N
40 to 95
I2C
bare die
Y
I2C
PCF85133U
PCA85133U
80
80
160 240 320 160 240 320 -
PCA85233U
80
PCA8530DUG[5]
102 204 -
PCF85132U
PCA85132U
160 240 320 408 -
160 320 480 640 160 320 480 640 160 320 480 640 -
PCF8538UG[5]
102 204 -
PCA8538UG
102 204 -
-
-
1.8 to 5.5 2.5 to 6.5 82,
110[2]
1.8 to 5.5 2.5 to 8
110[2]
82,
N
N
40 to 105
bare die
Y
Y
Y[3]
40 to 105 I2C, SPI
bare die
Y
N
40 to 85
I2C
bare die
N
N
40 to 95
I2C
bare die
Y
N
N
40 to 95
I2C
bare die
Y
Y
Y[3]
40 to 85
I2C, SPI[2] bare die
N
Y
Y[3]
40 to 105
I2C,
Y
-
1.8 to 5.5 2.5 to 8
150,
-
-
2.5 to 5.5 4 to 12
45 to 300[1]
-
-
1.8 to 5.5 1.8 to 8
1.8 to 5.5 1.8 to 8
1.8 to 5.5 1.8 to 8
60 to
90[1]
60 to
90[1]
117 to
176[1]
408 612 816 918 2.5 to 5.5 4 to 12
45 to 300[1]
408 612 816 918 2.5 to 5.5 4 to 12
300[1]
[1]
Can be selected by command.
[2]
Can be selected by pin configuration.
45 to
N
220[2]
-
N
N
N
SPI[2]
bare die
PCF8545
62 of 72
© NXP B.V. 2013. All rights reserved.
PCA85232U
-
200
Universal LCD driver for multiplex rates up to 1:8
Rev. 1 — 13 November 2013
All information provided in this document is subject to legal disclaimers.
PCF8537BH
Y[3]
PCA9620H
NXP Semiconductors
Product data sheet
PCF8545
Table 40.
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx
xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
Extra feature: Temperature sensor.
[4]
Extra feature: 6 PWM channels.
[5]
In development.
NXP Semiconductors
Product data sheet
PCF8545
[3]
PCF8545
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Universal LCD driver for multiplex rates up to 1:8
Rev. 1 — 13 November 2013
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PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
21. Abbreviations
Table 41.
Acronym
PCF8545
Product data sheet
Abbreviations
Description
CDM
Charged-Device Model
CMOS
Complementary Metal-Oxide Semiconductor
DC
Direct Current
EMC
ElectroMagnetic Compatibility
EPROM
Erasable Programmable Read-Only Memory
ESD
ElectroStatic Discharge
HBM
Human Body Model
I2C
Inter-Integrated Circuit bus
IC
Integrated Circuit
LCD
Liquid Crystal Display
LSB
Least Significant Bit
MSB
Most Significant Bit
MSL
Moisture Sensitivity Level
MUX
Multiplexer
OTP
One Time Programmable
PCB
Printed-Circuit Board
POR
Power-On Reset
RC
Resistance-Capacitance
RAM
Random Access Memory
RGB
Red Green Blue
RMS
Root Mean Square
SCL
Serial CLock line
SDA
Serial DAta line
SPI
Serial Peripheral Interface
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PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
22. References
[1]
AN10365 — Surface mount reflow soldering description
[2]
AN11267 — EMC and system level ESD design guidelines for LCD drivers
[3]
IEC 60134 — Rating systems for electronic tubes and valves and analogous
semiconductor devices
[4]
IEC 61340-5 — Protection of electronic devices from electrostatic phenomena
[5]
IPC/JEDEC J-STD-020D — Moisture/Reflow Sensitivity Classification for
Nonhermetic Solid State Surface-Mount Devices
[6]
JESD22-A114 — Electrostatic Discharge (ESD) Sensitivity Testing Human Body
Model (HBM)
[7]
JESD22-C101 — Field-Induced Charged-Device Model Test Method for
Electrostatic-Discharge-Withstand Thresholds of Microelectronic Components
[8]
JESD78 — IC Latch-Up Test
[9]
JESD625-A — Requirements for Handling Electrostatic-Discharge-Sensitive
(ESDS) Devices
[10] SNV-FA-01-02 — Marking Formats Integrated Circuits
[11] UM10204 — I2C-bus specification and user manual
[12] UM10569 — Store and transport requirements
PCF8545
Product data sheet
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© NXP B.V. 2013. All rights reserved.
65 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
23. Revision history
Table 42.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PCF8545 v.1
20131113
Product data sheet
-
-
PCF8545
Product data sheet
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© NXP B.V. 2013. All rights reserved.
66 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
24. Legal information
24.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
24.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
24.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
PCF8545
Product data sheet
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 November 2013
© NXP B.V. 2013. All rights reserved.
67 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
24.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
I2C-bus — logo is a trademark of NXP B.V.
25. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
PCF8545
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 November 2013
© NXP B.V. 2013. All rights reserved.
68 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
26. Tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
Table 24.
Table 25.
Table 26.
Table 27.
Table 28.
Table 29.
Table 30.
Table 31.
Table 32.
Table 33.
Table 34.
Table 35.
Table 36.
Table 37.
Table 38.
Table 39.
Table 40.
Table 41.
Table 42.
Ordering information . . . . . . . . . . . . . . . . . . . . .2
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . .2
Marking codes . . . . . . . . . . . . . . . . . . . . . . . . . .2
Pin description of PCF8545ATT and
PCF8545BTT . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Commands of PCF8545 . . . . . . . . . . . . . . . . . .7
Initialize - initialize command bit description . . .7
OTP-refresh - OTP-refresh command bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Mode-settings - mode settings command
bit description . . . . . . . . . . . . . . . . . . . . . . . . . .8
Effect of the power-down bit (PD). . . . . . . . . . .10
Oscillator-control - oscillator control
command bit description . . . . . . . . . . . . . . . . . 11
Valid combinations of bits OSC, EFR,
and COE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Typical use of bits OSC, EFR, and COE . . . . .12
OSCCLK pin state depending on configuration 13
LCD frame frequencies. . . . . . . . . . . . . . . . . . .13
Set-MUX-mode - set multiplex drive mode
command bit description . . . . . . . . . . . . . . . . .14
Set-bias-mode - set bias mode command
bit description . . . . . . . . . . . . . . . . . . . . . . . . .14
Frame-frequency - frame frequency and output
clock frequency command bit description . . . .14
Frame frequency prescaler values for 230 kHz
clock operation . . . . . . . . . . . . . . . . . . . . . . . .15
Load-data-pointer - load data pointer
command bit description. . . . . . . . . . . . . . . . . .16
Write-RAM-data - write RAM data
command bit description[1] . . . . . . . . . . . . . . . .16
Reset state . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Selection of display configurations . . . . . . . . . .20
Preferred LCD drive modes: summary of
characteristics. . . . . . . . . . . . . . . . . . . . . . . . . .22
Backplane and active segment combinations. .29
Control byte description . . . . . . . . . . . . . . . . . .36
I2C slave address byte . . . . . . . . . . . . . . . . . . .39
R/W-bit description . . . . . . . . . . . . . . . . . . . . . .39
Status read out value . . . . . . . . . . . . . . . . . . . .40
Modified status read out value . . . . . . . . . . . . .41
Serial interface . . . . . . . . . . . . . . . . . . . . . . . . .42
Subaddress byte definition . . . . . . . . . . . . . . . .42
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . .45
Static characteristics . . . . . . . . . . . . . . . . . . . .46
Dynamic characteristics . . . . . . . . . . . . . . . . . .50
Timing characteristics: I2C-bus . . . . . . . . . . . .51
Timing characteristics: SPI-bus . . . . . . . . . . . .52
Carrier tape dimensions of PCF8545ATT
and PCF8545BTT . . . . . . . . . . . . . . . . . . . . . .56
SnPb eutectic process (from J-STD-020D) . . .58
Lead-free process (from J-STD-020D) . . . . . .58
Selection of LCD segment drivers . . . . . . . . . .61
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . .64
Revision history . . . . . . . . . . . . . . . . . . . . . . . .66
PCF8545
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 November 2013
© NXP B.V. 2013. All rights reserved.
69 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
27. Figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
Fig 7.
Fig 8.
Fig 9.
Fig 10.
Fig 11.
Fig 12.
Fig 13.
Fig 14.
Fig 15.
Fig 16.
Fig 17.
Fig 18.
Fig 19.
Fig 20.
Fig 21.
Fig 22.
Fig 23.
Fig 24.
Fig 25.
Fig 26.
Fig 27.
Fig 28.
Fig 29.
Fig 30.
Fig 31.
Fig 32.
Fig 33.
Fig 34.
Fig 35.
Fig 36.
Fig 37.
Fig 38.
Fig 39.
Fig 40.
Fig 41.
Fig 42.
Block diagram of PCF8545A . . . . . . . . . . . . . . . . .3
Block diagram of PCF8545B . . . . . . . . . . . . . . . . .4
Pin configuration for TSSOP56 (PCF8545ATT). . .5
Pin configuration for TSSOP56 (PCF8545BTT) . .5
Effect of backplane swapping . . . . . . . . . . . . . . . .9
Recommended power-down sequence . . . . . . . .10
Oscillator selection. . . . . . . . . . . . . . . . . . . . . . . .12
Recommended start-up sequence when
using the internal oscillator . . . . . . . . . . . . . . . . .18
Recommended start-up sequence when
using an external clock signal . . . . . . . . . . . . . . .19
Example of displays suitable for PCF8545 . . . . .20
Typical system configuration for the I2C-bus . . . .21
Typical system configuration for the SPI-bus. . . .21
Electro-optical characteristic: relative
transmission curve of the liquid . . . . . . . . . . . . . .23
Waveforms for the 1:4 multiplex drive mode
with 1⁄3 bias and line inversion . . . . . . . . . . . . . . .24
Waveforms for 1:6 multiplex drive mode with
bias 1⁄3 and line inversion. . . . . . . . . . . . . . . . . . .25
Waveforms for 1:6 multiplex drive mode with
bias 1⁄4 and line inversion. . . . . . . . . . . . . . . . . . .26
Waveforms for 1:8 multiplex drive mode with
bias 1⁄4 and line inversion. . . . . . . . . . . . . . . . . . .27
Waveforms for 1:8 multiplex drive mode with
bias 1⁄4 and frame inversion . . . . . . . . . . . . . . . . .28
Display RAM bitmap . . . . . . . . . . . . . . . . . . . . . .30
Display RAM filling order in 1:4 multiplex
drive mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Boundary condition in 1:4 multiplex drive mode .32
Display RAM filling order in 1:6 multiplex
drive mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Boundary condition in 1:6 multiplex drive mode .34
Display RAM filling order in 1:8 multiplex
drive mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Control byte format . . . . . . . . . . . . . . . . . . . . . . .36
Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
Definition of START and STOP conditions. . . . . .37
System configuration . . . . . . . . . . . . . . . . . . . . . .38
Acknowledgement on the I2C-bus . . . . . . . . . . . .38
I2C-bus protocol write mode . . . . . . . . . . . . . . . .40
I2C-bus protocol read mode. . . . . . . . . . . . . . . . .40
Data transfer overview . . . . . . . . . . . . . . . . . . . . .42
SPI-bus write example . . . . . . . . . . . . . . . . . . . . .43
SPI-bus example . . . . . . . . . . . . . . . . . . . . . . . . .43
Device protection diagram for PCF8545A . . . . . .44
Device protection diagram for PCF8545B . . . . . .44
Typical IDD with respect to temperature . . . . . . . .48
Typical IDD(LCD) in power-down mode with
respect to temperature. . . . . . . . . . . . . . . . . . . . .48
Typical IDD(LCD) when display is active with
respect to temperature. . . . . . . . . . . . . . . . . . . . .49
Typical clock frequency with respect to VDD
and temperature . . . . . . . . . . . . . . . . . . . . . . . . .50
Driver timing waveforms . . . . . . . . . . . . . . . . . . .50
RESET timing . . . . . . . . . . . . . . . . . . . . . . . . . . .51
PCF8545
Product data sheet
I2C-bus timing waveforms . . . . . . . . . . . . . . . . . . 52
SPI-bus timing. . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Package outline SOT364-1 (TSSOP56) . . . . . . . 54
Tape and reel details for PCF8545ATT and
PCF8545BTT . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Fig 47. Temperature profiles for large and small
components. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Fig 48. Footprint information for reflow soldering of
SOT364-1 (TSSOP56) package . . . . . . . . . . . . . 60
Fig 43.
Fig 44.
Fig 45.
Fig 46.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 November 2013
© NXP B.V. 2013. All rights reserved.
70 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
28. Contents
1
2
3
4
4.1
5
6
7
7.1
7.2
8
8.1
8.1.1
8.1.2
8.1.3
8.1.3.1
8.1.3.2
8.1.3.3
8.1.3.4
8.1.4
8.1.4.1
8.1.4.2
8.1.5
8.1.6
8.1.7
8.1.8
8.1.9
8.2
8.2.1
8.2.2
8.2.3
8.3
8.4
8.4.1
8.5
8.5.1
8.5.2
8.5.3
8.6
8.7
8.8
8.9
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6
Functional description . . . . . . . . . . . . . . . . . . . 7
Commands of PCF8545 . . . . . . . . . . . . . . . . . . 7
Command: initialize . . . . . . . . . . . . . . . . . . . . . 7
Command: OTP-refresh . . . . . . . . . . . . . . . . . . 7
Command: mode-settings . . . . . . . . . . . . . . . . 8
Backplane swapping. . . . . . . . . . . . . . . . . . . . . 8
Line inversion
(driving scheme A)
and frame inversion
(driving scheme B) . . . . . . . . . . . . . . . . . . . . . . 9
Power-down mode . . . . . . . . . . . . . . . . . . . . . . 9
Display enable . . . . . . . . . . . . . . . . . . . . . . . . 11
Command: oscillator-control . . . . . . . . . . . . . 11
Oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Timing and frame frequency . . . . . . . . . . . . . . 13
Command: set-MUX-mode . . . . . . . . . . . . . . . 14
Command: set-bias-mode . . . . . . . . . . . . . . . 14
Command: frame-frequency . . . . . . . . . . . . . . 14
Command: load-data-pointer . . . . . . . . . . . . . 15
Command: write-RAM-data . . . . . . . . . . . . . . 16
Start-up and shut-down. . . . . . . . . . . . . . . . . . 16
Reset and Power-On Reset
(POR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
RESET pin function . . . . . . . . . . . . . . . . . . . . 17
Recommended start-up sequences . . . . . . . . 17
Possible display configurations . . . . . . . . . . . 20
LCD voltage selector . . . . . . . . . . . . . . . . . . . 21
Electro-optical performance . . . . . . . . . . . . . . 23
LCD drive mode waveforms . . . . . . . . . . . . . . 24
1:4 Multiplex drive mode. . . . . . . . . . . . . . . . . 24
1:6 Multiplex drive mode. . . . . . . . . . . . . . . . . 25
1:8 Multiplex drive mode. . . . . . . . . . . . . . . . . 27
Display register . . . . . . . . . . . . . . . . . . . . . . . . 29
Backplane outputs . . . . . . . . . . . . . . . . . . . . . 29
Segment outputs. . . . . . . . . . . . . . . . . . . . . . . 29
Display RAM . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.9.1
8.9.2
Data pointer . . . . . . . . . . . . . . . . . . . . . . . . . .
RAM filling in 1:4 multiplex
drive mode . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.9.3
RAM filling in 1:6 multiplex
drive mode . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.9.4
RAM filling in 1:8 multiplex
drive mode . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
Bus interfaces . . . . . . . . . . . . . . . . . . . . . . . . .
9.1
Control byte and register selection . . . . . . . .
9.2
I2C-bus interface . . . . . . . . . . . . . . . . . . . . . .
9.2.1
Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . .
9.2.2
START and STOP conditions. . . . . . . . . . . . .
9.2.3
System configuration . . . . . . . . . . . . . . . . . . .
9.2.4
Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . .
9.2.5
I2C-bus controller . . . . . . . . . . . . . . . . . . . . . .
9.2.6
Input filters . . . . . . . . . . . . . . . . . . . . . . . . . . .
9.2.7
I2C-bus slave address . . . . . . . . . . . . . . . . . .
9.2.8
I2C-bus protocol . . . . . . . . . . . . . . . . . . . . . . .
9.2.8.1
Status read out. . . . . . . . . . . . . . . . . . . . . . . .
9.3
SPI-bus interface . . . . . . . . . . . . . . . . . . . . . .
9.3.1
Data transmission . . . . . . . . . . . . . . . . . . . . .
10
Internal circuitry . . . . . . . . . . . . . . . . . . . . . . .
11
Safety notes. . . . . . . . . . . . . . . . . . . . . . . . . . .
12
Limiting values . . . . . . . . . . . . . . . . . . . . . . . .
13
Static characteristics . . . . . . . . . . . . . . . . . . .
14
Dynamic characteristics. . . . . . . . . . . . . . . . .
15
Package outline. . . . . . . . . . . . . . . . . . . . . . . .
16
Handling information . . . . . . . . . . . . . . . . . . .
17
Packing information . . . . . . . . . . . . . . . . . . . .
17.1
Tape and reel information . . . . . . . . . . . . . . .
18
Soldering of SMD packages . . . . . . . . . . . . . .
18.1
Introduction to soldering. . . . . . . . . . . . . . . . .
18.2
Wave and reflow soldering. . . . . . . . . . . . . . .
18.3
Wave soldering . . . . . . . . . . . . . . . . . . . . . . .
18.4
Reflow soldering . . . . . . . . . . . . . . . . . . . . . .
19
Footprint information
for reflow soldering. . . . . . . . . . . . . . . . . . . . .
20
Appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20.1
LCD segment driver selection . . . . . . . . . . . .
21
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . .
22
References. . . . . . . . . . . . . . . . . . . . . . . . . . . .
23
Revision history . . . . . . . . . . . . . . . . . . . . . . .
24
Legal information . . . . . . . . . . . . . . . . . . . . . .
24.1
Data sheet status . . . . . . . . . . . . . . . . . . . . . .
24.2
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . .
31
31
32
34
36
36
37
37
37
37
38
38
39
39
39
40
42
42
44
44
45
46
50
54
55
56
56
57
57
57
57
58
60
61
61
64
65
66
67
67
67
continued >>
PCF8545
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 November 2013
© NXP B.V. 2013. All rights reserved.
71 of 72
PCF8545
NXP Semiconductors
Universal LCD driver for multiplex rates up to 1:8
24.3
24.4
25
26
27
28
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . .
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . .
Contact information. . . . . . . . . . . . . . . . . . . . .
Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
67
68
68
69
70
71
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2013.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 13 November 2013
Document identifier: PCF8545
工商网监
湘ICP备2023018690号
