PCF8564AU/5GC/1,01

PCF8564A Real time clock and calendar Rev. 3 — 26 August 2013 Product data sheet 1. General description The PCF8564A is a CMOS1 real-time clock and calendar optimized for low power consumption. A programmable clock output, interrupt output and voltage low detector are also provided. All addresses and data are transferred serially via the two-line bidirectional I2C-bus. Maximum bus speed is 400 kbit/s. The built-in word address register is incremented automatically after each written or read data byte. 2. Features and benefits  Provides year, month, day, weekday, hours, minutes, and seconds based on a 32.768 kHz quartz crystal  Wide clock operating voltage: 1.0 V to 5.5 V  Low back-up current typical 250 nA at 3.0 V and 25 C  400 kHz two-wire I2C interface (1.8 V to 5.5 V)  Low-voltage detector  Alarm and timer functions  Two integrated oscillator capacitors  Programmable clock output for peripheral devices (32.768 kHz, 1.024 kHz, 32 Hz, and 1 Hz)  Internal Power-On Reset (POR)  I2C slave address: read A3h, write A2h 3. Applications  Timing devices  Time of the day tracking  Process timing  Alarm  Portable instruments  Electronic metering  Battery powered products 1. The definition of the abbreviations and acronyms used in this data sheet can be found in Section 20. PCF8564A NXP Semiconductors Real time clock and calendar 4. Ordering information Table 1. Ordering information Type number Package Name Description Version PCF8564AU bare die wire bond die; 9 bonding pads PCF8564AU PCF8564AUG bare die 9 bumps PCF8564AUG 4.1 Ordering options Table 2. Ordering options Product type number Sales item (12NC) Orderable part number PCF8564AU/10AB/1 935289478005 PCF8564AU/10AB/1,0 1 wafer, sawn, on FFC PCF8564AU/5BB/1 935289319015 PCF8564AU/5BB/1,01 1 unsawn wafer PCF8564AU/5GB/1 935289477015 PCF8564AU/5GB/1,01 1 unsawn wafer PCF8564AU/5GC/1 935293569015 PCF8564AU/5GC/1,01 1 unsawn wafer PCF8564AUG/12HB/1 935301011005 PCF8564AUG/12HB/1V 1 wafer, sawn, on 8 inch metal FFC; chips with soft bumps[1] [1] IC revision Delivery form Bump hardness, see Table 36. 5. Marking Table 3. PCF8564A Product data sheet Marking codes Type number Marking code PCF8564AU PC8564A-1 PCF8564AUG PC8564A-1 All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 August 2013 © NXP B.V. 2013. All rights reserved. 2 of 48 PCF8564A NXP Semiconductors Real time clock and calendar 6. Block diagram &/.2( 26&, 26&,//$725 N+] ',9,'(5 &/.287 &/2&.287 26&2 &21752/ 021,725 K &RQWUROB K &RQWUROB 'K &/.287BFWUO 32:(521 5(6(7 7,0( 9'' 966 :$7&+ '2* K 6HFRQGV K 0LQXWHV K +RXUV K 'D\V K :HHNGD\V K 0RQWKV K 1 4096 1⁄ 8192 1⁄ 4096 64 1⁄ 128 1⁄ 64 1 1⁄ 64 1⁄ 64 1⁄ 60 1⁄ 64 1⁄ 64 [1] TF and INT become active simultaneously. [2] TV = loaded countdown value. Timer is stopped when TV = 0. All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 August 2013 © NXP B.V. 2013. All rights reserved. 8 of 48 PCF8564A NXP Semiconductors Real time clock and calendar 8.4 Time and date registers The majority of the registers are coded in the BCD format to simplify application use. 8.4.1 Register Seconds Table 9. Seconds - seconds and clock integrity status register (address 02h) bit description Bit Symbol Value Place value Description 7 VL 0 - clock integrity is guaranteed 1[1] - integrity of the clock information is not guaranteed 6 to 4 SECONDS 0 to 5 ten’s place actual seconds coded in BCD format, see Table 10 3 to 0 unit place [1] 0 to 9 Start-up value. Table 10. Seconds coded in BCD format Seconds value in decimal Upper-digit (ten’s place) Digit (unit place) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 00 0 0 0 0 0 0 0 01 0 0 0 0 0 0 1 02 0 0 0 0 0 1 0 09 0 0 0 1 0 0 1 10 0 0 1 0 0 0 0 58 1 0 1 1 0 0 0 59 1 0 1 1 0 0 1 : : 8.4.1.1 Voltage low detector and clock monitor The PCF8564A has an on-chip voltage low detector. When VDD drops below Vlow the VL (Voltage Low) flag is set to indicate that the integrity of the clock information is no longer guaranteed. The VL flag can only be cleared by command. PJU 9'' QRUPDOSRZHU RSHUDWLRQ SHULRGRIEDWWHU\ RSHUDWLRQ 9ORZ 9/VHW Fig 4. PCF8564A Product data sheet W Voltage low detection All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 August 2013 © NXP B.V. 2013. All rights reserved. 9 of 48 PCF8564A NXP Semiconductors Real time clock and calendar The VL flag is intended to detect the situation when VDD is decreasing slowly, for example under battery operation. Should the oscillator stop or VDD reach Vlow before power is re-asserted, then the VL flag will be set. This indicates that the time is possibly corrupted. 8.4.2 Register Minutes Table 11. Minutes - minutes register (address 03h) bit description Bit Symbol Value Place value Description 7 - - - unused actual minutes coded in BCD format 6 to 4 MINUTES 0 to 5 ten’s place 3 to 0 0 to 9 unit place 8.4.3 Register Hours Table 12. Bit Hours - hours register (address 04h) bit description Value Place value Description 7 to 6 - Symbol - - unused 5 to 4 HOURS 0 to 2 ten’s place actual hours coded in BCD format 3 to 0 0 to 9 unit place 8.4.4 Register Days Table 13. Bit Days - days register (address 05h) bit description Symbol 7 to 6 5 to 4 DAYS[1] 3 to 0 [1] Value Place value Description - - unused 0 to 3 ten’s place actual day coded in BCD format 0 to 9 unit place The PCF8564A compensates for leap years by adding a 29th day to February if the year counter contains a value which is exactly divisible by 4, including the year 00. 8.4.5 Register Weekdays Table 14. Bit PCF8564A Product data sheet Weekdays - weekdays register (address 06h) bit description Symbol Value Description 7 to 3 - - unused 2 to 0 WEEKDAYS 0 to 6 actual weekday values, see Table 15 All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 August 2013 © NXP B.V. 2013. All rights reserved. 10 of 48 PCF8564A NXP Semiconductors Real time clock and calendar Table 15. Weekday assignments Day[1] Bit 2 1 0 Sunday 0 0 0 Monday 0 0 1 Tuesday 0 1 0 Wednesday 0 1 1 Thursday 1 0 0 Friday 1 0 1 Saturday 1 1 0 [1] Definition may be re-assigned by the user. 8.4.6 Register Months Table 16. Months - months and century flag register (address 07h) bit description Bit Symbol Value Place value Description 7 C[1] 0[2] - indicates the century is x 1 - indicates the century is x + 1 6 to 5 - - - unused 4 0 to 1 ten’s place actual month coded in BCD format, see Table 17 0 to 9 unit place MONTHS 3 to 0 [1] This bit may be re-assigned by the user. [2] This bit is toggled when the register Years overflows from 99 to 00. Table 17. Month PCF8564A Product data sheet Month assignments coded in BCD format Upper-digit (ten’s place) Digit (unit place) Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 January 0 0 0 0 1 February 0 0 0 1 0 March 0 0 0 1 1 April 0 0 1 0 0 May 0 0 1 0 1 June 0 0 1 1 0 July 0 0 1 1 1 August 0 1 0 0 0 September 0 1 0 0 1 October 1 0 0 0 0 November 1 0 0 0 1 December 1 0 0 1 0 All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 August 2013 © NXP B.V. 2013. All rights reserved. 11 of 48 PCF8564A NXP Semiconductors Real time clock and calendar 8.4.7 Register Years Table 18. Bit Years - years register (08h) bit description Symbol Value Place value Description 7 to 4 YEARS 0 to 9 ten’s place 3 to 0 0 to 9 unit place [1] actual year coded in BCD format[1] When the register Years overflows from 99 to 00, the century bit C in the register Months is toggled. The PCF8564A compensates for leap years by adding a 29th day to February if the year counter contains a value which is divisible by 4, including the year 00. 8.5 Setting and reading the time Figure 5 shows the data flow and data dependencies starting from the 1 Hz clock tick. +]WLFN 6(&21'6 0,187(6 +2856 /($3